| 897,13 → 897,7 |
|---|
| |
| /* update display watermarks based on new power state */ |
| radeon_bandwidth_update(rdev); |
| /* update displays */ |
| radeon_dpm_display_configuration_changed(rdev); |
| |
| rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; |
| rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; |
| rdev->pm.dpm.single_display = single_display; |
| |
| /* wait for the rings to drain */ |
| for (i = 0; i < RADEON_NUM_RINGS; i++) { |
| struct radeon_ring *ring = &rdev->ring[i]; |
| 919,6 → 913,13 |
|---|
| |
| radeon_dpm_post_set_power_state(rdev); |
| |
| /* update displays */ |
| radeon_dpm_display_configuration_changed(rdev); |
| |
| rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; |
| rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; |
| rdev->pm.dpm.single_display = single_display; |
| |
| if (rdev->asic->dpm.force_performance_level) { |
| if (rdev->pm.dpm.thermal_active) { |
| enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; |