30,12 → 30,11 |
#ifndef RADEON_MODE_H |
#define RADEON_MODE_H |
|
#include <drm_crtc.h> |
#include <drm_mode.h> |
#include <drm_edid.h> |
#include <drm_dp_helper.h> |
#include <drm_fixed.h> |
#include <drm_crtc_helper.h> |
#include <drm/drm_crtc.h> |
#include <drm/drm_edid.h> |
#include <drm/drm_dp_helper.h> |
#include <drm/drm_fixed.h> |
#include <drm/drm_crtc_helper.h> |
#include <linux/i2c.h> |
#include <linux/i2c-algo-bit.h> |
|
210,6 → 209,7 |
CT_RN50_POWER, |
CT_MAC_X800, |
CT_MAC_G5_9600, |
CT_SAM440EP |
}; |
|
enum radeon_dvo_chip { |
219,6 → 219,13 |
|
struct radeon_fbdev; |
|
struct radeon_afmt { |
bool enabled; |
int offset; |
bool last_buffer_filled_status; |
int id; |
}; |
|
struct radeon_mode_info { |
struct atom_context *atom_context; |
struct card_info *atom_card_info; |
225,6 → 232,7 |
enum radeon_connector_table connector_table; |
bool mode_config_initialized; |
struct radeon_crtc *crtcs[6]; |
struct radeon_afmt *afmt[6]; |
/* DVI-I properties */ |
struct drm_property *coherent_mode_property; |
/* DAC enable load detect */ |
243,8 → 251,23 |
|
/* pointer to fbdev info structure */ |
struct radeon_fbdev *rfbdev; |
/* firmware flags */ |
u16 firmware_flags; |
/* pointer to backlight encoder */ |
struct radeon_encoder *bl_encoder; |
}; |
|
#define RADEON_MAX_BL_LEVEL 0xFF |
|
#if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) || defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE) |
|
struct radeon_backlight_privdata { |
struct radeon_encoder *encoder; |
uint8_t negative; |
}; |
|
#endif |
|
#define MAX_H_CODE_TIMING_LEN 32 |
#define MAX_V_CODE_TIMING_LEN 32 |
|
260,6 → 283,18 |
uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN]; |
}; |
|
struct radeon_atom_ss { |
uint16_t percentage; |
uint8_t type; |
uint16_t step; |
uint8_t delay; |
uint8_t range; |
uint8_t refdiv; |
/* asic_ss */ |
uint16_t rate; |
uint16_t amount; |
}; |
|
struct radeon_crtc { |
struct drm_crtc base; |
int crtc_id; |
266,6 → 301,7 |
u16 lut_r[256], lut_g[256], lut_b[256]; |
bool enabled; |
bool can_tile; |
bool in_mode_set; |
uint32_t crtc_offset; |
struct drm_gem_object *cursor_bo; |
uint64_t cursor_addr; |
281,6 → 317,16 |
struct drm_display_mode native_mode; |
int pll_id; |
int deferred_flip_completion; |
/* pll sharing */ |
struct radeon_atom_ss ss; |
bool ss_enabled; |
u32 adjusted_clock; |
int bpc; |
u32 pll_reference_div; |
u32 pll_post_div; |
u32 pll_flags; |
struct drm_encoder *encoder; |
struct drm_connector *connector; |
}; |
|
struct radeon_encoder_primary_dac { |
334,18 → 380,6 |
}; |
|
/* spread spectrum */ |
struct radeon_atom_ss { |
uint16_t percentage; |
uint8_t type; |
uint16_t step; |
uint8_t delay; |
uint8_t range; |
uint8_t refdiv; |
/* asic_ss */ |
uint16_t rate; |
uint16_t amount; |
}; |
|
struct radeon_encoder_atom_dig { |
bool linkb; |
/* atom dig */ |
360,6 → 394,8 |
struct backlight_device *bl_dev; |
int dpms_mode; |
uint8_t backlight_level; |
int panel_mode; |
struct radeon_afmt *afmt; |
}; |
|
struct radeon_encoder_atom_dac { |
381,10 → 417,6 |
struct drm_display_mode native_mode; |
void *enc_priv; |
int audio_polling_active; |
int hdmi_offset; |
int hdmi_config_offset; |
int hdmi_audio_workaround; |
int hdmi_buffer_status; |
bool is_ext_encoder; |
u16 caps; |
}; |
436,9 → 468,6 |
struct radeon_i2c_chan *ddc_bus; |
/* some systems have an hdmi and vga port with a shared ddc line */ |
bool shared_ddc; |
/* for some Radeon chip families we apply an additional EDID header |
check as part of the DDC probe */ |
bool requires_extended_probe; |
bool use_digital; |
/* we need to mind the EDID between detect |
and get modes due to analog/digital/tvencoder */ |
445,6 → 474,7 |
struct edid *edid; |
void *con_priv; |
bool dac_load_detect; |
bool detected_by_load; /* if the connection status was determined by load */ |
uint16_t connector_object_id; |
struct radeon_hpd hpd; |
struct radeon_router router; |
456,6 → 486,8 |
struct drm_gem_object *obj; |
}; |
|
#define ENCODER_MODE_IS_DP(em) (((em) == ATOM_ENCODER_MODE_DP) || \ |
((em) == ATOM_ENCODER_MODE_DP_MST)) |
|
extern enum radeon_tv_std |
radeon_combios_get_tv_info(struct radeon_device *rdev); |
464,28 → 496,37 |
|
extern struct drm_connector * |
radeon_get_connector_for_encoder(struct drm_encoder *encoder); |
extern struct drm_connector * |
radeon_get_connector_for_encoder_init(struct drm_encoder *encoder); |
extern bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder, |
u32 pixel_clock); |
|
extern bool radeon_encoder_is_dp_bridge(struct drm_encoder *encoder); |
extern bool radeon_connector_encoder_is_dp_bridge(struct drm_connector *connector); |
extern u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder); |
extern u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector); |
extern bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector); |
extern bool radeon_connector_is_dp12_capable(struct drm_connector *connector); |
extern int radeon_get_monitor_bpc(struct drm_connector *connector); |
|
extern void radeon_connector_hotplug(struct drm_connector *connector); |
extern int radeon_dp_mode_valid_helper(struct drm_connector *connector, |
struct drm_display_mode *mode); |
extern void radeon_dp_set_link_config(struct drm_connector *connector, |
struct drm_display_mode *mode); |
const struct drm_display_mode *mode); |
extern void radeon_dp_link_train(struct drm_encoder *encoder, |
struct drm_connector *connector); |
extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector); |
extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector); |
extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector); |
extern int radeon_dp_get_panel_mode(struct drm_encoder *encoder, |
struct drm_connector *connector); |
extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode); |
extern void radeon_atom_encoder_init(struct radeon_device *rdev); |
extern void radeon_atom_disp_eng_pll_init(struct radeon_device *rdev); |
extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder, |
int action, uint8_t lane_num, |
uint8_t lane_set); |
extern void radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder); |
extern struct drm_encoder *radeon_atom_get_external_encoder(struct drm_encoder *encoder); |
extern struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder); |
extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, |
u8 write_byte, u8 *read_byte); |
|
515,8 → 556,7 |
u8 val); |
extern void radeon_router_select_ddc_port(struct radeon_connector *radeon_connector); |
extern void radeon_router_select_cd_port(struct radeon_connector *radeon_connector); |
extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector, |
bool requires_extended_probe); |
extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector); |
extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector); |
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extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector); |
639,9 → 679,9 |
u16 blue, int regno); |
extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, |
u16 *blue, int regno); |
void radeon_framebuffer_init(struct drm_device *dev, |
int radeon_framebuffer_init(struct drm_device *dev, |
struct radeon_framebuffer *rfb, |
struct drm_mode_fb_cmd *mode_cmd, |
struct drm_mode_fb_cmd2 *mode_cmd, |
struct drm_gem_object *obj); |
|
int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb); |
661,7 → 701,7 |
void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj); |
void radeon_combios_asic_init(struct drm_device *dev); |
bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, |
struct drm_display_mode *mode, |
const struct drm_display_mode *mode, |
struct drm_display_mode *adjusted_mode); |
void radeon_panel_mode_fixup(struct drm_encoder *encoder, |
struct drm_display_mode *adjusted_mode); |