| 385,7 → 385,7 |
|---|
| |
| DRM_DEBUG_KMS("\n"); |
| /* no fb bound */ |
| if (!atomic && !crtc->fb) { |
| if (!atomic && !crtc->primary->fb) { |
| DRM_DEBUG_KMS("No FB bound\n"); |
| return 0; |
| } |
| 395,8 → 395,8 |
|---|
| target_fb = fb; |
| } |
| else { |
| radeon_fb = to_radeon_framebuffer(crtc->fb); |
| target_fb = crtc->fb; |
| radeon_fb = to_radeon_framebuffer(crtc->primary->fb); |
| target_fb = crtc->primary->fb; |
| } |
| |
| switch (target_fb->bits_per_pixel) { |
| 422,6 → 422,7 |
|---|
| /* Pin framebuffer & get tilling informations */ |
| obj = radeon_fb->obj; |
| rbo = gem_to_radeon_bo(obj); |
| retry: |
| r = radeon_bo_reserve(rbo, false); |
| if (unlikely(r != 0)) |
| return r; |
| 430,6 → 431,33 |
|---|
| &base); |
| if (unlikely(r != 0)) { |
| radeon_bo_unreserve(rbo); |
| |
| /* On old GPU like RN50 with little vram pining can fails because |
| * current fb is taking all space needed. So instead of unpining |
| * the old buffer after pining the new one, first unpin old one |
| * and then retry pining new one. |
| * |
| * As only master can set mode only master can pin and it is |
| * unlikely the master client will race with itself especialy |
| * on those old gpu with single crtc. |
| * |
| * We don't shutdown the display controller because new buffer |
| * will end up in same spot. |
| */ |
| if (!atomic && fb && fb != crtc->primary->fb) { |
| struct radeon_bo *old_rbo; |
| unsigned long nsize, osize; |
| |
| old_rbo = gem_to_radeon_bo(to_radeon_framebuffer(fb)->obj); |
| osize = radeon_bo_size(old_rbo); |
| nsize = radeon_bo_size(rbo); |
| if (nsize <= osize && !radeon_bo_reserve(old_rbo, false)) { |
| radeon_bo_unpin(old_rbo); |
| radeon_bo_unreserve(old_rbo); |
| fb = NULL; |
| goto retry; |
| } |
| } |
| return -EINVAL; |
| } |
| radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL); |
| 527,7 → 555,7 |
|---|
| WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, crtc_offset); |
| WREG32(RADEON_CRTC_PITCH + radeon_crtc->crtc_offset, crtc_pitch); |
| |
| if (!atomic && fb && fb != crtc->fb) { |
| if (!atomic && fb && fb != crtc->primary->fb) { |
| radeon_fb = to_radeon_framebuffer(fb); |
| rbo = gem_to_radeon_bo(radeon_fb->obj); |
| r = radeon_bo_reserve(rbo, false); |
| 571,7 → 599,7 |
|---|
| } |
| } |
| |
| switch (crtc->fb->bits_per_pixel) { |
| switch (crtc->primary->fb->bits_per_pixel) { |
| case 8: |
| format = 2; |
| break; |
| 1056,6 → 1084,26 |
|---|
| } |
| } |
| |
| static void radeon_crtc_disable(struct drm_crtc *crtc) |
| { |
| radeon_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); |
| if (crtc->primary->fb) { |
| int r; |
| struct radeon_framebuffer *radeon_fb; |
| struct radeon_bo *rbo; |
| |
| radeon_fb = to_radeon_framebuffer(crtc->primary->fb); |
| rbo = gem_to_radeon_bo(radeon_fb->obj); |
| r = radeon_bo_reserve(rbo, false); |
| if (unlikely(r)) |
| DRM_ERROR("failed to reserve rbo before unpin\n"); |
| else { |
| radeon_bo_unpin(rbo); |
| radeon_bo_unreserve(rbo); |
| } |
| } |
| } |
| |
| static const struct drm_crtc_helper_funcs legacy_helper_funcs = { |
| .dpms = radeon_crtc_dpms, |
| .mode_fixup = radeon_crtc_mode_fixup, |
| 1065,6 → 1113,7 |
|---|
| .prepare = radeon_crtc_prepare, |
| .commit = radeon_crtc_commit, |
| .load_lut = radeon_crtc_load_lut, |
| .disable = radeon_crtc_disable |
| }; |
| |
| |