| /drivers/video/drm/radeon/radeon_clocks.c |
|---|
| 102,10 → 102,12 |
| p1pll->reference_div = 12; |
| if (p2pll->reference_div < 2) |
| p2pll->reference_div = 12; |
| if (rdev->family < CHIP_RS600) { |
| if (spll->reference_div < 2) |
| spll->reference_div = |
| RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & |
| RADEON_M_SPLL_REF_DIV_MASK; |
| } |
| if (mpll->reference_div < 2) |
| mpll->reference_div = spll->reference_div; |
| } else { |