332,7 → 332,7 |
|
seprom_cntl1 = RREG32(RADEON_SEPROM_CNTL1); |
viph_control = RREG32(RADEON_VIPH_CONTROL); |
bus_cntl = RREG32(RADEON_BUS_CNTL); |
bus_cntl = RREG32(RV370_BUS_CNTL); |
d1vga_control = RREG32(AVIVO_D1VGA_CONTROL); |
d2vga_control = RREG32(AVIVO_D2VGA_CONTROL); |
vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL); |
351,7 → 351,7 |
WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN)); |
|
/* enable the rom */ |
WREG32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM)); |
WREG32(RV370_BUS_CNTL, (bus_cntl & ~RV370_BUS_BIOS_DIS_ROM)); |
|
/* Disable VGA mode */ |
WREG32(AVIVO_D1VGA_CONTROL, |
368,7 → 368,7 |
/* restore regs */ |
WREG32(RADEON_SEPROM_CNTL1, seprom_cntl1); |
WREG32(RADEON_VIPH_CONTROL, viph_control); |
WREG32(RADEON_BUS_CNTL, bus_cntl); |
WREG32(RV370_BUS_CNTL, bus_cntl); |
WREG32(AVIVO_D1VGA_CONTROL, d1vga_control); |
WREG32(AVIVO_D2VGA_CONTROL, d2vga_control); |
WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control); |
391,6 → 391,9 |
|
seprom_cntl1 = RREG32(RADEON_SEPROM_CNTL1); |
viph_control = RREG32(RADEON_VIPH_CONTROL); |
if (rdev->flags & RADEON_IS_PCIE) |
bus_cntl = RREG32(RV370_BUS_CNTL); |
else |
bus_cntl = RREG32(RADEON_BUS_CNTL); |
crtc_gen_cntl = RREG32(RADEON_CRTC_GEN_CNTL); |
crtc2_gen_cntl = 0; |
413,6 → 416,9 |
WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN)); |
|
/* enable the rom */ |
if (rdev->flags & RADEON_IS_PCIE) |
WREG32(RV370_BUS_CNTL, (bus_cntl & ~RV370_BUS_BIOS_DIS_ROM)); |
else |
WREG32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM)); |
|
/* Turn off mem requests and CRTC for both controllers */ |
440,6 → 446,9 |
/* restore regs */ |
WREG32(RADEON_SEPROM_CNTL1, seprom_cntl1); |
WREG32(RADEON_VIPH_CONTROL, viph_control); |
if (rdev->flags & RADEON_IS_PCIE) |
WREG32(RV370_BUS_CNTL, bus_cntl); |
else |
WREG32(RADEON_BUS_CNTL, bus_cntl); |
WREG32(RADEON_CRTC_GEN_CNTL, crtc_gen_cntl); |
if (!(rdev->flags & RADEON_SINGLE_CRTC)) { |