| 1331,16 → 1331,15 |
|---|
| } |
| |
| static bool |
| intel_hdmi_set_edid(struct drm_connector *connector, bool force) |
| intel_hdmi_set_edid(struct drm_connector *connector) |
| { |
| struct drm_i915_private *dev_priv = to_i915(connector->dev); |
| struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector); |
| struct edid *edid = NULL; |
| struct edid *edid; |
| bool connected = false; |
| |
| intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS); |
| |
| if (force) |
| edid = drm_get_edid(connector, |
| intel_gmbus_get_adapter(dev_priv, |
| intel_hdmi->ddc_bus)); |
| 1371,10 → 1370,7 |
|---|
| intel_hdmi_detect(struct drm_connector *connector, bool force) |
| { |
| enum drm_connector_status status; |
| struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector); |
| struct drm_i915_private *dev_priv = to_i915(connector->dev); |
| bool live_status = false; |
| unsigned int try; |
| |
| DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", |
| connector->base.id, connector->name); |
| 1381,27 → 1377,9 |
|---|
| |
| intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS); |
| |
| for (try = 0; !live_status && try < 9; try++) { |
| if (try) |
| msleep(10); |
| live_status = intel_digital_port_connected(dev_priv, |
| hdmi_to_dig_port(intel_hdmi)); |
| } |
| |
| if (!live_status) { |
| DRM_DEBUG_KMS("HDMI live status down\n"); |
| /* |
| * Live status register is not reliable on all intel platforms. |
| * So consider live_status only for certain platforms, for |
| * others, read EDID to determine presence of sink. |
| */ |
| if (INTEL_INFO(dev_priv)->gen < 7 || IS_IVYBRIDGE(dev_priv)) |
| live_status = true; |
| } |
| |
| intel_hdmi_unset_edid(connector); |
| |
| if (intel_hdmi_set_edid(connector, live_status)) { |
| if (intel_hdmi_set_edid(connector)) { |
| struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector); |
| |
| hdmi_to_dig_port(intel_hdmi)->base.type = INTEL_OUTPUT_HDMI; |
| 1427,7 → 1405,7 |
|---|
| if (connector->status != connector_status_connected) |
| return; |
| |
| intel_hdmi_set_edid(connector, true); |
| intel_hdmi_set_edid(connector); |
| hdmi_to_dig_port(intel_hdmi)->base.type = INTEL_OUTPUT_HDMI; |
| } |
| |
| 2019,6 → 1997,50 |
|---|
| intel_hdmi->aspect_ratio = HDMI_PICTURE_ASPECT_NONE; |
| } |
| |
| static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv, |
| enum port port) |
| { |
| const struct ddi_vbt_port_info *info = |
| &dev_priv->vbt.ddi_port_info[port]; |
| u8 ddc_pin; |
| |
| if (info->alternate_ddc_pin) { |
| DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (VBT)\n", |
| info->alternate_ddc_pin, port_name(port)); |
| return info->alternate_ddc_pin; |
| } |
| |
| switch (port) { |
| case PORT_B: |
| if (IS_BROXTON(dev_priv)) |
| ddc_pin = GMBUS_PIN_1_BXT; |
| else |
| ddc_pin = GMBUS_PIN_DPB; |
| break; |
| case PORT_C: |
| if (IS_BROXTON(dev_priv)) |
| ddc_pin = GMBUS_PIN_2_BXT; |
| else |
| ddc_pin = GMBUS_PIN_DPC; |
| break; |
| case PORT_D: |
| if (IS_CHERRYVIEW(dev_priv)) |
| ddc_pin = GMBUS_PIN_DPD_CHV; |
| else |
| ddc_pin = GMBUS_PIN_DPD; |
| break; |
| default: |
| MISSING_CASE(port); |
| ddc_pin = GMBUS_PIN_DPB; |
| break; |
| } |
| |
| DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (platform default)\n", |
| ddc_pin, port_name(port)); |
| |
| return ddc_pin; |
| } |
| |
| void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port, |
| struct intel_connector *intel_connector) |
| { |
| 2028,7 → 2050,6 |
|---|
| struct drm_device *dev = intel_encoder->base.dev; |
| struct drm_i915_private *dev_priv = dev->dev_private; |
| enum port port = intel_dig_port->port; |
| uint8_t alternate_ddc_pin; |
| |
| DRM_DEBUG_KMS("Adding HDMI connector on port %c\n", |
| port_name(port)); |
| 2041,12 → 2062,10 |
|---|
| connector->doublescan_allowed = 0; |
| connector->stereo_allowed = 1; |
| |
| intel_hdmi->ddc_bus = intel_hdmi_ddc_pin(dev_priv, port); |
| |
| switch (port) { |
| case PORT_B: |
| if (IS_BROXTON(dev_priv)) |
| intel_hdmi->ddc_bus = GMBUS_PIN_1_BXT; |
| else |
| intel_hdmi->ddc_bus = GMBUS_PIN_DPB; |
| /* |
| * On BXT A0/A1, sw needs to activate DDIA HPD logic and |
| * interrupts to check the external panel connection. |
| 2057,46 → 2076,17 |
|---|
| intel_encoder->hpd_pin = HPD_PORT_B; |
| break; |
| case PORT_C: |
| if (IS_BROXTON(dev_priv)) |
| intel_hdmi->ddc_bus = GMBUS_PIN_2_BXT; |
| else |
| intel_hdmi->ddc_bus = GMBUS_PIN_DPC; |
| intel_encoder->hpd_pin = HPD_PORT_C; |
| break; |
| case PORT_D: |
| if (WARN_ON(IS_BROXTON(dev_priv))) |
| intel_hdmi->ddc_bus = GMBUS_PIN_DISABLED; |
| else if (IS_CHERRYVIEW(dev_priv)) |
| intel_hdmi->ddc_bus = GMBUS_PIN_DPD_CHV; |
| else |
| intel_hdmi->ddc_bus = GMBUS_PIN_DPD; |
| intel_encoder->hpd_pin = HPD_PORT_D; |
| break; |
| case PORT_E: |
| /* On SKL PORT E doesn't have seperate GMBUS pin |
| * We rely on VBT to set a proper alternate GMBUS pin. */ |
| alternate_ddc_pin = |
| dev_priv->vbt.ddi_port_info[PORT_E].alternate_ddc_pin; |
| switch (alternate_ddc_pin) { |
| case DDC_PIN_B: |
| intel_hdmi->ddc_bus = GMBUS_PIN_DPB; |
| break; |
| case DDC_PIN_C: |
| intel_hdmi->ddc_bus = GMBUS_PIN_DPC; |
| break; |
| case DDC_PIN_D: |
| intel_hdmi->ddc_bus = GMBUS_PIN_DPD; |
| break; |
| default: |
| MISSING_CASE(alternate_ddc_pin); |
| } |
| intel_encoder->hpd_pin = HPD_PORT_E; |
| break; |
| case PORT_A: |
| intel_encoder->hpd_pin = HPD_PORT_A; |
| /* Internal port only for eDP. */ |
| default: |
| BUG(); |
| MISSING_CASE(port); |
| return; |
| } |
| |
| if (IS_VALLEYVIEW(dev)) { |