39,7 → 39,7 |
u8 reserved0; |
u32 bdb_offset; /**< from beginning of VBT */ |
u32 aim_offset[4]; /**< from beginning of VBT */ |
} __attribute__((packed)); |
} __packed; |
|
struct bdb_header { |
u8 signature[16]; /**< Always 'BIOS_DATA_BLOCK' */ |
65,7 → 65,7 |
u8 rsvd4; /* popup memory size */ |
u8 resize_pci_bios; |
u8 rsvd5; /* is crt already on ddc2 */ |
} __attribute__((packed)); |
} __packed; |
|
/* |
* There are several types of BIOS data blocks (BDBs), each block has |
104,6 → 104,7 |
#define BDB_LVDS_LFP_DATA 42 |
#define BDB_LVDS_BACKLIGHT 43 |
#define BDB_LVDS_POWER 44 |
#define BDB_MIPI 50 |
#define BDB_SKIP 254 /* VBIOS private block, ignore */ |
|
struct bdb_general_features { |
141,7 → 142,7 |
u8 dp_ssc_enb:1; /* PCH attached eDP supports SSC */ |
u8 dp_ssc_freq:1; /* SSC freq for PCH attached eDP */ |
u8 rsvd11:3; /* finish byte */ |
} __attribute__((packed)); |
} __packed; |
|
/* pre-915 */ |
#define GPIO_PIN_DVI_LVDS 0x03 /* "DVI/LVDS DDC GPIO pins" */ |
201,7 → 202,10 |
#define DEVICE_PORT_DVOB 0x01 |
#define DEVICE_PORT_DVOC 0x02 |
|
struct child_device_config { |
/* We used to keep this struct but without any version control. We should avoid |
* using it in the future, but it should be safe to keep using it in the old |
* code. */ |
struct old_child_dev_config { |
u16 handle; |
u16 device_type; |
u8 device_id[10]; /* ascii string */ |
221,8 → 225,34 |
u8 dvo2_wiring; |
u16 extended_type; |
u8 dvo_function; |
} __attribute__((packed)); |
} __packed; |
|
/* This one contains field offsets that are known to be common for all BDB |
* versions. Notice that the meaning of the contents contents may still change, |
* but at least the offsets are consistent. */ |
struct common_child_dev_config { |
u16 handle; |
u16 device_type; |
u8 not_common1[12]; |
u8 dvo_port; |
u8 not_common2[2]; |
u8 ddc_pin; |
u16 edid_ptr; |
} __packed; |
|
/* This field changes depending on the BDB version, so the most reliable way to |
* read it is by checking the BDB version and reading the raw pointer. */ |
union child_device_config { |
/* This one is safe to be used anywhere, but the code should still check |
* the BDB version. */ |
u8 raw[33]; |
/* This one should only be kept for legacy code. */ |
struct old_child_dev_config old; |
/* This one should also be safe to use anywhere, even without version |
* checks. */ |
struct common_child_dev_config common; |
}; |
|
struct bdb_general_definitions { |
/* DDC GPIO */ |
u8 crt_ddc_gmbus_pin; |
248,8 → 278,8 |
* number = (block_size - sizeof(bdb_general_definitions))/ |
* sizeof(child_device_config); |
*/ |
struct child_device_config devices[0]; |
} __attribute__((packed)); |
union child_device_config devices[0]; |
} __packed; |
|
struct bdb_lvds_options { |
u8 panel_type; |
263,7 → 293,7 |
u8 lvds_edid:1; |
u8 rsvd2:1; |
u8 rsvd4; |
} __attribute__((packed)); |
} __packed; |
|
/* LFP pointer table contains entries to the struct below */ |
struct bdb_lvds_lfp_data_ptr { |
273,12 → 303,12 |
u8 dvo_table_size; |
u16 panel_pnp_id_offset; |
u8 pnp_table_size; |
} __attribute__((packed)); |
} __packed; |
|
struct bdb_lvds_lfp_data_ptrs { |
u8 lvds_entries; /* followed by one or more lvds_data_ptr structs */ |
struct bdb_lvds_lfp_data_ptr ptr[16]; |
} __attribute__((packed)); |
} __packed; |
|
/* LFP data has 3 blocks per entry */ |
struct lvds_fp_timing { |
295,7 → 325,7 |
u32 pfit_reg; |
u32 pfit_reg_val; |
u16 terminator; |
} __attribute__((packed)); |
} __packed; |
|
struct lvds_dvo_timing { |
u16 clock; /**< In 10khz */ |
323,7 → 353,7 |
u8 vsync_positive:1; |
u8 hsync_positive:1; |
u8 rsvd2:1; |
} __attribute__((packed)); |
} __packed; |
|
struct lvds_pnp_id { |
u16 mfg_name; |
331,18 → 361,34 |
u32 serial; |
u8 mfg_week; |
u8 mfg_year; |
} __attribute__((packed)); |
} __packed; |
|
struct bdb_lvds_lfp_data_entry { |
struct lvds_fp_timing fp_timing; |
struct lvds_dvo_timing dvo_timing; |
struct lvds_pnp_id pnp_id; |
} __attribute__((packed)); |
} __packed; |
|
struct bdb_lvds_lfp_data { |
struct bdb_lvds_lfp_data_entry data[16]; |
} __attribute__((packed)); |
} __packed; |
|
struct bdb_lfp_backlight_data_entry { |
u8 type:2; |
u8 active_low_pwm:1; |
u8 obsolete1:5; |
u16 pwm_freq_hz; |
u8 min_brightness; |
u8 obsolete2; |
u8 obsolete3; |
} __packed; |
|
struct bdb_lfp_backlight_data { |
u8 entry_size; |
struct bdb_lfp_backlight_data_entry data[16]; |
u8 level[16]; |
} __packed; |
|
struct aimdb_header { |
char signature[16]; |
char oem_device[20]; |
349,12 → 395,12 |
u16 aimdb_version; |
u16 aimdb_header_size; |
u16 aimdb_size; |
} __attribute__((packed)); |
} __packed; |
|
struct aimdb_block { |
u8 aimdb_id; |
u16 aimdb_size; |
} __attribute__((packed)); |
} __packed; |
|
struct vch_panel_data { |
u16 fp_timing_offset; |
365,12 → 411,12 |
u8 text_fitting_size; |
u16 graphics_fitting_offset; |
u8 graphics_fitting_size; |
} __attribute__((packed)); |
} __packed; |
|
struct vch_bdb_22 { |
struct aimdb_block aimdb_block; |
struct vch_panel_data panels[16]; |
} __attribute__((packed)); |
} __packed; |
|
struct bdb_sdvo_lvds_options { |
u8 panel_backlight; |
386,7 → 432,7 |
u8 panel_misc_bits_2; |
u8 panel_misc_bits_3; |
u8 panel_misc_bits_4; |
} __attribute__((packed)); |
} __packed; |
|
|
#define BDB_DRIVER_FEATURE_NO_LVDS 0 |
432,7 → 478,7 |
|
u8 hdmi_termination; |
u8 custom_vbt_version; |
} __attribute__((packed)); |
} __packed; |
|
#define EDP_18BPP 0 |
#define EDP_24BPP 1 |
457,7 → 503,7 |
u16 t9; |
u16 t10; |
u16 t11_t12; |
} __attribute__ ((packed)); |
} __packed; |
|
struct edp_link_params { |
u8 rate:4; |
464,7 → 510,7 |
u8 lanes:4; |
u8 preemphasis:4; |
u8 vswing:4; |
} __attribute__ ((packed)); |
} __packed; |
|
struct bdb_edp { |
struct edp_power_seq power_seqs[16]; |
475,7 → 521,7 |
/* ith bit indicates enabled/disabled for (i+1)th panel */ |
u16 edp_s3d_feature; |
u16 edp_t3_optimization; |
} __attribute__ ((packed)); |
} __packed; |
|
void intel_setup_bios(struct drm_device *dev); |
int intel_parse_bios(struct drm_device *dev); |
608,6 → 654,40 |
#define DEVICE_TYPE_DP 0x68C6 |
#define DEVICE_TYPE_eDP 0x78C6 |
|
#define DEVICE_TYPE_CLASS_EXTENSION (1 << 15) |
#define DEVICE_TYPE_POWER_MANAGEMENT (1 << 14) |
#define DEVICE_TYPE_HOTPLUG_SIGNALING (1 << 13) |
#define DEVICE_TYPE_INTERNAL_CONNECTOR (1 << 12) |
#define DEVICE_TYPE_NOT_HDMI_OUTPUT (1 << 11) |
#define DEVICE_TYPE_MIPI_OUTPUT (1 << 10) |
#define DEVICE_TYPE_COMPOSITE_OUTPUT (1 << 9) |
#define DEVICE_TYPE_DUAL_CHANNEL (1 << 8) |
#define DEVICE_TYPE_HIGH_SPEED_LINK (1 << 6) |
#define DEVICE_TYPE_LVDS_SINGALING (1 << 5) |
#define DEVICE_TYPE_TMDS_DVI_SIGNALING (1 << 4) |
#define DEVICE_TYPE_VIDEO_SIGNALING (1 << 3) |
#define DEVICE_TYPE_DISPLAYPORT_OUTPUT (1 << 2) |
#define DEVICE_TYPE_DIGITAL_OUTPUT (1 << 1) |
#define DEVICE_TYPE_ANALOG_OUTPUT (1 << 0) |
|
/* |
* Bits we care about when checking for DEVICE_TYPE_eDP |
* Depending on the system, the other bits may or may not |
* be set for eDP outputs. |
*/ |
#define DEVICE_TYPE_eDP_BITS \ |
(DEVICE_TYPE_INTERNAL_CONNECTOR | \ |
DEVICE_TYPE_NOT_HDMI_OUTPUT | \ |
DEVICE_TYPE_MIPI_OUTPUT | \ |
DEVICE_TYPE_COMPOSITE_OUTPUT | \ |
DEVICE_TYPE_DUAL_CHANNEL | \ |
DEVICE_TYPE_LVDS_SINGALING | \ |
DEVICE_TYPE_TMDS_DVI_SIGNALING | \ |
DEVICE_TYPE_VIDEO_SIGNALING | \ |
DEVICE_TYPE_DISPLAYPORT_OUTPUT | \ |
DEVICE_TYPE_DIGITAL_OUTPUT | \ |
DEVICE_TYPE_ANALOG_OUTPUT) |
|
/* define the DVO port for HDMI output type */ |
#define DVO_B 1 |
#define DVO_C 2 |
618,4 → 698,57 |
#define PORT_IDPC 8 |
#define PORT_IDPD 9 |
|
/* Possible values for the "DVO Port" field for versions >= 155: */ |
#define DVO_PORT_HDMIA 0 |
#define DVO_PORT_HDMIB 1 |
#define DVO_PORT_HDMIC 2 |
#define DVO_PORT_HDMID 3 |
#define DVO_PORT_LVDS 4 |
#define DVO_PORT_TV 5 |
#define DVO_PORT_CRT 6 |
#define DVO_PORT_DPB 7 |
#define DVO_PORT_DPC 8 |
#define DVO_PORT_DPD 9 |
#define DVO_PORT_DPA 10 |
|
/* MIPI DSI panel info */ |
struct bdb_mipi { |
u16 panel_id; |
u16 bridge_revision; |
|
/* General params */ |
u32 dithering:1; |
u32 bpp_pixel_format:1; |
u32 rsvd1:1; |
u32 dphy_valid:1; |
u32 resvd2:28; |
|
u16 port_info; |
u16 rsvd3:2; |
u16 num_lanes:2; |
u16 rsvd4:12; |
|
/* DSI config */ |
u16 virt_ch_num:2; |
u16 vtm:2; |
u16 rsvd5:12; |
|
u32 dsi_clock; |
u32 bridge_ref_clk; |
u16 rsvd_pwr; |
|
/* Dphy Params */ |
u32 prepare_cnt:5; |
u32 rsvd6:3; |
u32 clk_zero_cnt:8; |
u32 trail_cnt:5; |
u32 rsvd7:3; |
u32 exit_zero_cnt:6; |
u32 rsvd8:2; |
|
u32 hl_switch_cnt; |
u32 lp_byte_clk; |
u32 clk_lane_switch_cnt; |
} __packed; |
|
#endif /* _I830_BIOS_H_ */ |