| 18,7 → 18,7 |
|---|
| #define trace_i915_gem_request_wait_end(a, b) |
| #define trace_i915_gem_request_complete(a, b) |
| #define trace_intel_gpu_freq_change(a) |
| #define trace_i915_reg_rw(a, b, c, d) |
| #define trace_i915_reg_rw(a, b, c, d, e) |
| #define trace_i915_ring_wait_begin(a) |
| #define trace_i915_gem_object_pwrite(a, b, c) |
| #define trace_i915_gem_request_add(a, b) |
| 26,6 → 26,5 |
|---|
| #define trace_i915_vma_bind(a, b) |
| #define trace_i915_vma_unbind(a) |
| #define trace_i915_gem_object_clflush(a) |
| #define trace_i915_reg_rw(a, b, c, d, e) |
| |
| #endif |