| 198,6 → 198,8 |
|---|
| #define DRM_I915_OVERLAY_PUT_IMAGE 0x27 |
| #define DRM_I915_OVERLAY_ATTRS 0x28 |
| #define DRM_I915_GEM_EXECBUFFER2 0x29 |
| #define DRM_I915_GET_SPRITE_COLORKEY 0x2a |
| #define DRM_I915_SET_SPRITE_COLORKEY 0x2b |
| |
| #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) |
| #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) |
| 239,6 → 241,8 |
|---|
| #define DRM_IOCTL_I915_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MADVISE, struct drm_i915_gem_madvise) |
| #define DRM_IOCTL_I915_OVERLAY_PUT_IMAGE DRM_IOW(DRM_COMMAND_BASE + DRM_I915_OVERLAY_PUT_IMAGE, struct drm_intel_overlay_put_image) |
| #define DRM_IOCTL_I915_OVERLAY_ATTRS DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_OVERLAY_ATTRS, struct drm_intel_overlay_attrs) |
| #define DRM_IOCTL_I915_SET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey) |
| #define DRM_IOCTL_I915_GET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey) |
| |
| /* Allow drivers to submit batchbuffers directly to hardware, relying |
| * on the security mechanisms provided by hardware. |
| 291,6 → 295,7 |
|---|
| #define I915_PARAM_HAS_COHERENT_RINGS 13 |
| #define I915_PARAM_HAS_EXEC_CONSTANTS 14 |
| #define I915_PARAM_HAS_RELAXED_DELTA 15 |
| #define I915_PARAM_HAS_GEN7_SOL_RESET 16 |
| |
| typedef struct drm_i915_getparam { |
| int param; |
| 653,6 → 658,9 |
|---|
| __u64 rsvd2; |
| }; |
| |
| /** Resets the SO write offset registers for transform feedback on gen7. */ |
| #define I915_EXEC_GEN7_SOL_RESET (1<<8) |
| |
| struct drm_i915_gem_pin { |
| /** Handle of the buffer to be pinned. */ |
| __u32 handle; |
| 844,4 → 852,36 |
|---|
| __u32 gamma5; |
| }; |
| |
| /* |
| * Intel sprite handling |
| * |
| * Color keying works with a min/mask/max tuple. Both source and destination |
| * color keying is allowed. |
| * |
| * Source keying: |
| * Sprite pixels within the min & max values, masked against the color channels |
| * specified in the mask field, will be transparent. All other pixels will |
| * be displayed on top of the primary plane. For RGB surfaces, only the min |
| * and mask fields will be used; ranged compares are not allowed. |
| * |
| * Destination keying: |
| * Primary plane pixels that match the min value, masked against the color |
| * channels specified in the mask field, will be replaced by corresponding |
| * pixels from the sprite plane. |
| * |
| * Note that source & destination keying are exclusive; only one can be |
| * active on a given plane. |
| */ |
| |
| #define I915_SET_COLORKEY_NONE (1<<0) /* disable color key matching */ |
| #define I915_SET_COLORKEY_DESTINATION (1<<1) |
| #define I915_SET_COLORKEY_SOURCE (1<<2) |
| struct drm_intel_sprite_colorkey { |
| __u32 plane_id; |
| __u32 min_value; |
| __u32 channel_mask; |
| __u32 max_value; |
| __u32 flags; |
| }; |
| |
| #endif /* _I915_DRM_H_ */ |