| /drivers/video/drm/i915/intel_dp.c |
|---|
| 1585,6 → 1585,10 |
| pipe_config->adjusted_mode.flags |= flags; |
| if (!HAS_PCH_SPLIT(dev) && !IS_VALLEYVIEW(dev) && |
| tmp & DP_COLOR_RANGE_16_235) |
| pipe_config->limited_color_range = true; |
| pipe_config->has_dp_encoder = true; |
| intel_dp_get_m_n(crtc, pipe_config); |
| /drivers/video/drm/i915/intel_hdmi.c |
|---|
| 712,7 → 712,8 |
| struct intel_crtc_config *pipe_config) |
| { |
| struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); |
| struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; |
| struct drm_device *dev = encoder->base.dev; |
| struct drm_i915_private *dev_priv = dev->dev_private; |
| u32 tmp, flags = 0; |
| int dotclock; |
| 734,6 → 735,10 |
| if (tmp & HDMI_MODE_SELECT_HDMI) |
| pipe_config->has_audio = true; |
| if (!HAS_PCH_SPLIT(dev) && |
| tmp & HDMI_COLOR_RANGE_16_235) |
| pipe_config->limited_color_range = true; |
| pipe_config->adjusted_mode.flags |= flags; |
| if ((tmp & SDVO_COLOR_FORMAT_MASK) == HDMI_COLOR_FORMAT_12bpc) |
| /drivers/video/drm/i915/intel_ringbuffer.c |
|---|
| 1397,7 → 1397,7 |
| */ |
| intel_ring_emit(ring, SRC_COPY_BLT_CMD | BLT_WRITE_RGBA); |
| intel_ring_emit(ring, BLT_DEPTH_32 | BLT_ROP_SRC_COPY | 4096); |
| intel_ring_emit(ring, DIV_ROUND_UP(len, 4096) << 16 | 1024); |
| intel_ring_emit(ring, DIV_ROUND_UP(len, 4096) << 16 | 4096); |
| intel_ring_emit(ring, cs_offset); |
| intel_ring_emit(ring, 4096); |
| intel_ring_emit(ring, offset); |