190,7 → 190,7 |
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; Enable power |
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invoke PciRead8, [bus], [devfn], 0x14 ; get capabilities offset |
invoke PciRead8, [bus], [devfn], PCI_header02.cap_list_offs ; get capabilities offset |
movzx eax, al ; (A0 for TI bridges) |
DEBUGF 1, "Capabilities offset=0x%x\n", eax:2 |
add al, 4 ; Power management control/status |
198,7 → 198,7 |
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; Enable Bus master, io space, memory space |
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invoke PciWrite16, [bus], [devfn], PCI_header02.command, 0x0007 |
invoke PciWrite16, [bus], [devfn], PCI_header02.command, PCI_CMD_PIO or PCI_CMD_MMIO or PCI_CMD_MASTER |
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; Write CardBus Socket/ExCA base address |
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