| /drivers/include/linux/delay.h |
|---|
| 6,4 → 6,7 |
| * |
| * Delay routines, using a pre-computed "loops_per_jiffy" value. |
| */ |
| #define usleep_range(min, max) udelay(max) |
| #endif /* defined(_LINUX_DELAY_H) */ |
| /drivers/include/linux/file.h |
|---|
| 0,0 → 1,7 |
| /* |
| * Wrapper functions for accessing the file_struct fd array. |
| */ |
| #ifndef __LINUX_FILE_H |
| #define __LINUX_FILE_H |
| #endif /* __LINUX_FILE_H */ |
| /drivers/include/linux/fs.h |
|---|
| 0,0 → 1,3 |
| #ifndef _LINUX_FS_H |
| #define _LINUX_FS_H |
| #endif /* _LINUX_FS_H */ |
| /drivers/include/linux/kernel.h |
|---|
| 36,10 → 36,29 |
| #define PTR_ALIGN(p, a) ((typeof(p))ALIGN((unsigned long)(p), (a))) |
| #define IS_ALIGNED(x, a) (((x) & ((typeof(x))(a) - 1)) == 0) |
| #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr)) |
| /* |
| * This looks more complex than it should be. But we need to |
| * get the type for the ~ right in round_down (it needs to be |
| * as wide as the result!), and we want to evaluate the macro |
| * arguments just once each. |
| */ |
| #define __round_mask(x, y) ((__typeof__(x))((y)-1)) |
| #define round_up(x, y) ((((x)-1) | __round_mask(x, y))+1) |
| #define round_down(x, y) ((x) & ~__round_mask(x, y)) |
| #define FIELD_SIZEOF(t, f) (sizeof(((t*)0)->f)) |
| #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) |
| #define DIV_ROUND_UP_ULL(ll,d) \ |
| ({ unsigned long long _tmp = (ll)+(d)-1; do_div(_tmp, d); _tmp; }) |
| #if BITS_PER_LONG == 32 |
| # define DIV_ROUND_UP_SECTOR_T(ll,d) DIV_ROUND_UP_ULL(ll, d) |
| #else |
| # define DIV_ROUND_UP_SECTOR_T(ll,d) DIV_ROUND_UP(ll,d) |
| #endif |
| /* The `const' in roundup() prevents gcc-3.3 from calling __divdi3 */ |
| #define roundup(x, y) ( \ |
| { \ |
| 47,17 → 66,40 |
| (((x) + (__y - 1)) / __y) * __y; \ |
| } \ |
| ) |
| #define rounddown(x, y) ( \ |
| { \ |
| typeof(x) __x = (x); \ |
| __x - (__x % (y)); \ |
| } \ |
| ) |
| #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) |
| #define DIV_ROUND_UP_ULL(ll,d) \ |
| ({ unsigned long long _tmp = (ll)+(d)-1; do_div(_tmp, d); _tmp; }) |
| /* |
| * Divide positive or negative dividend by positive divisor and round |
| * to closest integer. Result is undefined for negative divisors and |
| * for negative dividends if the divisor variable type is unsigned. |
| */ |
| #define DIV_ROUND_CLOSEST(x, divisor)( \ |
| { \ |
| typeof(divisor) __divisor = divisor; \ |
| (((x) + ((__divisor) / 2)) / (__divisor)); \ |
| typeof(x) __x = x; \ |
| typeof(divisor) __d = divisor; \ |
| (((typeof(x))-1) > 0 || \ |
| ((typeof(divisor))-1) > 0 || (__x) > 0) ? \ |
| (((__x) + ((__d) / 2)) / (__d)) : \ |
| (((__x) - ((__d) / 2)) / (__d)); \ |
| } \ |
| ) |
| /* |
| * Multiplies an integer by a fraction, while avoiding unnecessary |
| * overflow or loss of precision. |
| */ |
| #define mult_frac(x, numer, denom)( \ |
| { \ |
| typeof(x) quot = (x) / (denom); \ |
| typeof(x) rem = (x) % (denom); \ |
| (quot * (numer)) + ((rem * (numer)) / (denom)); \ |
| } \ |
| ) |
| #define clamp_t(type, val, min, max) ({ \ |
| type __val = (val); \ |
| /drivers/include/linux/mipi_display.h |
|---|
| 0,0 → 1,130 |
| /* |
| * Defines for Mobile Industry Processor Interface (MIPI(R)) |
| * Display Working Group standards: DSI, DCS, DBI, DPI |
| * |
| * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de> |
| * Copyright (C) 2006 Nokia Corporation |
| * Author: Imre Deak <imre.deak@nokia.com> |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| */ |
| #ifndef MIPI_DISPLAY_H |
| #define MIPI_DISPLAY_H |
| /* MIPI DSI Processor-to-Peripheral transaction types */ |
| enum { |
| MIPI_DSI_V_SYNC_START = 0x01, |
| MIPI_DSI_V_SYNC_END = 0x11, |
| MIPI_DSI_H_SYNC_START = 0x21, |
| MIPI_DSI_H_SYNC_END = 0x31, |
| MIPI_DSI_COLOR_MODE_OFF = 0x02, |
| MIPI_DSI_COLOR_MODE_ON = 0x12, |
| MIPI_DSI_SHUTDOWN_PERIPHERAL = 0x22, |
| MIPI_DSI_TURN_ON_PERIPHERAL = 0x32, |
| MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM = 0x03, |
| MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM = 0x13, |
| MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM = 0x23, |
| MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM = 0x04, |
| MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM = 0x14, |
| MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM = 0x24, |
| MIPI_DSI_DCS_SHORT_WRITE = 0x05, |
| MIPI_DSI_DCS_SHORT_WRITE_PARAM = 0x15, |
| MIPI_DSI_DCS_READ = 0x06, |
| MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE = 0x37, |
| MIPI_DSI_END_OF_TRANSMISSION = 0x08, |
| MIPI_DSI_NULL_PACKET = 0x09, |
| MIPI_DSI_BLANKING_PACKET = 0x19, |
| MIPI_DSI_GENERIC_LONG_WRITE = 0x29, |
| MIPI_DSI_DCS_LONG_WRITE = 0x39, |
| MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20 = 0x0c, |
| MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24 = 0x1c, |
| MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16 = 0x2c, |
| MIPI_DSI_PACKED_PIXEL_STREAM_30 = 0x0d, |
| MIPI_DSI_PACKED_PIXEL_STREAM_36 = 0x1d, |
| MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12 = 0x3d, |
| MIPI_DSI_PACKED_PIXEL_STREAM_16 = 0x0e, |
| MIPI_DSI_PACKED_PIXEL_STREAM_18 = 0x1e, |
| MIPI_DSI_PIXEL_STREAM_3BYTE_18 = 0x2e, |
| MIPI_DSI_PACKED_PIXEL_STREAM_24 = 0x3e, |
| }; |
| /* MIPI DSI Peripheral-to-Processor transaction types */ |
| enum { |
| MIPI_DSI_RX_ACKNOWLEDGE_AND_ERROR_REPORT = 0x02, |
| MIPI_DSI_RX_END_OF_TRANSMISSION = 0x08, |
| MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_1BYTE = 0x11, |
| MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_2BYTE = 0x12, |
| MIPI_DSI_RX_GENERIC_LONG_READ_RESPONSE = 0x1a, |
| MIPI_DSI_RX_DCS_LONG_READ_RESPONSE = 0x1c, |
| MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_1BYTE = 0x21, |
| MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_2BYTE = 0x22, |
| }; |
| /* MIPI DCS commands */ |
| enum { |
| MIPI_DCS_NOP = 0x00, |
| MIPI_DCS_SOFT_RESET = 0x01, |
| MIPI_DCS_GET_DISPLAY_ID = 0x04, |
| MIPI_DCS_GET_RED_CHANNEL = 0x06, |
| MIPI_DCS_GET_GREEN_CHANNEL = 0x07, |
| MIPI_DCS_GET_BLUE_CHANNEL = 0x08, |
| MIPI_DCS_GET_DISPLAY_STATUS = 0x09, |
| MIPI_DCS_GET_POWER_MODE = 0x0A, |
| MIPI_DCS_GET_ADDRESS_MODE = 0x0B, |
| MIPI_DCS_GET_PIXEL_FORMAT = 0x0C, |
| MIPI_DCS_GET_DISPLAY_MODE = 0x0D, |
| MIPI_DCS_GET_SIGNAL_MODE = 0x0E, |
| MIPI_DCS_GET_DIAGNOSTIC_RESULT = 0x0F, |
| MIPI_DCS_ENTER_SLEEP_MODE = 0x10, |
| MIPI_DCS_EXIT_SLEEP_MODE = 0x11, |
| MIPI_DCS_ENTER_PARTIAL_MODE = 0x12, |
| MIPI_DCS_ENTER_NORMAL_MODE = 0x13, |
| MIPI_DCS_EXIT_INVERT_MODE = 0x20, |
| MIPI_DCS_ENTER_INVERT_MODE = 0x21, |
| MIPI_DCS_SET_GAMMA_CURVE = 0x26, |
| MIPI_DCS_SET_DISPLAY_OFF = 0x28, |
| MIPI_DCS_SET_DISPLAY_ON = 0x29, |
| MIPI_DCS_SET_COLUMN_ADDRESS = 0x2A, |
| MIPI_DCS_SET_PAGE_ADDRESS = 0x2B, |
| MIPI_DCS_WRITE_MEMORY_START = 0x2C, |
| MIPI_DCS_WRITE_LUT = 0x2D, |
| MIPI_DCS_READ_MEMORY_START = 0x2E, |
| MIPI_DCS_SET_PARTIAL_AREA = 0x30, |
| MIPI_DCS_SET_SCROLL_AREA = 0x33, |
| MIPI_DCS_SET_TEAR_OFF = 0x34, |
| MIPI_DCS_SET_TEAR_ON = 0x35, |
| MIPI_DCS_SET_ADDRESS_MODE = 0x36, |
| MIPI_DCS_SET_SCROLL_START = 0x37, |
| MIPI_DCS_EXIT_IDLE_MODE = 0x38, |
| MIPI_DCS_ENTER_IDLE_MODE = 0x39, |
| MIPI_DCS_SET_PIXEL_FORMAT = 0x3A, |
| MIPI_DCS_WRITE_MEMORY_CONTINUE = 0x3C, |
| MIPI_DCS_READ_MEMORY_CONTINUE = 0x3E, |
| MIPI_DCS_SET_TEAR_SCANLINE = 0x44, |
| MIPI_DCS_GET_SCANLINE = 0x45, |
| MIPI_DCS_READ_DDB_START = 0xA1, |
| MIPI_DCS_READ_DDB_CONTINUE = 0xA8, |
| }; |
| /* MIPI DCS pixel formats */ |
| #define MIPI_DCS_PIXEL_FMT_24BIT 7 |
| #define MIPI_DCS_PIXEL_FMT_18BIT 6 |
| #define MIPI_DCS_PIXEL_FMT_16BIT 5 |
| #define MIPI_DCS_PIXEL_FMT_12BIT 3 |
| #define MIPI_DCS_PIXEL_FMT_8BIT 2 |
| #define MIPI_DCS_PIXEL_FMT_3BIT 1 |
| #endif |
| /drivers/include/linux/mm.h |
|---|
| 12,6 → 12,54 |
| /* to align the pointer to the (next) page boundary */ |
| #define PAGE_ALIGN(addr) ALIGN(addr, PAGE_SIZE) |
| /* |
| * These are the virtual MM functions - opening of an area, closing and |
| * unmapping it (needed to keep files on disk up-to-date etc), pointer |
| * to the functions called when a no-page or a wp-page exception occurs. |
| */ |
| struct vm_operations_struct { |
| void (*open)(struct vm_area_struct * area); |
| void (*close)(struct vm_area_struct * area); |
| int (*fault)(struct vm_area_struct *vma, struct vm_fault *vmf); |
| /* notification that a previously read-only page is about to become |
| * writable, if an error is returned it will cause a SIGBUS */ |
| int (*page_mkwrite)(struct vm_area_struct *vma, struct vm_fault *vmf); |
| /* called by access_process_vm when get_user_pages() fails, typically |
| * for use by special VMAs that can switch between memory and hardware |
| */ |
| int (*access)(struct vm_area_struct *vma, unsigned long addr, |
| void *buf, int len, int write); |
| #ifdef CONFIG_NUMA |
| /* |
| * set_policy() op must add a reference to any non-NULL @new mempolicy |
| * to hold the policy upon return. Caller should pass NULL @new to |
| * remove a policy and fall back to surrounding context--i.e. do not |
| * install a MPOL_DEFAULT policy, nor the task or system default |
| * mempolicy. |
| */ |
| int (*set_policy)(struct vm_area_struct *vma, struct mempolicy *new); |
| /* |
| * get_policy() op must add reference [mpol_get()] to any policy at |
| * (vma,addr) marked as MPOL_SHARED. The shared policy infrastructure |
| * in mm/mempolicy.c will do this automatically. |
| * get_policy() must NOT add a ref if the policy at (vma,addr) is not |
| * marked as MPOL_SHARED. vma policies are protected by the mmap_sem. |
| * If no [shared/vma] mempolicy exists at the addr, get_policy() op |
| * must return NULL--i.e., do not "fallback" to task or system default |
| * policy. |
| */ |
| struct mempolicy *(*get_policy)(struct vm_area_struct *vma, |
| unsigned long addr); |
| int (*migrate)(struct vm_area_struct *vma, const nodemask_t *from, |
| const nodemask_t *to, unsigned long flags); |
| #endif |
| /* called by sys_remap_file_pages() to populate non-linear mapping */ |
| int (*remap_pages)(struct vm_area_struct *vma, unsigned long addr, |
| unsigned long size, pgoff_t pgoff); |
| }; |
| #define offset_in_page(p) ((unsigned long)(p) & ~PAGE_MASK) |
| #endif |
| /drivers/include/linux/uapi/drm/drm.h |
|---|
| 181,7 → 181,6 |
| _DRM_AGP = 3, /**< AGP/GART */ |
| _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */ |
| _DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */ |
| _DRM_GEM = 6, /**< GEM object (obsolete) */ |
| }; |
| /** |
| 611,6 → 610,16 |
| __u64 size; |
| }; |
| #define DRM_CAP_DUMB_BUFFER 0x1 |
| #define DRM_CAP_VBLANK_HIGH_CRTC 0x2 |
| #define DRM_CAP_DUMB_PREFERRED_DEPTH 0x3 |
| #define DRM_CAP_DUMB_PREFER_SHADOW 0x4 |
| #define DRM_CAP_PRIME 0x5 |
| #define DRM_PRIME_CAP_IMPORT 0x1 |
| #define DRM_PRIME_CAP_EXPORT 0x2 |
| #define DRM_CAP_TIMESTAMP_MONOTONIC 0x6 |
| #define DRM_CAP_ASYNC_PAGE_FLIP 0x7 |
| /** DRM_IOCTL_GET_CAP ioctl argument type */ |
| struct drm_get_cap { |
| __u64 capability; |
| 617,6 → 626,21 |
| __u64 value; |
| }; |
| /** |
| * DRM_CLIENT_CAP_STEREO_3D |
| * |
| * if set to 1, the DRM core will expose the stereo 3D capabilities of the |
| * monitor by advertising the supported 3D layouts in the flags of struct |
| * drm_mode_modeinfo. |
| */ |
| #define DRM_CLIENT_CAP_STEREO_3D 1 |
| /** DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */ |
| struct drm_set_client_cap { |
| __u64 capability; |
| __u64 value; |
| }; |
| #define DRM_CLOEXEC O_CLOEXEC |
| struct drm_prime_handle { |
| __u32 handle; |
| 649,6 → 673,7 |
| #define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink) |
| #define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open) |
| #define DRM_IOCTL_GET_CAP DRM_IOWR(0x0c, struct drm_get_cap) |
| #define DRM_IOCTL_SET_CLIENT_CAP DRM_IOW( 0x0d, struct drm_set_client_cap) |
| #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique) |
| #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth) |
| 774,17 → 799,6 |
| __u32 reserved; |
| }; |
| #define DRM_CAP_DUMB_BUFFER 0x1 |
| #define DRM_CAP_VBLANK_HIGH_CRTC 0x2 |
| #define DRM_CAP_DUMB_PREFERRED_DEPTH 0x3 |
| #define DRM_CAP_DUMB_PREFER_SHADOW 0x4 |
| #define DRM_CAP_PRIME 0x5 |
| #define DRM_CAP_TIMESTAMP_MONOTONIC 0x6 |
| #define DRM_CAP_ASYNC_PAGE_FLIP 0x7 |
| #define DRM_PRIME_CAP_IMPORT 0x1 |
| #define DRM_PRIME_CAP_EXPORT 0x2 |
| /* typedef area */ |
| #ifndef __KERNEL__ |
| typedef struct drm_clip_rect drm_clip_rect_t; |
| /drivers/include/linux/uapi/drm/i915_drm.h |
|---|
| 38,10 → 38,10 |
| * |
| * I915_L3_PARITY_UEVENT - Generated when the driver receives a parity mismatch |
| * event from the gpu l3 cache. Additional information supplied is ROW, |
| * BANK, SUBBANK of the affected cacheline. Userspace should keep track of |
| * these events and if a specific cache-line seems to have a persistent |
| * error remap it with the l3 remapping tool supplied in intel-gpu-tools. |
| * The value supplied with the event is always 1. |
| * BANK, SUBBANK, SLICE of the affected cacheline. Userspace should keep |
| * track of these events and if a specific cache-line seems to have a |
| * persistent error remap it with the l3 remapping tool supplied in |
| * intel-gpu-tools. The value supplied with the event is always 1. |
| * |
| * I915_ERROR_UEVENT - Generated upon error detection, currently only via |
| * hangcheck. The error detection event is a good indicator of when things |
| 222,6 → 222,7 |
| #define DRM_I915_GEM_SET_CACHING 0x2f |
| #define DRM_I915_GEM_GET_CACHING 0x30 |
| #define DRM_I915_REG_READ 0x31 |
| #define DRM_I915_GET_RESET_STATS 0x32 |
| #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) |
| #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) |
| 271,6 → 272,7 |
| #define DRM_IOCTL_I915_GEM_CONTEXT_CREATE DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_CREATE, struct drm_i915_gem_context_create) |
| #define DRM_IOCTL_I915_GEM_CONTEXT_DESTROY DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_DESTROY, struct drm_i915_gem_context_destroy) |
| #define DRM_IOCTL_I915_REG_READ DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_REG_READ, struct drm_i915_reg_read) |
| #define DRM_IOCTL_I915_GET_RESET_STATS DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GET_RESET_STATS, struct drm_i915_reset_stats) |
| /* Allow drivers to submit batchbuffers directly to hardware, relying |
| * on the security mechanisms provided by hardware. |
| 719,7 → 721,7 |
| */ |
| #define I915_EXEC_IS_PINNED (1<<10) |
| /** Provide a hint to the kernel that the command stream and auxilliary |
| /** Provide a hint to the kernel that the command stream and auxiliary |
| * state buffers already holds the correct presumed addresses and so the |
| * relocation process may be skipped if no buffers need to be moved in |
| * preparation for the execbuffer. |
| 1031,6 → 1033,22 |
| __u64 val; /* Return value */ |
| }; |
| struct drm_i915_reset_stats { |
| __u32 ctx_id; |
| __u32 flags; |
| /* All resets since boot/module reload, for all contexts */ |
| __u32 reset_count; |
| /* Number of batches lost when active in GPU, for this context */ |
| __u32 batch_active; |
| /* Number of batches lost pending for execution, for this context */ |
| __u32 batch_pending; |
| __u32 pad; |
| }; |
| struct drm_i915_mask { |
| __u32 handle; |
| __u32 width; |
| /drivers/include/linux/vmalloc.h |
|---|
| 0,0 → 1,3 |
| #ifndef _LINUX_VMALLOC_H |
| #define _LINUX_VMALLOC_H |
| #endif /* _LINUX_VMALLOC_H */ |