/drivers/video/drm/drm_crtc.c |
---|
3996,7 → 3996,7 |
* connector's edid property. |
* |
* Returns: |
* Zero on success, errno on failure. |
* Zero on success, negative errno on failure. |
*/ |
int drm_mode_connector_update_edid_property(struct drm_connector *connector, |
const struct edid *edid) |
/drivers/video/drm/i915/i915_dma.c |
---|
275,8 → 275,14 |
if (ret) |
DRM_INFO("failed to find VBIOS tables\n"); |
/* If we have > 1 VGA cards, then we need to arbitrate access |
* to the common VGA resources. |
* |
* If we are a secondary display controller (!PCI_DISPLAY_CLASS_VGA), |
* then we do not take part in VGA arbitration and the |
* vga_client_register() fails with -ENODEV. |
*/ |
/* Initialise stolen first so that we may reserve preallocated |
* objects for the BIOS to KMS transition. |
*/ |
578,7 → 584,7 |
* so there is no point in running more than one instance of the |
* workqueue at any time. Use an ordered one. |
*/ |
dev_priv->wq = alloc_ordered_workqueue("i915", 0); |
dev_priv->wq = (struct workqueue_struct *)alloc_ordered_workqueue("i915", 0); |
if (dev_priv->wq == NULL) { |
DRM_ERROR("Failed to create our workqueue.\n"); |
ret = -ENOMEM; |
638,7 → 644,7 |
if (IS_GEN5(dev)) |
intel_gpu_ips_init(dev_priv); |
intel_runtime_pm_enable(dev_priv); |
// intel_runtime_pm_enable(dev_priv); |
main_device = dev; |
672,12 → 678,6 |
intel_gpu_ips_teardown(); |
/* The i915.ko module is still not prepared to be loaded when |
* the power well is not enabled, so just enable it in case |
* we're going to unload/reload. */ |
intel_display_set_init_power(dev_priv, true); |
intel_power_domains_remove(dev_priv); |
i915_teardown_sysfs(dev); |
if (dev_priv->mm.inactive_shrinker.scan_objects) |
/drivers/video/drm/i915/i915_drv.c |
---|
842,7 → 842,7 |
* of re-init after reset. |
*/ |
if (INTEL_INFO(dev)->gen > 5) |
intel_reset_gt_powersave(dev); |
intel_enable_gt_powersave(dev); |
} else { |
mutex_unlock(&dev->struct_mutex); |
} |
/drivers/video/drm/i915/i915_gem.c |
---|
220,7 → 220,7 |
void *i915_gem_object_alloc(struct drm_device *dev) |
{ |
struct drm_i915_private *dev_priv = dev->dev_private; |
return kmalloc(sizeof(struct drm_i915_gem_object), 0); |
return kzalloc(sizeof(struct drm_i915_gem_object), 0); |
} |
void i915_gem_object_free(struct drm_i915_gem_object *obj) |
1480,7 → 1480,7 |
i915_gem_object_unpin_pages(obj); |
*offset = mem; |
*offset = (uint32_t)mem; |
out: |
drm_gem_object_unreference(&obj->base); |
1646,7 → 1646,6 |
page_count = obj->base.size / PAGE_SIZE; |
if (sg_alloc_table(st, page_count, GFP_KERNEL)) { |
kfree(st); |
FAIL(); |
return -ENOMEM; |
} |
1662,7 → 1661,6 |
if (IS_ERR(page)) { |
dbgprintf("%s invalid page %p\n", __FUNCTION__, page); |
goto err_pages; |
} |
#ifdef CONFIG_SWIOTLB |
if (swiotlb_nr_tbl()) { |
1688,6 → 1686,11 |
sg_mark_end(sg); |
obj->pages = st; |
if (obj->tiling_mode != I915_TILING_NONE && |
dev_priv->quirks & QUIRK_PIN_SWIZZLED_PAGES) |
i915_gem_object_pin_pages(obj); |
return 0; |
err_pages: |
1696,7 → 1699,7 |
page_cache_release(sg_page_iter_page(&sg_iter)); |
sg_free_table(st); |
kfree(st); |
FAIL(); |
return PTR_ERR(page); |
} |
2511,9 → 2514,11 |
struct drm_i915_gem_object *obj = vma->obj; |
struct drm_i915_private *dev_priv = obj->base.dev->dev_private; |
int ret; |
if(obj == get_fb_obj()) |
{ |
WARN(1,"attempt to unbind fb object\n"); |
return 0; |
}; |
if (list_empty(&vma->vma_link)) |
return 0; |
/drivers/video/drm/i915/i915_gem_execbuffer.c |
---|
1382,9 → 1382,10 |
batch_obj, |
args->batch_start_offset, |
file->is_master); |
if (ret) |
if (ret) { |
if (ret != -EACCES) |
goto err; |
} else { |
/* |
* XXX: Actually do this when enabling batch copy... |
* |
1394,6 → 1395,8 |
* want that set when the command parser is enabled. |
*/ |
} |
} |
#endif |
/* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure |
* batch" bit. Hence we need to pin secure batches into the global gtt. |
/drivers/video/drm/i915/i915_gem_stolen.c |
---|
127,10 → 127,27 |
r = devm_request_mem_region(dev->dev, base, dev_priv->gtt.stolen_size, |
"Graphics Stolen Memory"); |
if (r == NULL) { |
/* |
* One more attempt but this time requesting region from |
* base + 1, as we have seen that this resolves the region |
* conflict with the PCI Bus. |
* This is a BIOS w/a: Some BIOS wrap stolen in the root |
* PCI bus, but have an off-by-one error. Hence retry the |
* reservation starting from 1 instead of 0. |
*/ |
r = devm_request_mem_region(dev->dev, base + 1, |
dev_priv->gtt.stolen_size - 1, |
"Graphics Stolen Memory"); |
/* |
* GEN3 firmware likes to smash pci bridges into the stolen |
* range. Apparently this works. |
*/ |
if (r == NULL && !IS_GEN3(dev)) { |
DRM_ERROR("conflict detected with stolen region: [0x%08x - 0x%08x]\n", |
base, base + (uint32_t)dev_priv->gtt.stolen_size); |
base = 0; |
} |
} |
#endif |
return base; |
} |
226,6 → 243,7 |
kfree(compressed_llb); |
drm_mm_remove_node(&dev_priv->fbc.compressed_fb); |
err_llb: |
pr_info_once("drm: not enough stolen space for compressed buffer (need %d more bytes), disabling. Hint: you may be able to increase stolen memory size in the BIOS to avoid this.\n", size); |
return -ENOSPC; |
} |
/drivers/video/drm/i915/i915_gpu_error.c |
---|
1258,6 → 1258,7 |
WARN_ONCE(1, "Unsupported platform\n"); |
case 7: |
case 8: |
case 9: |
instdone[0] = I915_READ(GEN7_INSTDONE_1); |
instdone[1] = I915_READ(GEN7_SC_INSTDONE); |
instdone[2] = I915_READ(GEN7_SAMPLER_INSTDONE); |
/drivers/video/drm/i915/i915_irq.c |
---|
4189,6 → 4189,8 |
else |
dev_priv->pm_rps_events = GEN6_PM_RPS_EVENTS; |
INIT_DELAYED_WORK(&dev_priv->hotplug_reenable_work, |
intel_hpd_irq_reenable_work); |
if (IS_GEN2(dev_priv)) { |
/drivers/video/drm/i915/i915_params.c |
---|
42,7 → 42,7 |
.preliminary_hw_support = IS_ENABLED(CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT), |
.disable_power_well = 1, |
.enable_ips = 1, |
.fastboot = 0, |
.fastboot = 1, |
.prefault_disable = 0, |
.reset = true, |
.invert_brightness = 0, |
/drivers/video/drm/i915/intel_display.c |
---|
2349,6 → 2349,7 |
if (!obj) |
return false; |
obj->map_and_fenceable=true; |
main_fb_obj = obj; |
if (plane_config->tiled) { |
6638,9 → 6639,9 |
aligned_height = intel_align_height(dev, crtc->base.primary->fb->height, |
plane_config->tiled); |
plane_config->size = 16*1024*1024; |
plane_config->size = PAGE_ALIGN(crtc->base.primary->fb->pitches[0] * |
aligned_height); |
DRM_DEBUG_KMS("pipe/plane %d/%d with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n", |
pipe, plane, crtc->base.primary->fb->width, |
crtc->base.primary->fb->height, |
12666,6 → 12667,12 |
/* ThinkPad T60 needs pipe A force quirk (bug #16494) */ |
{ 0x2782, 0x17aa, 0x201a, quirk_pipea_force }, |
/* 830 needs to leave pipe A & dpll A up */ |
{ 0x3577, PCI_ANY_ID, PCI_ANY_ID, quirk_pipea_force }, |
/* 830 needs to leave pipe B & dpll B up */ |
{ 0x3577, PCI_ANY_ID, PCI_ANY_ID, quirk_pipeb_force }, |
/* Lenovo U160 cannot use SSC on LVDS */ |
{ 0x0046, 0x17aa, 0x3920, quirk_ssc_force_disable }, |
12857,6 → 12864,7 |
* If the fb is shared between multiple heads, we'll |
* just get the first one. |
*/ |
crtc->plane_config.size = 16*1024*1024; |
intel_find_plane_obj(crtc, &crtc->plane_config); |
} |
} |
/drivers/video/drm/i915/intel_dp.c |
---|
1042,8 → 1042,7 |
intel_dp->aux.dev = dev->dev; |
intel_dp->aux.transfer = intel_dp_aux_transfer; |
DRM_DEBUG_KMS("registering %s bus for %s\n", name, |
connector->base.kdev->kobj.name); |
DRM_DEBUG_KMS("registering %s bus\n", name); |
ret = drm_dp_aux_register(&intel_dp->aux); |
if (ret < 0) { |
1611,7 → 1610,7 |
* operations. |
*/ |
delay = msecs_to_jiffies(intel_dp->panel_power_cycle_delay * 5); |
schedule_delayed_work(&intel_dp->panel_vdd_work, delay); |
// schedule_delayed_work(&intel_dp->panel_vdd_work, delay); |
} |
/* |
/drivers/video/drm/i915/intel_fbdev.c |
---|
185,6 → 185,7 |
mutex_lock(&dev->struct_mutex); |
#if 0 |
if (intel_fb && |
(sizes->fb_width > intel_fb->base.width || |
sizes->fb_height > intel_fb->base.height)) { |
195,6 → 196,8 |
drm_framebuffer_unreference(&intel_fb->base); |
intel_fb = ifbdev->fb = NULL; |
} |
#endif |
if (!intel_fb || WARN_ON(!intel_fb->obj)) { |
DRM_DEBUG_KMS("no BIOS fb, allocating a new one\n"); |
ret = intelfb_alloc(helper, sizes); |
/drivers/video/drm/i915/intel_sdvo.c |
---|
2384,7 → 2384,17 |
connector->base.unregister = intel_sdvo_connector_unregister; |
intel_connector_attach_encoder(&connector->base, &encoder->base); |
ret = drm_connector_register(drm_connector); |
if (ret < 0) |
goto err1; |
return 0; |
err2: |
drm_connector_unregister(drm_connector); |
err1: |
drm_connector_cleanup(drm_connector); |
return ret; |
} |
/drivers/video/drm/i915/kms_display.c |
---|
285,6 → 285,7 |
u32 ifl; |
int ret; |
mutex_lock(&dev->struct_mutex); |
mutex_lock(&dev->mode_config.mutex); |
ret = choose_config(dev, &connector, &crtc); |
357,6 → 358,7 |
}; |
mutex_unlock(&dev->mode_config.mutex); |
mutex_unlock(&dev->struct_mutex); |
set_mode(dev, os_display->connector, os_display->crtc, usermode, false); |
805,6 → 807,8 |
if( mask_seqno[slot] == os_display->mask_seqno) |
return 0; |
memset(mask->bo_map,0,mask->width * mask->height); |
GetWindowRect(&win); |
win.right+= 1; |
win.bottom+= 1; |
847,7 → 851,7 |
return -EINVAL; |
} |
#if 0 |
#if 1 |
if(warn_count < 1000) |
{ |
printf("left %d top %d right %d bottom %d\n", |
/drivers/video/drm/i915/main.c |
---|
249,7 → 249,6 |
if( err != 0) |
dbgprintf("Set DISPLAY handler\n"); |
return err; |
}; |
284,25 → 283,26 |
#define SRV_DRM_GEM_OPEN 25 |
#define SRV_I915_GEM_PIN 26 |
#define SRV_I915_GEM_UNPIN 27 |
#define SRV_I915_GEM_SET_CACHING 28 |
#define SRV_I915_GEM_PWRITE 29 |
#define SRV_I915_GEM_BUSY 30 |
#define SRV_I915_GEM_SET_DOMAIN 31 |
#define SRV_I915_GEM_MMAP 32 |
#define SRV_I915_GEM_SET_TILING 33 |
#define SRV_I915_GEM_GET_TILING 34 |
#define SRV_I915_GEM_GET_APERTURE 35 |
#define SRV_I915_GEM_MMAP_GTT 36 |
#define SRV_I915_GEM_THROTTLE 37 |
#define SRV_I915_GEM_EXECBUFFER2 38 |
#define SRV_I915_GEM_WAIT 39 |
#define SRV_I915_GEM_CONTEXT_CREATE 40 |
#define SRV_I915_GEM_CONTEXT_DESTROY 41 |
#define SRV_I915_REG_READ 42 |
#define SRV_I915_GEM_GET_CACHING 28 |
#define SRV_I915_GEM_SET_CACHING 29 |
#define SRV_I915_GEM_PWRITE 30 |
#define SRV_I915_GEM_BUSY 31 |
#define SRV_I915_GEM_SET_DOMAIN 32 |
#define SRV_I915_GEM_MMAP 33 |
#define SRV_I915_GEM_SET_TILING 34 |
#define SRV_I915_GEM_GET_TILING 35 |
#define SRV_I915_GEM_GET_APERTURE 36 |
#define SRV_I915_GEM_MMAP_GTT 37 |
#define SRV_I915_GEM_THROTTLE 38 |
#define SRV_I915_GEM_EXECBUFFER2 39 |
#define SRV_I915_GEM_WAIT 40 |
#define SRV_I915_GEM_CONTEXT_CREATE 41 |
#define SRV_I915_GEM_CONTEXT_DESTROY 42 |
#define SRV_I915_REG_READ 43 |
#define SRV_FBINFO 43 |
#define SRV_MASK_UPDATE 44 |
#define SRV_MASK_UPDATE_EX 45 |
#define SRV_FBINFO 44 |
#define SRV_MASK_UPDATE 45 |
#define SRV_MASK_UPDATE_EX 46 |
#define check_input(size) \ |
if( unlikely((inp==NULL)||(io->inp_size != (size))) ) \ |
387,6 → 387,10 |
retval = i915_gem_unpin_ioctl(main_device, inp, file); |
break; |
case SRV_I915_GEM_GET_CACHING: |
retval = i915_gem_get_caching_ioctl(main_device, inp, file); |
break; |
case SRV_I915_GEM_SET_CACHING: |
retval = i915_gem_set_caching_ioctl(main_device, inp, file); |
break; |
/drivers/video/drm/radeon/main.c |
---|
134,7 → 134,7 |
if( GetService("DISPLAY") != 0 ) |
return 0; |
printf("Radeon v3.19-rc2 cmdline %s\n", cmdline); |
printf("Radeon v3.19-rc3 cmdline %s\n", cmdline); |
if( cmdline && *cmdline ) |
parse_cmdline(cmdline, &usermode, log, &radeon_modeset); |
285,9 → 285,9 |
if(vendor == 0x1002) |
{ |
class = PciRead32(busnr, devfn, PCI_CLASS_REVISION); |
class >>= 16; |
class >>= 24; |
if( class == PCI_CLASS_DISPLAY_VGA) |
if( class ==PCI_BASE_CLASS_DISPLAY) |
ret = 1; |
} |
return ret; |