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Regard whitespace Rev 413 → Rev 412

/kernel/branches/flat_kernel/core/memory.inc
452,13 → 452,13
proc page_fault_handler
pushad
 
; push eax
; push edx
; mov edx, 0x400 ;bocsh
; mov al,0xff ;bocsh
; out dx, al ;bocsh
; pop edx
; pop eax
push eax
push edx
mov edx, 0x400 ;bocsh
mov al,0xff ;bocsh
out dx, al ;bocsh
pop edx
pop eax
 
mov ebp, esp
mov eax, cr2
/kernel/branches/flat_kernel/core/malloc.inc
972,9 → 972,7
 
align 4
init_malloc:
 
stdcall kernel_alloc, 0x20000
 
mov [mst.top], eax
mov [mst.topsize], 128*1024
mov dword [eax+4], (128*1024) or 1
/kernel/branches/flat_kernel/drivers/comport.asm
22,13 → 22,6
DRV_ENTRY equ 1
DRV_EXIT equ -1
 
THR_REG equ 0; x3f8 ;transtitter/reciever
IER_REG equ 1; x3f9 ;interrupt enable
IIR_REG equ 2; x3fA ;interrupt info
LCR_REG equ 3; x3FB ;line control
MCR_REG equ 4; x3FC ;modem control
LSR_REG equ 5; x3FD ;line status
MSR_REG equ 6; x3FE ;modem status
 
LCR_5BIT equ 0x00
LCR_6BIT equ 0x01
70,7 → 63,7
MCR_DTR equ 0x01 ;0-> DTR=1, 1-> DTR=0
MCR_RTS equ 0x02 ;0-> RTS=1, 1-> RTS=0
MCR_OUT_1 equ 0x04 ;0-> OUT1=1, 1-> OUT1=0
MCR_OUT_2 equ 0x08 ;0-> OUT2=1, 1-> OUT2=0 enable intr
MCR_OUT_2 equ 0x08 ;0-> OUT2=1, 1-> OUT2=0
MCR_LOOP equ 0x10 ;lopback mode
 
MSR_DCTS equ 0x01 ;delta clear to send
78,6 → 71,13
MSR_TERI equ 0x04 ;trailinh edge of ring
MSR_DDCD equ 0x08 ;delta carrier detect
 
COM_THR equ 0x3f8 ;transtitter/reciever
COM_IER equ 0x3f9 ;interrupt enable
COM_IIR equ 0x3fA ;interrupt info
COM_LCR equ 0x3FB ;line control
COM_MCR equ 0x3FC ;modem control
COM_LSR equ 0x3FD ;line status
COM_MSR equ 0x3FE ;modem status
 
RATE_50 equ 0
RATE_75 equ 1
99,25 → 99,18
RATE_57600 equ 17
RATE_115200 equ 18
 
COM_1 equ 1
COM_2 equ 2
COM_3 equ 3
COM_4 equ 4
COM_MAX equ 2 ;only two port supported
COM_1 equ 0
COM_2 equ 1
COM_3 equ 2
COM_4 equ 3
 
COM_1_BASE equ 0x3F8
COM_2_BASE equ 0x2F8
 
COM_1_IRQ equ 4
COM_2_IRQ equ 3
TRANSMIT equ 1
 
UART_CLOSED equ 0
UART_TRANSMIT equ 1
 
struc UART
struc COMPORT
{
; .owner dd ? unused
.lock dd ?
.base dd ?
.lcr_reg dd ?
.mcr_reg dd ?
124,47 → 117,30
.rate dd ?
.mode dd ?
.state dd ?
.connection dd ?
 
.rcvr_rp dd ?
.rcvr_wp dd ?
.rcvr_free dd ?
.rcvr_count dd ?
 
.xmit_rp dd ?
.xmit_wp dd ?
.xmit_free dd ?
.xmit_count dd ?
.xmit_buffer rb 128
.rcvr_buffer rb 128
.xmit_buffer rb 128
}
virtual at 0
UART UART
COMPORT COMPORT
end virtual
 
RCVR_OFFSET equ 14*4
XMIT_OFFSET equ (13*4*128)
UART_SIZE equ (256+13*4)
COMPORT_SIZE equ 256+15*4
 
struc CONNECTION
{
.magic dd ? ;'CNCT'
.destroy dd ? ;internal destructor
.fd dd ? ;next object in list
.bk dd ? ;prev object in list
.pid dd ? ;owner id
UART_VERSION equ 0x00000000
 
.id dd ? ;reserved
.uart dd ? ;uart pointer
}
 
virtual at 0
CONNECTION CONNECTION
end virtual
 
CONNECTION_SIZE equ 7*4
 
UART_VERSION equ 0x12345678 ;debug
 
init_uart_service:
mov eax, UART_SIZE
init_com:
mov eax, COMPORT_SIZE
call malloc
test eax, eax
jz .fail
171,17 → 147,14
 
mov [com1], eax
mov edi, eax
mov ecx, UART_SIZE/4
mov ecx, COMPORT_SIZE/4
xor eax, eax
cld
rep stosd
 
mov eax, [com1]
mov [eax+UART.base], COM_1_BASE
call reset
 
call uart_reset ;eax= uart
 
stdcall attach_int_handler, COM_1_IRQ, com_1_isr
stdcall attach_int_handler, COM_1_IRQ, com_isr
stdcall reg_service, sz_uart_srv, uart_proc
ret
.fail:
218,6 → 191,7
jne @F
 
mov eax, [ebx+output]
mov eax, [eax]
mov [eax], dword UART_VERSION
xor eax, eax
ret
224,18 → 198,23
@@:
cmp eax, PORT_OPEN
jne @F
call open_port
ret
 
mov ebx, [ebx+input]
mov eax, [ebx]
call uart_open
mov ebx, [ioctl]
mov ebx, [ebx+output]
mov [ebx], ecx
 
mov esi, [ebx+input]
mov ecx, [esi]
mov edx, [com1]
cmp [edx+COMPORT.connection], ecx
je @F
mov edx, [com2]
cmp [edx+COMPORT.connection], ecx
jne .fail
 
mov edi, [ebx+output]
call [uart_func+eax*4] ;edx, esi, edi
ret
@@:
mov esi, [ebx+input] ;input buffer
call [uart_func+eax*4]
ret
 
.fail:
or eax, -1
ret
250,50 → 229,57
restore out_size
 
 
open_port:
ret
 
; param
; edx= port
; esi= input data
; edi= output data
;
; retval
; eax=0 success
; eax <>0 error
 
align 4
close_port:
 
call reset
mov [edx+COMPORT.connection], 0
xor eax, eax
ret
 
 
; set mode 2400 bod 8-bit
; disable DTR & RTS
; clear FIFO
; clear pending interrupts
;
; param
; eax= uart
 
align 4
uart_reset:
mov esi, eax
mov [eax+UART.state], UART_CLOSED
mov edx, [eax+UART.base]
add edx, MCR_REG
xor eax, eax
out dx, al ;clear DTR & RTS
reset:
mov eax, RATE_2400
mov ebx, LCR_8BIT+LCR_STOP_1
call set_mode
 
mov eax, esi
mov ebx, RATE_2400
mov ecx, LCR_8BIT+LCR_STOP_1
call uart_set_mode.internal
 
mov edx, [esi+UART.base]
add edx, IIR_REG
mov eax,FCR_EFIFO+FCR_CRB+FCR_CXMIT+FCR_FIFO_14
mov edx, COM_IIR
out dx, al
 
.clear_RB:
mov edx, [esi+UART.base]
add edx, LSR_REG
mov edx, COM_LSR
in al, dx
test eax, LSR_DR
jz @F
 
mov edx, [esi+UART.base]
mov edx, COM_THR
in al, dx
jmp .clear_RB
@@:
mov edx, [esi+UART.base]
add edx, IER_REG
mov eax,IER_RDAI+IER_THRI+IER_LSI
mov edx, COM_IER
out dx, al
 
.clear_IIR:
mov edx, [esi+UART.base]
add edx, IIR_REG
mov edx, COM_IIR
in al, dx
test al, IIR_INTR
jnz .done
302,8 → 288,7
and eax, 3
jnz @F
 
mov edx, [esi+UART.base]
add edx, MSR_REG
mov edx, COM_MSR
in al, dx
jmp .clear_IIR
@@:
313,335 → 298,191
cmp eax, 2
jne @F
 
mov edx, [esi+UART.base]
mov edx, COM_THR
in al, dx
jmp .clear_IIR
@@:
mov edx, [esi+UART.base]
add edx, LSR_REG
mov edx, COM_LSR
in al, dx
jmp .clear_IIR
 
.done:
lea edi, [esi+UART.rcvr_buffer]
mov edi, rcvr_buff
xor eax, eax
mov ecx, 256/4
xor eax, eax
 
mov [esi+UART.rcvr_rp], eax
mov [esi+UART.rcvr_wp], eax
mov [esi+UART.rcvr_free], 128
mov [esi+UART.xmit_rp], eax
mov [esi+UART.xmit_wp], eax
mov [esi+UART.xmit_free], 128
mov [rcvr_rp], edi
mov [rcvr_wp], edi
mov [rcvr_free], 128
;; mov [rcvr_count], 16
 
mov [xmit_rp], xmit_buff
mov [xmit_wp], xmit_buff
mov [xmit_free], 128
mov [xmit_count], 16 ;FIFO free
 
cld
rep stosd
ret
 
 
; param
; esi= input buffer
; +0 connection
; +4 rate
; +8 mode
;
; retval
; eax= error code
; eax= rate constant
; ebx= mode bits
 
align 4
uart_set_mode:
mov eax, [esi]
cmp [eax+APPOBJ.magic], 'CNCT'
jne .fail
 
cmp [eax+APPOBJ.destroy], uart_close.destroy
jne .fail
 
mov eax, [eax+CONNECTION.uart]
test eax, eax
jz .fail
 
mov ebx, [esi+4]
mov ecx, [esi+8]
 
; param
; eax= uart
; ebx= baud rate
; ecx= mode
 
align 4
.internal:
cmp ebx, RATE_115200
set_mode:
cmp eax, RATE_115200
ja .fail
 
cmp ecx, LCR_BREAK
cmp ebx, LCR_BREAK
jae .fail
 
mov [eax+UART.rate], ebx
mov [eax+UART.mode], ecx
mov [rate], eax
mov [mode], ebx
 
mov esi, eax
mov bx, [divisor+ebx*2]
mov cx, [divisor+eax*2]
 
mov edx, [esi+UART.base]
push edx
add edx, LCR_REG
mov dx, COM_LCR
in al, dx
or al, 0x80
out dx, al
 
pop edx
mov al, bl
mov dx, COM_THR
mov al, cl
out dx, al
 
inc dx
mov al, bh
mov al, ch
out dx, al
 
add edx, LCR_REG-1
mov eax, ecx
mov dx, COM_LCR
mov eax, ebx
out dx, al
xor eax, eax
ret
.fail:
or eax, -1
ret
 
 
align 4
uart_set_modem:
 
mov [eax+UART.mcr_reg], ebx
mov edx, [eax+UART.base]
add edx, MCR_REG
mov al, bl
out dx, al
ret
 
; param
; eax= port
;
; retval
; ecx= connection
; eax= error code
; eax= rate constant
 
align 4
uart_open:
dec eax
cmp eax, COM_MAX
jae .fail
 
mov esi, [com1+eax*4] ;uart
push esi
.do_wait:
cmp dword [esi+UART.lock],0
je .get_lock
call change_task
jmp .do_wait
.get_lock:
mov eax, 1
xchg eax, [esi+UART.lock]
test eax, eax
jnz .do_wait
 
mov eax, esi ;uart
call uart_reset
 
mov ebx, [CURRENT_TASK]
shl ebx, 5
mov ebx, [CURRENT_TASK+ebx+4]
mov eax, CONNECTION_SIZE
call create_kernel_object
pop esi ;uart
test eax, eax
jz .fail
 
mov [eax+APPOBJ.magic], 'CNCT'
mov [eax+APPOBJ.destroy], uart_close.destroy
mov [eax+CONNECTION.uart], esi
mov ecx, eax
xor eax, eax
ret
.fail:
or eax, -1
ret
restore .uart
 
; param
; esi= input buffer
 
align 4
uart_close:
mov eax, [esi]
cmp [eax+APPOBJ.magic], 'CNCT'
jne .fail
 
cmp [eax+APPOBJ.destroy], uart_close.destroy
jne .fail
.destroy:
push [eax+CONNECTION.uart]
call destroy_kernel_object ;eax= object
pop eax ;eax= uart
test eax, eax
jz .fail
 
mov [eax+UART.state], UART_CLOSED
mov [eax+UART.lock], 0 ;release port
xor eax, eax
ret
.fail:
or eax, -1
ret
 
 
; param
; eax= uart
; ebx= baud rate
 
align 4
set_rate:
cmp ebx, RATE_115200
cmp eax, RATE_115200
ja .fail
 
mov [eax+UART.rate], ebx
mov bx, [divisor+ebx*2]
mov [rate], eax
mov bx, [divisor+eax*2]
 
mov edx, [eax+UART.base]
add edx, LCR_REG
mov dx, COM_LCR
in al, dx
push eax
or al, 0x80
out dx, al
 
sub edx, LCR_REG
mov dx, COM_THR
mov al, bl
out dx, al
 
inc edx
inc dx
mov al, bh
out dx, al
 
pop eax
add edx, LCR_REG-1
mov dx, COM_LCR
mov eax, [lcr_reg]
out dx, al
.fail:
ret
 
 
; param
; ebx= uart
 
align 4
transmit:
push esi
push edi
push ebp
mov edx, COM_THR
 
mov edx, [ebx+UART.base]
mov [xmit_count], 16
 
pushfd
cli
 
mov ebp, 16
mov esi, [ebx+UART.xmit_rp]
lea edi, [ebx+UART.xmit_buffer]
mov ecx, [ebx+UART.xmit_free]
mov esi, [xmit_rp]
mov ecx, [xmit_free]
 
cmp ecx, 128
je .exit
@@:
and esi, 127
mov al, [esi+edi]
mov al, [xmit_buff+esi]
inc esi
 
out dx, al
inc ecx
dec ebp
dec [xmit_count]
jz .done
 
cmp ecx, 128
jne @B
.done:
mov [ebx+UART.xmit_rp], esi
mov [ebx+UART.xmit_free], ecx
mov [ebx+UART.state], UART_TRANSMIT
add esi, xmit_buff
mov [xmit_rp], esi
mov [xmit_free], ecx
mov [com_state], TRANSMIT
.exit:
popfd
pop ebp
pop edi
pop esi
ret
 
; param
; eax= uart
; ebx= src
; edx= count
 
; eax= src
; ebx= count
 
align 4
uart_write:
mov esi, ebx
mov edi, [eax+UART.xmit_wp]
lea ebx, [eax+UART.xmit_buffer]
comm_send:
mov edi, [xmit_wp]
mov esi, eax
.write:
test edx, edx
test ebx, ebx
jz .done
.wait:
cmp [eax+UART.xmit_free], 0
cmp [xmit_free], 0
jne .fill
 
cmp [eax+UART.state], UART_TRANSMIT
cmp [com_state], TRANSMIT
je .wait
 
mov ebx, eax
push edx
call transmit
pop edx
mov eax, ebx
lea ebx, [ebx+UART.xmit_buffer]
jmp .write
.fill:
mov ecx, 128
mov ecx, xmit_buff+128
sub ecx, edi
jz .clip
cmp ecx, [eax+UART.xmit_free]
jbe @F
cmp ecx, [xmit_free]
jb @F
 
mov ecx, [eax+UART.xmit_free]
mov ecx, [xmit_free]
@@:
cmp ecx, edx
jbe @F
mov ecx, edx
cmp ecx, ebx
jb @F
mov ecx, ebx
@@:
sub [eax+UART.xmit_free], ecx
sub edx, ecx
sub [xmit_free], ecx
sub ebx, ecx
 
add edi, ebx
cld
rep movsb
 
sub edi, ebx
.clip:
and edi, 127
cmp edi, xmit_buff+128
jb .write
sub edi, 128
jmp .write
 
.done:
mov [eax+UART.xmit_wp], edi
cmp [eax+UART.state], UART_TRANSMIT
cmp [com_state], TRANSMIT
je @F
mov ebx, eax
call transmit
@@:
ret
 
align 4
com_2_isr:
mov ebx, [com2]
jmp com_1_isr.get_info
align 4
com_1_isr:
mov ebx, [com1]
com_isr:
 
.get_info:
mov edx, [ebx+UART.base]
add edx, IIR_REG
mov dx, COM_IIR
in al, dx
 
test al, IIR_INTR
657,50 → 498,35
 
align 4
isr_line:
mov edx, [ebx+UART.base]
add edx, LSR_REG
mov edx, COM_LSR
in al, dx
ret
 
align 4
isr_recieve:
mov edx, [ebx+UART.base]
mov edx, COM_THR
in al, dx
ret
 
align 4
isr_modem:
mov edx, [ebx+UART.base]
add edx, MSR_REG
mov edx, COM_MSR
in al, dx
ret
 
 
align 4
com1 dd 0
com2 dd 0
 
align 4
uart_func dd 0 ;SRV_GETVERSION
dd 0 ;PORT_OPEN
dd uart_close ;PORT_CLOSE
dd 0 ;PORT_RESET
dd uart_set_mode ;PORT_SETMODE
; dd uart.get_mode ;PORT_GETMODE
; dd uart.set_mcr ;PORT_SETMCR
;PORT_GETMCR equ 7
;PORT_READ equ 8
;PORT_WRITE equ 9
uart_func dd 0 ;get version
dd 0 ;open port
dd close_port
 
 
 
 
isr_action dd isr_modem
dd transmit
dd isr_recieve
dd isr_line
 
;version dd 0x00040000
 
divisor dw 2304, 1536, 1047, 857, 768, 384
dw 192, 96, 64, 58, 48, 32
710,5 → 536,33
 
sz_uart_srv db 'UART',0
 
;version dd 0x00040000
 
 
align 4
 
com1 dd ?
com2 dd ?
 
rcvr_rp dd ?
rcvr_wp dd ?
rcvr_free dd ?
rcvr_count dd ?
 
xmit_rp dd ?
xmit_wp dd ?
xmit_free dd ?
xmit_count dd ?
 
lcr_reg dd ?
mcr_reg dd ?
rate dd ?
mode dd ?
com_state dd ?
 
connection dd ?
 
align 128
rcvr_buff rb 128
xmit_buff rb 128
 
/kernel/branches/flat_kernel/drivers/ensoniq.asm
5,7 → 5,6
 
 
include 'proc32.inc'
include 'imports.inc'
 
DEBUG equ 1
 
53,7 → 52,23
BIT30 EQU 0x40000000
BIT31 EQU 0x80000000
 
VID_INTEL equ 0x8086
VID_NVIDIA equ 0x10DE
 
CTRL_ICH equ 0x2415
CTRL_ICH0 equ 0x2425
CTRL_ICH2 equ 0x2435
CTRL_ICH3 equ 0x2445
CTRL_ICH4 equ 0x24C5
CTRL_ICH5 equ 0x24D5
CTRL_ICH6 equ 0x266E
CTRL_ICH7 equ 0x27DE
 
CTRL_NFORCE equ 0x01B1
CTRL_NFORCE2 equ 0x006A
CTRL_NFORCE3 equ 0x00DA
 
 
PCM_OUT_BDL equ 0x10 ; PCM out buffer descriptors list
PCM_OUT_CR_REG equ 0x1b ; PCM out Control Register
PCM_OUT_LVI_REG equ 0x15 ; PCM last valid index
251,23 → 266,32
 
EVENT_NOTIFY equ 0x00000200
 
OS_BASE equ 0;
SLOT_BASE equ OS_BASE+0x0080000
new_app_base equ 0x80000000
OS_BASE equ 0; 0x80400000
new_app_base equ 0x60400000; 0x01000000
PROC_BASE equ OS_BASE+0x0080000
 
public START
public STOP
public service_proc
public version
 
extrn AttachIntHandler
extrn SysMsgBoardStr
extrn PciApi
extrn PciRead32
extrn PciRead8
extrn PciWrite8
extrn AllocKernelSpace
extrn MapPage
extrn RegService
extrn KernelAlloc
extrn GetPgAddr
extrn GetCurrentTask
 
section '.flat' code readable align 16
 
proc START stdcall, state:dword
 
cmp [state], 1
jne .stop
 
START:
if DEBUG
mov esi, msgDetect
mov esi, msgInit
call SysMsgBoardStr
end if
 
282,12 → 306,11
call SysMsgBoardStr
 
end if
 
call init_controller
test eax, eax
jz .fail
 
jmp .fail ;force fail
 
if DEBUG
mov esi, msgInitCodec
call SysMsgBoardStr
313,6 → 336,16
 
call create_primary_buff
 
; if REMAP_IRQ
 
; call get_LPC_bus
; cmp eax, -1
; jz .fail
 
; mov [lpc_bus], 0 ;eax
; call remap_irq
; end if
 
mov eax, VALID_IRQ
mov ebx, [ctrl.int_line]
mov esi, msgInvIRQ
332,12 → 365,8
call SysMsgBoardStr
end if
xor eax, eax
STOP:
ret
.stop:
call stop
xor eax, eax
ret
endp
 
handle equ IOCTL.handle
io_code equ IOCTL.io_code
377,26 → 406,27
@@:
cmp eax, DEV_SET_MASTERVOL
jne @F
mov eax, [edi+input]
mov eax, [eax]
call set_master_vol ;eax= vol
mov ebx, [edi+input]
stdcall set_master_vol, [ebx]
ret
@@:
cmp eax, DEV_GET_MASTERVOL
jne @F
mov ebx, [edi+output]
add ebx, new_app_base
test ebx, ebx
jz .fail
 
stdcall get_master_vol, ebx
ret
;@@:
; cmp eax, DEV_GET_INFO
; jne @F
; mov ebx, [edi+output]
; stdcall get_dev_info, ebx
; ret
@@:
cmp eax, DEV_GET_INFO
jne @F
mov ebx, [edi+output]
stdcall get_dev_info, ebx
ret
@@:
.fail:
or eax, -1
xor eax, eax
ret
endp
 
409,6 → 439,24
 
 
align 4
proc remap_irq ;for Intel chipsets ONLY !!!
mov eax, VALID_IRQ
bt eax, IRQ_LINE
jnc .exit
 
mov edx, 0x4D0
in ax,dx
bts ax, IRQ_LINE
out dx, aX
 
stdcall PciWrite8, dword 0, dword 0xF8, dword 0x61, dword IRQ_LINE
mov [ctrl.int_line], IRQ_LINE
 
.exit:
ret
endp
 
align 4
proc ac97_irq
 
; if DEBUG
416,7 → 464,38
; call SysMsgBoardStr
; end if
 
mov edx, PCM_OUT_CR_REG
mov al, 0x14
call [ctrl.ctrl_write8]
 
mov ax, 0x1c
mov edx, PCM_OUT_SR_REG
call [ctrl.ctrl_write16]
 
mov edx, PCM_OUT_CIV_REG
call [ctrl.ctrl_read8]
 
and eax, 0x1F
cmp eax, [civ_val]
je .skip
 
mov [civ_val], eax
dec eax
and eax, 0x1F
mov [ctrl.lvi_reg], eax
 
mov edx, PCM_OUT_LVI_REG
call [ctrl.ctrl_write8]
 
mov edx, PCM_OUT_CR_REG
mov ax, 0x1D
call [ctrl.ctrl_write8]
 
mov eax, [civ_val]
add eax, 2
and eax, 31
mov ebx, dword [buff_list+eax*4]
 
cmp [ctrl.user_callback], 0
je @f
 
426,7 → 505,7
 
.skip:
mov edx, PCM_OUT_CR_REG
mov ax, 0x11 ;0x1D
mov ax, 0x1D
call [ctrl.ctrl_write8]
ret
endp
443,8 → 522,7
cld
rep stosd
 
mov eax, [ctrl.buffer]
call GetPgAddr
stdcall GetPgAddr, [ctrl.buffer]
 
mov ebx, 0xC0002000
mov ecx, 4
495,11 → 573,10
add edi, 4
loop @B
 
mov eax, pcmout_bdl
mov ebx, eax
call GetPgAddr ;eax
and ebx, 0xFFF
add eax, ebx
mov ecx, pcmout_bdl
stdcall GetPgAddr, ecx
and ecx, 0xFFF
add eax, ecx
 
mov edx, PCM_OUT_BDL
call [ctrl.ctrl_write32]
508,6 → 585,7
mov [ctrl.lvi_reg], eax
mov edx, PCM_OUT_LVI_REG
call [ctrl.ctrl_write8]
 
ret
endp
 
524,7 → 602,7
inc eax
call PciApi
cmp eax, -1
je .err
je .no_pci
 
mov [last_bus], eax
 
548,8 → 626,7
add edi, 12
jmp @B
 
.next:
inc [devfn]
.next: inc [devfn]
cmp [devfn], 256
jb .next_dev
mov eax, [bus]
577,6 → 654,15
mov esi, [edi+8]
mov [ctrl.ctrl_setup], esi
 
cmp ebx, VID_INTEL
jne @F
mov [ctrl.vendor_ids], msg_Intel
ret
@@:
cmp ebx, VID_NVIDIA
jne @F
mov [ctrl.vendor_ids], msg_NVidia
@@:
cmp ebx, 0x1274
jne @F
mov [ctrl.vendor_ids], msgEnsoniq
584,6 → 670,9
@@:
mov [ctrl.vendor_ids], 0 ;something wrong ?
ret
.no_pci:
mov esi, msgPCI
call SysMsgBoardStr
.err:
xor eax, eax
ret
590,11 → 679,47
endp
 
align 4
proc get_LPC_bus ;for Intel chipsets ONLY !!!
locals
last_bus dd ?
bus dd ?
endl
 
xor eax, eax
mov [bus], eax
inc eax
call [PciApi]
cmp eax, -1
je .err
 
mov [last_bus], eax
.next_bus:
stdcall PciRead32, [bus], dword 0xF8, dword 0
test eax, eax
jz .next
cmp eax, -1
je .next
 
cmp eax, 0x24D08086
je .found
.next:
mov eax, [bus]
inc eax
cmp eax, [last_bus]
mov [bus], eax
jna .next_bus
.err:
xor eax, eax
dec eax
ret
.found:
mov eax, [bus]
ret
endp
 
align 4
proc init_controller
 
mov esi, msgPCIcmd
call SysMsgBoardStr
 
stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 4
mov ebx, eax
and eax, 0xFFFF
602,28 → 727,27
shr ebx, 16
mov [ctrl.pci_stat], ebx
 
call dword2str
call SysMsgBoardStr
stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x10
and eax,0xFFFE
mov [ctrl.codec_io_base], eax
 
mov esi, msgIObase
call SysMsgBoardStr
 
stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x10
; and eax, -16
stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x14
and eax, 0xFFC0
mov [ctrl.ctrl_io_base], eax
 
call dword2str
call SysMsgBoardStr
stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x18
mov [ctrl.codec_mem_base], eax
 
mov esi, msgIRQline
call SysMsgBoardStr
stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x1C
mov [ctrl.ctrl_mem_base], eax
 
stdcall PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x3C
and eax, 0xFF
mov [ctrl.int_line], eax
 
call dword2str
call SysMsgBoardStr
stdcall PciRead8, [ctrl.bus], [ctrl.devfn], dword 0x41
and eax, 0xFF
mov [ctrl.cfg_reg], eax
 
call [ctrl.ctrl_setup]
xor eax, eax
646,7 → 770,33
ret
endp
 
PG_SW equ 0x003
PG_NOCACHE equ 0x018
 
align 4
proc set_ICH4
stdcall AllocKernelSpace, dword 0x2000
mov edi, eax
stdcall MapPage, edi,[ctrl.codec_mem_base],PG_SW+PG_NOCACHE
mov [ctrl.codec_mem_base], edi
add edi, 0x1000
stdcall MapPage, edi, [ctrl.ctrl_mem_base],PG_SW+PG_NOCACHE
mov [ctrl.ctrl_mem_base], edi
 
mov [ctrl.codec_read16], codec_mem_r16 ;virtual
mov [ctrl.codec_write16], codec_mem_w16 ;virtual
 
mov [ctrl.ctrl_read8 ], ctrl_mem_r8 ;virtual
mov [ctrl.ctrl_read16], ctrl_mem_r16 ;virtual
mov [ctrl.ctrl_read32], ctrl_mem_r32 ;virtual
 
mov [ctrl.ctrl_write8 ], ctrl_mem_w8 ;virtual
mov [ctrl.ctrl_write16], ctrl_mem_w16 ;virtual
mov [ctrl.ctrl_write32], ctrl_mem_w32 ;virtual
ret
endp
 
align 4
proc reset_controller
 
xor eax, eax
668,6 → 818,7
 
mov edx, MC_IN_CR_REG
call [ctrl.ctrl_write8]
 
ret
endp
 
677,26 → 828,6
counter dd ?
endl
 
mov esi, msgControl
call SysMsgBoardStr
 
mov edx, GLOB_CTRL
call [ctrl.ctrl_read32]
call dword2str
call SysMsgBoardStr
 
mov esi, msgStatus
call SysMsgBoardStr
 
mov edx, CTRL_STAT
call [ctrl.ctrl_read32]
 
call dword2str
call SysMsgBoardStr
 
test eax, CTRL_ST_CREADY
jnz .ready
 
call reset_codec
and eax, eax
jz .err
861,7 → 992,8
endp
 
align 4
play:
proc play
 
mov eax, 16
mov [ctrl.lvi_reg], eax
mov edx, PCM_OUT_LVI_REG
870,20 → 1002,22
mov edx, PCM_OUT_CR_REG
mov ax, 0x1D
call [ctrl.ctrl_write8]
xor eax, eax
ret
endp
 
align 4
stop:
proc stop
mov edx, PCM_OUT_CR_REG
mov ax, 0x0
mov ax, 0x14
call [ctrl.ctrl_write8]
 
mov ax, 0x1c
mov edx, PCM_OUT_SR_REG
call [ctrl.ctrl_write16]
xor eax, eax
mov eax, 16
mov [ctrl.lvi_reg], eax
mov edx, PCM_OUT_LVI_REG
call [ctrl.ctrl_write8]
 
ret
endp
 
align 4
proc get_dev_info stdcall, p_info:dword
917,6 → 1051,7
 
mov ebx, [ctrl.pci_cmd]
mov [CTRL_INFO.pci_cmd], ebx
 
ret
endp
 
992,6 → 1127,8
xor eax, wax
inc eax
ret
 
align 4
.not_ready:
xor eax, eax
ret
1039,7 → 1176,7
rdtsc
sub eax, ebx
sbb edx, ecx
js @B
jb @B
 
pop eax
pop ebx
1053,87 → 1190,164
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
align 4
codec_io_r16:
proc codec_io_r16
add edx, [ctrl.codec_io_base]
in ax, dx
ret
endp
 
align 4
codec_io_w16:
proc codec_io_w16
add edx, [ctrl.codec_io_base]
out dx, ax
ret
endp
 
align 4
ctrl_io_r8:
proc ctrl_io_r8
add edx, [ctrl.ctrl_io_base]
in al, dx
ret
endp
 
align 4
ctrl_io_r16:
proc ctrl_io_r16
add edx, [ctrl.ctrl_io_base]
in ax, dx
ret
endp
 
align 4
ctrl_io_r32:
proc ctrl_io_r32
add edx, [ctrl.ctrl_io_base]
in eax, dx
ret
endp
 
align 4
ctrl_io_w8:
proc ctrl_io_w8
add edx, [ctrl.ctrl_io_base]
out dx, al
ret
endp
 
align 4
ctrl_io_w16:
proc ctrl_io_w16
add edx, [ctrl.ctrl_io_base]
out dx, ax
ret
endp
 
align 4
ctrl_io_w32:
proc ctrl_io_w32
add edx, [ctrl.ctrl_io_base]
out dx, eax
ret
endp
 
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; MEMORY MAPPED IO (os depended)
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
align 4
dword2str:
mov esi, hex_buff
mov ecx, -8
@@:
rol eax, 4
mov ebx, eax
and ebx, 0x0F
mov bl, [ebx+hexletters]
mov [8+esi+ecx], bl
inc ecx
jnz @B
proc codec_mem_r16
add edx, [ctrl.codec_mem_base]
mov ax, word [edx]
ret
endp
 
hexletters db '0123456789ABCDEF'
hex_buff db 8 dup(0),13,10,0
align 4
proc codec_mem_w16
add edx, [ctrl.codec_mem_base]
mov word [edx], ax
ret
endp
 
align 4
proc ctrl_mem_r8
add edx, [ctrl.ctrl_mem_base]
mov al, [edx]
ret
endp
 
align 4
proc ctrl_mem_r16
add edx, [ctrl.ctrl_mem_base]
mov ax, [edx]
ret
endp
 
align 4
proc ctrl_mem_r32
add edx, [ctrl.ctrl_mem_base]
mov eax, [edx]
ret
endp
 
align 4
proc ctrl_mem_w8
add edx, [ctrl.ctrl_mem_base]
mov [edx], al
 
ret
endp
 
align 4
proc ctrl_mem_w16
add edx, [ctrl.ctrl_mem_base]
mov [edx], ax
ret
endp
 
align 4
proc ctrl_mem_w32
add edx, [ctrl.ctrl_mem_base]
mov [edx], eax
ret
endp
 
 
include "codec.inc"
 
align 4
devices dd (0x5000 shl 16)+0x1274,msgEnsoniq,set_ICH
dd (0x5880 shl 16)+0x1274,msgVibra128,set_ICH
devices dd (CTRL_ICH shl 16)+VID_INTEL,msg_ICH, set_ICH
dd (CTRL_ICH0 shl 16)+VID_INTEL,msg_ICH0,set_ICH
dd (CTRL_ICH2 shl 16)+VID_INTEL,msg_ICH2,set_ICH
dd (CTRL_ICH3 shl 16)+VID_INTEL,msg_ICH3,set_ICH
dd (CTRL_ICH4 shl 16)+VID_INTEL,msg_ICH4,set_ICH4
dd (CTRL_ICH5 shl 16)+VID_INTEL,msg_ICH5,set_ICH4
dd (CTRL_ICH6 shl 16)+VID_INTEL,msg_ICH6,set_ICH4
dd (CTRL_ICH7 shl 16)+VID_INTEL,msg_ICH7,set_ICH4
 
dd (CTRL_NFORCE shl 16)+VID_NVIDIA,msg_NForce, set_ICH
dd (CTRL_NFORCE2 shl 16)+VID_NVIDIA,msg_NForce2,set_ICH
dd (CTRL_NFORCE3 shl 16)+VID_NVIDIA,msg_NForce3,set_ICH
dd (0x5000 shl 16)+0x1274,msgEnsoniq,set_ICH
 
dd 0 ;terminator
 
version dd 0x00040004
msg_ICH db 'Intel ICH', 13,10, 0
msg_ICH0 db 'Intel ICH0', 13,10, 0
msg_ICH2 db 'Intel ICH2', 13,10, 0
msg_ICH3 db 'Intel ICH3', 13,10, 0
msg_ICH4 db 'Intel ICH4', 13,10, 0
msg_ICH5 db 'Intel ICH5', 13,10, 0
msg_ICH6 db 'Intel ICH6', 13,10, 0
msg_ICH7 db 'Intel ICH7', 13,10, 0
msg_Intel db 'Intel Corp. ', 0
 
msgEnsoniq db 'Ensonic 1371',13,10,0
msgVibra128 db 'Sound Blaster AudioPCI Vibra 128',13,10,0
msg_NForce db 'NForce', 13,10, 0
msg_NForce2 db 'NForce 2', 13,10, 0
msg_NForce3 db 'NForce 3', 13,10, 0
msg_NVidia db 'NVidea', 0
 
msgEnsoniq db 'Ensonic 1371',0
 
szKernel db 'KERNEL', 0
sz_sound_srv db 'SOUND',0
 
msgDetect db 'detect hardware...',13,10,0
msgInit db 'detect hardware...',13,10,0
msgPCI db 'PCI accsess not supported',13,10,0
msgFail db 'device not found',13,10,0
msgAttchIRQ db 'IRQ line not supported', 13,10, 0
msgInvIRQ db 'IRQ line not assigned or invalid', 13,10, 0
1152,11 → 1366,6
msgCRFail db 'cold reset failed',13,10,0
msgCFail db 'codec not ready',13,10,0
msgResetOk db 'reset complete',13,10,0
msgStatus db 'global status ',0
msgControl db 'global control ',0
msgPCIcmd db 'PCI command ',0
msgIObase db 'IO base ',0
msgIRQline db 'IRQ line ',0
 
section '.data' data readable writable align 16
 
/kernel/branches/flat_kernel/kernel.asm
721,7 → 721,12
cmp [IDEContrRegsBaseAddr], 0
setnz [dma_hdd]
 
call init_uart_service
;if 0
call init_com
mov eax, msg_com
mov ebx, 46
call comm_send
;end if
 
sti
jmp $ ; wait here for timer to take control
728,6 → 733,11
 
; Fly :)
 
;if 0
msg_com db 'com1 port message ',0x0D, 0x0A
db 'test comm_send() function',0
;end if
 
include 'unpacker.inc'
include 'fdo.inc'
 
/kernel/branches/flat_kernel/kernel32.inc
263,10 → 263,10
; Network Interface & TCPIP Stack
 
include "network/stack.inc"
 
;if 0
include "drivers/comport.asm"
;end if
 
 
; Mouse pointer
 
include "gui/mouse.inc"
/kernel/branches/flat_kernel/boot/bootcode.inc
216,18 → 216,11
push 0
pop es
and word [es:0x9031], 0
; \begin{Mario79}
; find HDD IDE DMA PCI device
; check for PCI BIOS
mov ax, 0xB101
int 0x1A
jc .nopci
cmp edx, 'PCI '
jnz .nopci
; find PCI class code
; class 1 = mass storage
; subclass 1 = IDE controller
; a) class 1, subclass 1, programming interface 0x80
mov ax, 0xB103
mov ecx, 1*10000h + 1*100h + 0x80
mov si, 0 ; device index = 0
/kernel/branches/flat_kernel/fs/fat12.inc
1893,6 → 1893,7
dec edi
dec edi
 
; lea eax, [edi-FLOPPY_FAT]
mov eax, edi
sub eax, FLOPPY_FAT