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Regard whitespace Rev 5247 → Rev 5194

/drivers/ethernet/i8255x.asm
187,6 → 187,21
 
ends
 
macro delay {
push eax
in ax, dx
in ax, dx
in ax, dx
in ax, dx
in ax, dx
in ax, dx
in ax, dx
in ax, dx
in ax, dx
in ax, dx
pop eax
}
 
;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; ;;
;; proc START ;;
881,7 → 896,7
 
mov al, EE_CS
out dx, al
call udelay
delay
 
;-----------------------
; Write this to the chip
893,11 → 908,11
or al, EE_DI
@@:
out dx, al
call udelay
delay
 
and al, not EE_SK
out dx, al
call udelay
delay
 
loop .loop
 
911,7 → 926,7
shl esi, 1
mov al, EE_CS + EE_SK
out dx, al
call udelay
delay
 
in al, dx
test al, EE_DO
921,7 → 936,7
 
mov al, EE_CS
out dx, al
call udelay
delay
 
loop .loop2
 
970,11 → 985,11
or al, EE_DI
@@:
out dx, al
call udelay
delay
 
and al, not EE_SK
out dx, al
call udelay
delay
 
loop .loop
 
990,11 → 1005,11
or al, EE_DI
@@:
out dx, al
call udelay
delay
 
and al, not EE_SK
out dx, al
call udelay
delay
 
loop .loop2
 
1017,7 → 1032,7
 
mov al, EE_CS ; activate eeprom
out dx, al
call udelay
delay
 
mov si, EE_READ shl 13
xor ecx, ecx
1028,11 → 1043,11
or al, EE_DI
@@:
out dx, al
call udelay
delay
 
and al, not EE_SK
out dx, al
call udelay
delay
 
inc ecx
 
1061,17 → 1076,7
ret
 
 
; Wait a minimum of 2µs
udelay:
pusha
mov esi, 1
invoke Sleep
popa
 
ret
 
 
 
; cx = phy addr
; dx = phy reg addr
 
1094,7 → 1099,7
out dx, eax
 
.wait:
call udelay
delay
in eax, dx
test eax, 1 shl 28 ; ready bit
jz .wait
1126,7 → 1131,7
out dx, eax
 
.wait:
call udelay
delay
in eax, dx
test eax, 1 shl 28 ; ready bit
jz .wait