WebSVN – Kolibri OS – Path Comparison – / – /drivers/ Rev 6934 and /drivers/ Rev 6935

Regard whitespace Rev 6934 → Rev 6935

/drivers/video/i965/gen75_vpp_vebox.h
File deleted

/drivers/video/i965/i965_media_mpeg2.c
File deleted

/drivers/video/i965/va_backend_compat.h
File deleted

/drivers/video/i965/i965_decoder.h
File deleted

/drivers/video/i965/i965_avc_hw_scoreboard.c
File deleted

/drivers/video/i965/intel_driver.c
File deleted

/drivers/video/i965/i965_structs.h
File deleted

/drivers/video/i965/i965_media_mpeg2.h
File deleted

/drivers/video/i965/i965_media.c
File deleted

/drivers/video/i965/i965_avc_hw_scoreboard.h
File deleted

/drivers/video/i965/intel_driver.h
File deleted

/drivers/video/i965/i965_defines.h
File deleted

/drivers/video/i965/sysdeps.h
File deleted

/drivers/video/i965/i965_media.h
File deleted

/drivers/video/i965/object_heap.c
File deleted

/drivers/video/i965/intel_memman.c
File deleted

/drivers/video/i965/gen6_vme.c
File deleted

/drivers/video/i965/i965_mutext.h
File deleted

/drivers/video/i965/object_heap.h
File deleted

/drivers/video/i965/intel_compiler.h
File deleted

/drivers/video/i965/intel_memman.h
File deleted

/drivers/video/i965/gen6_vme.h
File deleted

/drivers/video/i965/i965_avc_bsd.c
File deleted

/drivers/video/i965/i965_avc_ildb.c
File deleted

/drivers/video/i965/i965_avc_bsd.h
File deleted

/drivers/video/i965/gen6_mfc.c
File deleted

/drivers/video/i965/i965_avc_ildb.h
File deleted

/drivers/video/i965/gen6_mfd.c
File deleted

/drivers/video/i965/gen7_mfd.c
File deleted

/drivers/video/i965/gen6_mfc.h
File deleted

/drivers/video/i965/gen6_mfd.h
File deleted

/drivers/video/i965/i965_render.c
File deleted

/drivers/video/i965/i965_encoder.c
File deleted

/drivers/video/i965/gen7_mfd.h
File deleted

/drivers/video/i965/gen75_vme.c
File deleted

/drivers/video/i965/i965_post_processing.c
File deleted

/drivers/video/i965/i965_drv_video.c
File deleted

/drivers/video/i965/i965_media_h264.c
File deleted

/drivers/video/i965/i965_render.h
File deleted

/drivers/video/i965/i965_encoder.h
File deleted

/drivers/video/i965/i965_decoder_utils.c
File deleted

/drivers/video/i965/i965_post_processing.h
File deleted

/drivers/video/i965/i965_drv_video.h
File deleted

/drivers/video/i965/i965_media_h264.h
File deleted

/drivers/video/i965/intel_batchbuffer.c
File deleted

/drivers/video/i965/i965_decoder_utils.h
File deleted

/drivers/video/i965/shaders/mpeg2/vld/field_forward_16x8.g4b
File deleted

/drivers/video/i965/shaders/mpeg2/vld/frame_frame_pred_forward.g4b.gen5
File deleted

 /drivers/video/drm/drm_atomic_helper.c
 ,7 → 108,6
         struct drm_crtc_state *crtc_state;
         struct drm_connector *connector;
         struct drm_connector_state *connector_state;
-        int ret;
         /*
          * We can only steal an encoder coming from a connector, which means we
 ,9 → 138,6
                 if (IS_ERR(connector_state))
                         return PTR_ERR(connector_state);
-                ret = drm_atomic_set_crtc_for_connector(connector_state, NULL);
-                if (ret)
-                        return ret;
                 connector_state->best_encoder = NULL;
         }
 ,7 → 265,7
         struct drm_connector *connector;
         struct drm_connector_state *conn_state;
         int i;
-        bool ret;
+        int ret;
         for_each_crtc_in_state(state, crtc, crtc_state, i) {
                 if (!crtc_state->mode_changed &&

 /drivers/video/drm/drm_dp_mst_topology.c
 ,6 → 916,7
                 /* no need to clean up vcpi
                  * as if we have no connector we never setup a vcpi */
                 drm_dp_port_teardown_pdt(port, port->pdt);
+                port->pdt = DP_PEER_DEVICE_NONE;
         }
         kfree(port);
 }
 ,7 → 1162,9
                         drm_dp_put_port(port);
                         goto out;
                 }
-                if (port->port_num >= DP_MST_LOGICAL_PORT_0) {
+                if ((port->pdt == DP_PEER_DEVICE_DP_LEGACY_CONV ||
+                     port->pdt == DP_PEER_DEVICE_SST_SINK) &&
+                    port->port_num >= DP_MST_LOGICAL_PORT_0) {
                         port->cached_edid = drm_get_edid(port->connector, &port->aux.ddc);
                         drm_mode_connector_set_tile_property(port->connector);
                 }
 ,7 → 1819,7
                                 mgr->payloads[i].num_slots = req_payload.num_slots;
                         } else if (mgr->payloads[i].num_slots) {
                                 mgr->payloads[i].num_slots = 0;
-                                drm_dp_destroy_payload_step1(mgr, port, port->vcpi.vcpi, &mgr->payloads[i]);
+                                drm_dp_destroy_payload_step1(mgr, port, mgr->payloads[i].vcpi, &mgr->payloads[i]);
                                 req_payload.payload_state = mgr->payloads[i].payload_state;
                                 mgr->payloads[i].start_slot = 0;
                         }

 /drivers/video/drm/drm_edid.c
 ,6 → 75,8
 #define EDID_QUIRK_FORCE_12BPC                  (1 << 9)
 /* Force 6bpc */
 #define EDID_QUIRK_FORCE_6BPC                   (1 << 10)
+/* Force 10bpc */
+#define EDID_QUIRK_FORCE_10BPC                  (1 << 11)
 struct detailed_mode_closure {
         struct drm_connector *connector;
 ,6 → 119,9
         { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
           EDID_QUIRK_DETAILED_IN_CM },
+        /* LGD panel of HP zBook 17 G2, eDP 10 bpc, but reports unknown bpc */
+        { "LGD", 764, EDID_QUIRK_FORCE_10BPC },
         /* LG Philips LCD LP154W01-A5 */
         { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
         { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
 ,6 → 149,9
         /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
         { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },
+        /* Rotel RSX-1058 forwards sink's EDID but only does HDMI 1.1*/
+        { "ETR", 13896, EDID_QUIRK_FORCE_8BPC },
 };
 /*
 ,6 → 3839,9
         if (quirks & EDID_QUIRK_FORCE_8BPC)
                 connector->display_info.bpc = 8;
+        if (quirks & EDID_QUIRK_FORCE_10BPC)
+                connector->display_info.bpc = 10;
         if (quirks & EDID_QUIRK_FORCE_12BPC)
                 connector->display_info.bpc = 12;

 /drivers/video/drm/drm_gem.c
 ,6 → 28,7
 #include <linux/types.h>
 #include <linux/slab.h>
 #include <linux/mm.h>
+#include <linux/uaccess.h>
 #include <linux/fs.h>
 #include <linux/file.h>
 #include <linux/module.h>
 ,10 → 310,9
         spin_unlock(&file_priv->table_lock);
         idr_preload_end();
         mutex_unlock(&dev->object_name_lock);
-        if (ret < 0) {
-                drm_gem_object_handle_unreference_unlocked(obj);
-                return ret;
-        }
+        if (ret < 0)
+                goto err_unref;
         *handlep = ret;
 //      ret = drm_vma_node_allow(&obj->vma_node, file_priv->filp);
 ,13 → 323,21
         if (dev->driver->gem_open_object) {
                 ret = dev->driver->gem_open_object(obj, file_priv);
-                if (ret) {
-                        drm_gem_handle_delete(file_priv, *handlep);
-                        return ret;
+                if (ret)
+                        goto err_revoke;
                 }
-        }
         return 0;
+err_revoke:
+//      drm_vma_node_revoke(&obj->vma_node, file_priv->filp);
+err_remove:
+        spin_lock(&file_priv->table_lock);
+        idr_remove(&file_priv->object_idr, *handlep);
+        spin_unlock(&file_priv->table_lock);
+err_unref:
+        drm_gem_object_handle_unreference_unlocked(obj);
+        return ret;
 }
 /**

 /drivers/video/drm/drm_irq.c
 ,7 → 36,7
 //#include "drm_trace.h"
 #include "drm_internal.h"
-//#include <linux/interrupt.h>   /* For task queue support */
+#include <linux/interrupt.h>    /* For task queue support */
 #include <linux/slab.h>
 #include <linux/vgaarb.h>
 ,6 → 1238,9
         spin_lock(&dev->vbl_lock);
         DRM_DEBUG_VBL("crtc %d, vblank enabled %d, inmodeset %d\n",
                       pipe, vblank->enabled, vblank->inmodeset);
+        /* Avoid redundant vblank disables without previous drm_vblank_on(). */
+        if (drm_core_check_feature(dev, DRIVER_ATOMIC) || !vblank->inmodeset)
         vblank_disable_and_save(dev, pipe);
         wake_up(&vblank->queue);

 /drivers/video/drm/drm_modes.c
 ,6 → 1401,13
                 return NULL;
         mode->type |= DRM_MODE_TYPE_USERDEF;
+        /* fix up 1368x768: GFT/CVT can't express 1366 width due to alignment */
+        if (cmd->xres == 1366 && mode->hdisplay == 1368) {
+                mode->hdisplay = 1366;
+                mode->hsync_start--;
+                mode->hsync_end--;
+                drm_mode_set_name(mode);
+        }
         drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
         return mode;
 }

/drivers/video/drm/drm_probe_helper.c
323,12 → 323,10
*/
void drm_kms_helper_hotplug_event(struct drm_device *dev)
{
ENTER();
/* send a uevent + call fbdev */
drm_sysfs_hotplug_event(dev);
if (dev->mode_config.funcs->output_poll_changed)
dev->mode_config.funcs->output_poll_changed(dev);
LEAVE();
}
EXPORT_SYMBOL(drm_kms_helper_hotplug_event);

 /drivers/video/drm/drm_stub.c
 ,45 → 561,4
     DRM_DEBUG("generating hotplug event\n");
 }
-u64 div64_u64_rem(u64 dividend, u64 divisor, u64 *remainder)
-{
-    u32 high = divisor >> 32;
-    u64 quot;
-    if (high == 0) {
-        u32 rem32;
-        quot = div_u64_rem(dividend, divisor, &rem32);
-        *remainder = rem32;
-    } else {
-        int n = 1 + fls(high);
-        quot = div_u64(dividend >> n, divisor >> n);
-        if (quot != 0)
-            quot--;
-        *remainder = dividend - quot * divisor;
-        if (*remainder >= divisor) {
-            quot++;
-            *remainder -= divisor;
-        }
-    }
-    return quot;
-}
-u64 div64_u64(u64 dividend, u64 divisor)
-{
-        u32 high, d;
-        high = divisor >> 32;
-        if (high) {
-                unsigned int shift = fls(high);
-                d = divisor >> shift;
-                dividend >>= shift;
-        } else
-                d = divisor;
-        return div_u64(dividend, d);
-}

 /drivers/video/drm/i915/i915_drv.h
 ,7 → 1173,7
         struct intel_rps_client semaphores, mmioflips;
         /* manual wa residency calculations */
-        struct intel_rps_ei up_ei, down_ei;
+        struct intel_rps_ei ei;
         /*
          * Protects RPS/RC6 register access and PCU communication.
 ,10 → 2158,6
         /** Record of address bit 17 of each page at last unbind. */
         unsigned long *bit_17;
-        union {
-                /** for phy allocated objects */
-                struct drm_dma_handle *phys_handle;
                 struct i915_gem_userptr {
                         uintptr_t ptr;
                         unsigned read_only :1;
 ,8 → 2168,10
                         struct i915_mmu_object *mmu_object;
                         struct work_struct *work;
                 } userptr;
+        /** for phys allocated objects */
+        struct drm_dma_handle *phys_handle;
         };
-};
 #define to_intel_bo(x) container_of(x, struct drm_i915_gem_object, base)
 void i915_gem_track_fb(struct drm_i915_gem_object *old,
 ,6 → 3322,9
 }
 extern void intel_i2c_reset(struct drm_device *dev);
+/* intel_bios.c */
+bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port);
 /* intel_opregion.c */
 #ifdef CONFIG_ACPI
 extern int intel_opregion_setup(struct drm_device *dev);

 /drivers/video/drm/i915/i915_gem_execbuffer.c
 ,6 → 32,7
 #include "i915_trace.h"
 #include "intel_drv.h"
 #include <linux/dma_remapping.h>
+#include <linux/uaccess.h>
 #define  __EXEC_OBJECT_HAS_PIN (1<<31)
 #define  __EXEC_OBJECT_HAS_FENCE (1<<30)
 ,13 → 542,13
          * acquire the struct mutex again. Obviously this is bad and so
          * lockdep complains vehemently.
          */
-//      pagefault_disable();
+        pagefault_disable();
         list_for_each_entry(vma, &eb->vmas, exec_list) {
                 ret = i915_gem_execbuffer_relocate_vma(vma, eb);
                 if (ret)
                         break;
         }
-//   pagefault_enable();
+        pagefault_enable();
         return ret;
 }

 /drivers/video/drm/i915/i915_irq.c
 ,46 → 993,18
         ei->media_c0 = I915_READ(VLV_MEDIA_C0_COUNT);
 }
-static bool vlv_c0_above(struct drm_i915_private *dev_priv,
-                         const struct intel_rps_ei *old,
-                         const struct intel_rps_ei *now,
-                         int threshold)
-{
-        u64 time, c0;
-        unsigned int mul = 100;
-        if (old->cz_clock == 0)
-                return false;
-        if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
-                mul <<= 8;
-        time = now->cz_clock - old->cz_clock;
-        time *= threshold * dev_priv->czclk_freq;
-        /* Workload can be split between render + media, e.g. SwapBuffers
-         * being blitted in X after being rendered in mesa. To account for
-         * this we need to combine both engines into our activity counter.
-         */
-        c0 = now->render_c0 - old->render_c0;
-        c0 += now->media_c0 - old->media_c0;
-        c0 *= mul * VLV_CZ_CLOCK_TO_MILLI_SEC;
-        return c0 >= time;
-}
 void gen6_rps_reset_ei(struct drm_i915_private *dev_priv)
 {
-        vlv_c0_read(dev_priv, &dev_priv->rps.down_ei);
-        dev_priv->rps.up_ei = dev_priv->rps.down_ei;
+        memset(&dev_priv->rps.ei, 0, sizeof(dev_priv->rps.ei));
 }
 static u32 vlv_wa_c0_ei(struct drm_i915_private *dev_priv, u32 pm_iir)
 {
+        const struct intel_rps_ei *prev = &dev_priv->rps.ei;
         struct intel_rps_ei now;
         u32 events = 0;
-        if ((pm_iir & (GEN6_PM_RP_DOWN_EI_EXPIRED | GEN6_PM_RP_UP_EI_EXPIRED)) == 0)
+        if ((pm_iir & GEN6_PM_RP_UP_EI_EXPIRED) == 0)
                 return 0;
         vlv_c0_read(dev_priv, &now);
 ,22 → 1011,33
         if (now.cz_clock == 0)
                 return 0;
-        if (pm_iir & GEN6_PM_RP_DOWN_EI_EXPIRED) {
-                if (!vlv_c0_above(dev_priv,
-                                  &dev_priv->rps.down_ei, &now,
-                                  dev_priv->rps.down_threshold))
-                        events |= GEN6_PM_RP_DOWN_THRESHOLD;
-                dev_priv->rps.down_ei = now;
-        }
+        if (prev->cz_clock) {
+                u64 time, c0;
+                unsigned int mul;
-        if (pm_iir & GEN6_PM_RP_UP_EI_EXPIRED) {
-                if (vlv_c0_above(dev_priv,
-                                 &dev_priv->rps.up_ei, &now,
-                                 dev_priv->rps.up_threshold))
-                        events |= GEN6_PM_RP_UP_THRESHOLD;
-                dev_priv->rps.up_ei = now;
+                mul = VLV_CZ_CLOCK_TO_MILLI_SEC * 100; /* scale to threshold% */
+                if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
+                        mul <<= 8;
+                time = now.cz_clock - prev->cz_clock;
+                time *= dev_priv->czclk_freq;
+                /* Workload can be split between render + media,
+                 * e.g. SwapBuffers being blitted in X after being rendered in
+                 * mesa. To account for this we need to combine both engines
+                 * into our activity counter.
+                 */
+                c0 = now.render_c0 - prev->render_c0;
+                c0 += now.media_c0 - prev->media_c0;
+                c0 *= mul;
+                if (c0 > time * dev_priv->rps.up_threshold)
+                        events = GEN6_PM_RP_UP_THRESHOLD;
+                else if (c0 < time * dev_priv->rps.down_threshold)
+                        events = GEN6_PM_RP_DOWN_THRESHOLD;
         }
+        dev_priv->rps.ei = now;
         return events;
 }
 ,7 → 4325,7
         /* Let's track the enabled rps events */
         if (IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv))
                 /* WaGsvRC0ResidencyMethod:vlv */
-                dev_priv->pm_rps_events = GEN6_PM_RP_DOWN_EI_EXPIRED | GEN6_PM_RP_UP_EI_EXPIRED;
+                dev_priv->pm_rps_events = GEN6_PM_RP_UP_EI_EXPIRED;
         else
                 dev_priv->pm_rps_events = GEN6_PM_RPS_EVENTS;

 /drivers/video/drm/i915/intel_crt.c
 ,6 → 445,7
         struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
         struct edid *edid;
         struct i2c_adapter *i2c;
+        bool ret = false;
         BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
 ,10 → 462,10
                  */
                 if (!is_digital) {
                         DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
-                        return true;
+                        ret = true;
+                } else {
+                        DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
                 }
-                DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
         } else {
                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
         }
 ,7 → 472,7
         kfree(edid);
-        return false;
+        return ret;
 }
 static enum drm_connector_status

 /drivers/video/drm/i915/intel_display.c
 ,10 → 3948,10
         drm_crtc_vblank_put(&intel_crtc->base);
         wake_up_all(&dev_priv->pending_flip_queue);
-        queue_work(dev_priv->wq, &work->work);
         trace_i915_flip_complete(intel_crtc->plane,
                                  work->pending_flip_obj);
+        queue_work(dev_priv->wq, &work->work);
 }
 void intel_crtc_wait_for_pending_flips(struct drm_crtc *crtc)

 /drivers/video/drm/i915/intel_dp.c
 ,7 → 4646,7
  *
  * Return %true if @port is connected, %false otherwise.
  */
-bool intel_digital_port_connected(struct drm_i915_private *dev_priv,
+static bool intel_digital_port_connected(struct drm_i915_private *dev_priv,
                                          struct intel_digital_port *port)
 {
         if (HAS_PCH_IBX(dev_priv))

 /drivers/video/drm/i915/intel_drv.h
 ,7 → 118,7
 struct intel_framebuffer {
         struct drm_framebuffer base;
         struct drm_i915_gem_object *obj;
-    void   *private;
+        void   *private; /*Kolibri */
 };
 struct intel_fbdev {
 ,8 → 1230,6
 void intel_edp_drrs_invalidate(struct drm_device *dev,
                 unsigned frontbuffer_bits);
 void intel_edp_drrs_flush(struct drm_device *dev, unsigned frontbuffer_bits);
-bool intel_digital_port_connected(struct drm_i915_private *dev_priv,
-                                         struct intel_digital_port *port);
 void hsw_dp_set_ddi_pll_sel(struct intel_crtc_state *pipe_config);
 /* intel_dp_mst.c */

 /drivers/video/drm/i915/intel_hdmi.c
 ,16 → 1331,15
 }
 static bool
-intel_hdmi_set_edid(struct drm_connector *connector, bool force)
+intel_hdmi_set_edid(struct drm_connector *connector)
 {
         struct drm_i915_private *dev_priv = to_i915(connector->dev);
         struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
-        struct edid *edid = NULL;
+        struct edid *edid;
         bool connected = false;
         intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS);
-        if (force)
                 edid = drm_get_edid(connector,
                                     intel_gmbus_get_adapter(dev_priv,
                                     intel_hdmi->ddc_bus));
 ,10 → 1370,7
 intel_hdmi_detect(struct drm_connector *connector, bool force)
 {
         enum drm_connector_status status;
-        struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
         struct drm_i915_private *dev_priv = to_i915(connector->dev);
-        bool live_status = false;
-        unsigned int try;
         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
                       connector->base.id, connector->name);
 ,27 → 1377,9
         intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS);
-        for (try = 0; !live_status && try < 9; try++) {
-                if (try)
-                        msleep(10);
-                live_status = intel_digital_port_connected(dev_priv,
-                                hdmi_to_dig_port(intel_hdmi));
-        }
-        if (!live_status) {
-                DRM_DEBUG_KMS("HDMI live status down\n");
-                /*
-                 * Live status register is not reliable on all intel platforms.
-                 * So consider live_status only for certain platforms, for
-                 * others, read EDID to determine presence of sink.
-                 */
-                if (INTEL_INFO(dev_priv)->gen < 7 || IS_IVYBRIDGE(dev_priv))
-                        live_status = true;
-        }
         intel_hdmi_unset_edid(connector);
-        if (intel_hdmi_set_edid(connector, live_status)) {
+        if (intel_hdmi_set_edid(connector)) {
                 struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
                 hdmi_to_dig_port(intel_hdmi)->base.type = INTEL_OUTPUT_HDMI;
 ,7 → 1405,7
         if (connector->status != connector_status_connected)
                 return;
-        intel_hdmi_set_edid(connector, true);
+        intel_hdmi_set_edid(connector);
         hdmi_to_dig_port(intel_hdmi)->base.type = INTEL_OUTPUT_HDMI;
 }
 ,6 → 1997,50
         intel_hdmi->aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
 }
+static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,
+                             enum port port)
+{
+        const struct ddi_vbt_port_info *info =
+                &dev_priv->vbt.ddi_port_info[port];
+        u8 ddc_pin;
+        if (info->alternate_ddc_pin) {
+                DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (VBT)\n",
+                              info->alternate_ddc_pin, port_name(port));
+                return info->alternate_ddc_pin;
+        }
+        switch (port) {
+        case PORT_B:
+                if (IS_BROXTON(dev_priv))
+                        ddc_pin = GMBUS_PIN_1_BXT;
+                else
+                        ddc_pin = GMBUS_PIN_DPB;
+                break;
+        case PORT_C:
+                if (IS_BROXTON(dev_priv))
+                        ddc_pin = GMBUS_PIN_2_BXT;
+                else
+                        ddc_pin = GMBUS_PIN_DPC;
+                break;
+        case PORT_D:
+                if (IS_CHERRYVIEW(dev_priv))
+                        ddc_pin = GMBUS_PIN_DPD_CHV;
+                else
+                        ddc_pin = GMBUS_PIN_DPD;
+                break;
+        default:
+                MISSING_CASE(port);
+                ddc_pin = GMBUS_PIN_DPB;
+                break;
+        }
+        DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (platform default)\n",
+                      ddc_pin, port_name(port));
+        return ddc_pin;
+}
 void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
                                struct intel_connector *intel_connector)
 {
 ,7 → 2050,6
         struct drm_device *dev = intel_encoder->base.dev;
         struct drm_i915_private *dev_priv = dev->dev_private;
         enum port port = intel_dig_port->port;
-        uint8_t alternate_ddc_pin;
         DRM_DEBUG_KMS("Adding HDMI connector on port %c\n",
                       port_name(port));
 ,12 → 2062,10
         connector->doublescan_allowed = 0;
         connector->stereo_allowed = 1;
+        intel_hdmi->ddc_bus = intel_hdmi_ddc_pin(dev_priv, port);
         switch (port) {
         case PORT_B:
-                if (IS_BROXTON(dev_priv))
-                        intel_hdmi->ddc_bus = GMBUS_PIN_1_BXT;
-                else
-                        intel_hdmi->ddc_bus = GMBUS_PIN_DPB;
                 /*
                  * On BXT A0/A1, sw needs to activate DDIA HPD logic and
                  * interrupts to check the external panel connection.
 ,46 → 2076,17
                         intel_encoder->hpd_pin = HPD_PORT_B;
                 break;
         case PORT_C:
-                if (IS_BROXTON(dev_priv))
-                        intel_hdmi->ddc_bus = GMBUS_PIN_2_BXT;
-                else
-                        intel_hdmi->ddc_bus = GMBUS_PIN_DPC;
                 intel_encoder->hpd_pin = HPD_PORT_C;
                 break;
         case PORT_D:
-                if (WARN_ON(IS_BROXTON(dev_priv)))
-                        intel_hdmi->ddc_bus = GMBUS_PIN_DISABLED;
-                else if (IS_CHERRYVIEW(dev_priv))
-                        intel_hdmi->ddc_bus = GMBUS_PIN_DPD_CHV;
-                else
-                        intel_hdmi->ddc_bus = GMBUS_PIN_DPD;
                 intel_encoder->hpd_pin = HPD_PORT_D;
                 break;
         case PORT_E:
-                /* On SKL PORT E doesn't have seperate GMBUS pin
-                 *  We rely on VBT to set a proper alternate GMBUS pin. */
-                alternate_ddc_pin =
-                        dev_priv->vbt.ddi_port_info[PORT_E].alternate_ddc_pin;
-                switch (alternate_ddc_pin) {
-                case DDC_PIN_B:
-                        intel_hdmi->ddc_bus = GMBUS_PIN_DPB;
-                        break;
-                case DDC_PIN_C:
-                        intel_hdmi->ddc_bus = GMBUS_PIN_DPC;
-                        break;
-                case DDC_PIN_D:
-                        intel_hdmi->ddc_bus = GMBUS_PIN_DPD;
-                        break;
-                default:
-                        MISSING_CASE(alternate_ddc_pin);
-                }
                 intel_encoder->hpd_pin = HPD_PORT_E;
                 break;
-        case PORT_A:
-                intel_encoder->hpd_pin = HPD_PORT_A;
-                /* Internal port only for eDP. */
         default:
-                BUG();
+                MISSING_CASE(port);
+                return;
         }
         if (IS_VALLEYVIEW(dev)) {

 /drivers/video/drm/i915/intel_pm.c
 ,32 → 2102,34
                                 GEN9_MEM_LATENCY_LEVEL_MASK;
                 /*
+                 * If a level n (n > 1) has a 0us latency, all levels m (m >= n)
+                 * need to be disabled. We make sure to sanitize the values out
+                 * of the punit to satisfy this requirement.
+                 */
+                for (level = 1; level <= max_level; level++) {
+                        if (wm[level] == 0) {
+                                for (i = level + 1; i <= max_level; i++)
+                                        wm[i] = 0;
+                                break;
+                        }
+                }
+                /*
                  * WaWmMemoryReadLatency:skl
                  *
                  * punit doesn't take into account the read latency so we need
-                 * to add 2us to the various latency levels we retrieve from
-                 * the punit.
-                 *   - W0 is a bit special in that it's the only level that
-                 *   can't be disabled if we want to have display working, so
-                 *   we always add 2us there.
-                 *   - For levels >=1, punit returns 0us latency when they are
-                 *   disabled, so we respect that and don't add 2us then
-                 *
-                 * Additionally, if a level n (n > 1) has a 0us latency, all
-                 * levels m (m >= n) need to be disabled. We make sure to
-                 * sanitize the values out of the punit to satisfy this
-                 * requirement.
+                 * to add 2us to the various latency levels we retrieve from the
+                 * punit when level 0 response data us 0us.
                  */
+                if (wm[0] == 0) {
                 wm[0] += 2;
-                for (level = 1; level <= max_level; level++)
-                        if (wm[level] != 0)
+                        for (level = 1; level <= max_level; level++) {
+                                if (wm[level] == 0)
+                                        break;
                                 wm[level] += 2;
-                        else {
-                                for (i = level + 1; i <= max_level; i++)
-                                        wm[i] = 0;
+                        }
+                }
-                                break;
-                        }
         } else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) {
                 uint64_t sskpd = I915_READ64(MCH_SSKPD);
 ,6 → 4381,12
                 break;
         }
+        /* When byt can survive without system hang with dynamic
+         * sw freq adjustments, this restriction can be lifted.
+         */
+        if (IS_VALLEYVIEW(dev_priv))
+                goto skip_hw_write;
         I915_WRITE(GEN6_RP_UP_EI,
                 GT_INTERVAL_FROM_US(dev_priv, ei_up));
         I915_WRITE(GEN6_RP_UP_THRESHOLD,
 ,6 → 4405,7
                     GEN6_RP_UP_BUSY_AVG |
                     GEN6_RP_DOWN_IDLE_AVG);
+skip_hw_write:
         dev_priv->rps.power = new_power;
         dev_priv->rps.up_threshold = threshold_up;
         dev_priv->rps.down_threshold = threshold_down;
 ,8 → 4416,9
 {
         u32 mask = 0;
+        /* We use UP_EI_EXPIRED interupts for both up/down in manual mode */
         if (val > dev_priv->rps.min_freq_softlimit)
-                mask |= GEN6_PM_RP_DOWN_EI_EXPIRED | GEN6_PM_RP_DOWN_THRESHOLD | GEN6_PM_RP_DOWN_TIMEOUT;
+                mask |= GEN6_PM_RP_UP_EI_EXPIRED | GEN6_PM_RP_DOWN_THRESHOLD | GEN6_PM_RP_DOWN_TIMEOUT;
         if (val < dev_priv->rps.max_freq_softlimit)
                 mask |= GEN6_PM_RP_UP_EI_EXPIRED | GEN6_PM_RP_UP_THRESHOLD;
 ,7 → 4522,7
 {
         mutex_lock(&dev_priv->rps.hw_lock);
         if (dev_priv->rps.enabled) {
-                if (dev_priv->pm_rps_events & (GEN6_PM_RP_DOWN_EI_EXPIRED | GEN6_PM_RP_UP_EI_EXPIRED))
+                if (dev_priv->pm_rps_events & GEN6_PM_RP_UP_EI_EXPIRED)
                         gen6_rps_reset_ei(dev_priv);
                 I915_WRITE(GEN6_PMINTRMSK,
                            gen6_rps_pm_mask(dev_priv, dev_priv->rps.cur_freq));
 ,9 → 6811,20
 static void vlv_init_display_clock_gating(struct drm_i915_private *dev_priv)
 {
-        I915_WRITE(DSPCLK_GATE_D, VRHUNIT_CLOCK_GATE_DISABLE);
+        u32 val;
         /*
+        * On driver load, a pipe may be active and driving a DSI display.
+        * Preserve DPOUNIT_CLOCK_GATE_DISABLE to avoid the pipe getting stuck
+        * (and never recovering) in this case. intel_dsi_post_disable() will
+        * clear it when we turn off the display.
+        */
+        val = I915_READ(DSPCLK_GATE_D);
+        val &= DPOUNIT_CLOCK_GATE_DISABLE;
+        val |= VRHUNIT_CLOCK_GATE_DISABLE;
+        I915_WRITE(DSPCLK_GATE_D, val);
+        /*
          * Disable trickle feed and enable pnd deadline calculation
          */
         I915_WRITE(MI_ARB_VLV, MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE);

 /drivers/video/drm/i915/main.c
 ,7 → 16,7
 #include "bitmap.h"
 #include "i915_kos32.h"
-#define DRV_NAME "i915 v4.4.30"
+#define DRV_NAME "i915 v4.4.78"
 #define I915_DEV_CLOSE 0
 #define I915_DEV_INIT  1

 /drivers/video/drm/i915/utils.c
 ,7 → 396,7
 }
-unsigned long round_jiffies_up_relative(unsigned long j, int cpu)
+unsigned long round_jiffies_up_relative(unsigned long j)
 {
         unsigned long j0 = jiffies;

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Regard whitespace Rev 6934 → Rev 6935