| /drivers/include/ddk.h |
|---|
| 17,6 → 17,11 |
| #define PG_NOCACHE 0x018 |
| #define PG_SHARED 0x200 |
| #define _PAGE_PRESENT (1<<0) |
| #define _PAGE_RW (1<<1) |
| #define _PAGE_PWT (1<<3) |
| #define _PAGE_PCD (1<<4) |
| #define _PAGE_PAT (1<<7) |
| #define MANUAL_DESTROY 0x80000000 |
| /drivers/include/drm/drm.h |
|---|
| 168,7 → 168,6 |
| _DRM_AGP = 3, /**< AGP/GART */ |
| _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */ |
| _DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */ |
| _DRM_GEM = 6, /**< GEM object */ |
| }; |
| /** |
| 598,6 → 597,16 |
| __u64 size; |
| }; |
| #define DRM_CAP_DUMB_BUFFER 0x1 |
| #define DRM_CAP_VBLANK_HIGH_CRTC 0x2 |
| #define DRM_CAP_DUMB_PREFERRED_DEPTH 0x3 |
| #define DRM_CAP_DUMB_PREFER_SHADOW 0x4 |
| #define DRM_CAP_PRIME 0x5 |
| #define DRM_PRIME_CAP_IMPORT 0x1 |
| #define DRM_PRIME_CAP_EXPORT 0x2 |
| #define DRM_CAP_TIMESTAMP_MONOTONIC 0x6 |
| #define DRM_CAP_ASYNC_PAGE_FLIP 0x7 |
| /** DRM_IOCTL_GET_CAP ioctl argument type */ |
| struct drm_get_cap { |
| __u64 capability; |
| 604,9 → 613,35 |
| __u64 value; |
| }; |
| #include "drm_mode.h" |
| /** |
| * DRM_CLIENT_CAP_STEREO_3D |
| * |
| * if set to 1, the DRM core will expose the stereo 3D capabilities of the |
| * monitor by advertising the supported 3D layouts in the flags of struct |
| * drm_mode_modeinfo. |
| */ |
| #define DRM_CLIENT_CAP_STEREO_3D 1 |
| /* |
| /** DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */ |
| struct drm_set_client_cap { |
| __u64 capability; |
| __u64 value; |
| }; |
| #define DRM_CLOEXEC O_CLOEXEC |
| struct drm_prime_handle { |
| __u32 handle; |
| /** Flags.. only applicable for handle->fd */ |
| __u32 flags; |
| /** Returned dmabuf file descriptor */ |
| __s32 fd; |
| }; |
| #include <drm/drm_mode.h> |
| #if 0 |
| #define DRM_IOCTL_BASE 'd' |
| #define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr) |
| #define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type) |
| 626,6 → 661,7 |
| #define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink) |
| #define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open) |
| #define DRM_IOCTL_GET_CAP DRM_IOWR(0x0c, struct drm_get_cap) |
| #define DRM_IOCTL_SET_CLIENT_CAP DRM_IOW( 0x0d, struct drm_set_client_cap) |
| #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique) |
| #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth) |
| 661,7 → 697,8 |
| #define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, struct drm_lock) |
| #define DRM_IOCTL_FINISH DRM_IOW( 0x2c, struct drm_lock) |
| #define DRM_IOCTL_GEM_PRIME_OPEN DRM_IOWR(0x2e, struct drm_gem_open) |
| #define DRM_IOCTL_PRIME_HANDLE_TO_FD DRM_IOWR(0x2d, struct drm_prime_handle) |
| #define DRM_IOCTL_PRIME_FD_TO_HANDLE DRM_IOWR(0x2e, struct drm_prime_handle) |
| #define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30) |
| #define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31) |
| 687,8 → 724,8 |
| #define DRM_IOCTL_MODE_SETGAMMA DRM_IOWR(0xA5, struct drm_mode_crtc_lut) |
| #define DRM_IOCTL_MODE_GETENCODER DRM_IOWR(0xA6, struct drm_mode_get_encoder) |
| #define DRM_IOCTL_MODE_GETCONNECTOR DRM_IOWR(0xA7, struct drm_mode_get_connector) |
| #define DRM_IOCTL_MODE_ATTACHMODE DRM_IOWR(0xA8, struct drm_mode_mode_cmd) |
| #define DRM_IOCTL_MODE_DETACHMODE DRM_IOWR(0xA9, struct drm_mode_mode_cmd) |
| #define DRM_IOCTL_MODE_ATTACHMODE DRM_IOWR(0xA8, struct drm_mode_mode_cmd) /* deprecated (never worked) */ |
| #define DRM_IOCTL_MODE_DETACHMODE DRM_IOWR(0xA9, struct drm_mode_mode_cmd) /* deprecated (never worked) */ |
| #define DRM_IOCTL_MODE_GETPROPERTY DRM_IOWR(0xAA, struct drm_mode_get_property) |
| #define DRM_IOCTL_MODE_SETPROPERTY DRM_IOWR(0xAB, struct drm_mode_connector_set_property) |
| 705,9 → 742,12 |
| #define DRM_IOCTL_MODE_GETPLANERESOURCES DRM_IOWR(0xB5, struct drm_mode_get_plane_res) |
| #define DRM_IOCTL_MODE_GETPLANE DRM_IOWR(0xB6, struct drm_mode_get_plane) |
| #define DRM_IOCTL_MODE_SETPLANE DRM_IOWR(0xB7, struct drm_mode_set_plane) |
| #define DRM_IOCTL_MODE_ADDFB2 DRM_IOWR(0xB8, struct drm_mode_fb_cmd2) |
| #define DRM_IOCTL_MODE_OBJ_GETPROPERTIES DRM_IOWR(0xB9, struct drm_mode_obj_get_properties) |
| #define DRM_IOCTL_MODE_OBJ_SETPROPERTY DRM_IOWR(0xBA, struct drm_mode_obj_set_property) |
| #define DRM_IOCTL_MODE_CURSOR2 DRM_IOWR(0xBB, struct drm_mode_cursor2) |
| #endif |
| */ |
| /** |
| * Device specific ioctls should only be in their respective headers |
| * The device specific ioctl range is from 0x40 to 0x99. |
| 748,9 → 788,6 |
| __u32 reserved; |
| }; |
| #define DRM_CAP_DUMB_BUFFER 0x1 |
| #define DRM_CAP_VBLANK_HIGH_CRTC 0x2 |
| /* typedef area */ |
| #ifndef __KERNEL__ |
| typedef struct drm_clip_rect drm_clip_rect_t; |
| /drivers/include/drm/drmP.h |
|---|
| 59,17 → 59,14 |
| #include <linux/firmware.h> |
| #include <linux/err.h> |
| //#include <linux/fs.h> |
| //#include <linux/proc_fs.h> |
| #include <linux/fs.h> |
| //#include <linux/init.h> |
| //#include <linux/file.h> |
| #include <linux/file.h> |
| #include <linux/pci.h> |
| #include <linux/jiffies.h> |
| #include <linux/irqreturn.h> |
| //#include <linux/smp_lock.h> /* For (un)lock_kernel */ |
| //#include <linux/dma-mapping.h> |
| //#include <linux/mm.h> |
| //#include <linux/cdev.h> |
| #include <linux/mutex.h> |
| //#include <asm/io.h> |
| //#include <asm/mman.h> |
| 109,6 → 106,12 |
| #define KHZ2PICOS(a) (1000000000UL/(a)) |
| /* Flags and return codes for get_vblank_timestamp() driver function. */ |
| #define DRM_CALLED_FROM_VBLIRQ 1 |
| #define DRM_VBLANKTIME_SCANOUTPOS_METHOD (1 << 0) |
| #define DRM_VBLANKTIME_INVBL (1 << 1) |
| /* get_scanout_position() return flags */ |
| #define DRM_SCANOUTPOS_VALID (1 << 0) |
| #define DRM_SCANOUTPOS_INVBL (1 << 1) |
| 166,7 → 169,6 |
| /* driver capabilities and requirements mask */ |
| #define DRIVER_USE_AGP 0x1 |
| #define DRIVER_REQUIRE_AGP 0x2 |
| #define DRIVER_PCI_DMA 0x8 |
| #define DRIVER_SG 0x10 |
| #define DRIVER_HAVE_DMA 0x20 |
| 180,24 → 182,19 |
| #define DRIVER_BUS_PCI 0x1 |
| #define DRIVER_BUS_PLATFORM 0x2 |
| #define DRIVER_BUS_USB 0x3 |
| #define DRIVER_BUS_HOST1X 0x4 |
| /***********************************************************************/ |
| /** \name Begin the DRM... */ |
| /*@{*/ |
| #define DRM_DEBUG_CODE 0 /**< Include debugging code if > 1, then |
| #define DRM_DEBUG_CODE 2 /**< Include debugging code if > 1, then |
| also include looping detection. */ |
| #define DRM_MAGIC_HASH_ORDER 4 /**< Size of key hash table. Must be power of 2. */ |
| #define DRM_KERNEL_CONTEXT 0 /**< Change drm_resctx if changed */ |
| #define DRM_RESERVED_CONTEXTS 1 /**< Change drm_resctx if changed */ |
| #define DRM_LOOPING_LIMIT 5000000 |
| #define DRM_TIME_SLICE (HZ/20) /**< Time slice for GLXContexts */ |
| #define DRM_LOCK_SLICE 1 /**< Time slice for lock, in jiffies */ |
| #define DRM_FLAG_DEBUG 0x01 |
| #define DRM_MAX_CTXBITMAP (PAGE_SIZE * 8) |
| #define DRM_MAP_HASH_OFFSET 0x10000000 |
| /*@}*/ |
| 215,6 → 212,22 |
| #define DRM_ERROR(fmt, ...) \ |
| drm_err(__func__, fmt, ##__VA_ARGS__) |
| /** |
| * Rate limited error output. Like DRM_ERROR() but won't flood the log. |
| * |
| * \param fmt printf() like format string. |
| * \param arg arguments |
| */ |
| #define DRM_ERROR_RATELIMITED(fmt, ...) \ |
| ({ \ |
| static DEFINE_RATELIMIT_STATE(_rs, \ |
| DEFAULT_RATELIMIT_INTERVAL, \ |
| DEFAULT_RATELIMIT_BURST); \ |
| \ |
| if (__ratelimit(&_rs)) \ |
| drm_err(__func__, fmt, ##__VA_ARGS__); \ |
| }) |
| #define DRM_INFO(fmt, ...) \ |
| printk(KERN_INFO "[" DRM_NAME "] " fmt, ##__VA_ARGS__) |
| 442,6 → 455,11 |
| /** File private data */ |
| struct drm_file { |
| unsigned always_authenticated :1; |
| unsigned authenticated :1; |
| unsigned is_master :1; /* this file private is a master for a minor */ |
| /* true when the client has asked us to expose stereo 3D mode flags */ |
| unsigned stereo_allowed :1; |
| struct list_head lhead; |
| unsigned long lock_count; |
| 518,7 → 536,7 |
| */ |
| struct drm_agp_mem { |
| unsigned long handle; /**< handle */ |
| DRM_AGP_MEM *memory; |
| struct agp_memory *memory; |
| unsigned long bound; /**< address */ |
| int pages; |
| struct list_head head; |
| 530,7 → 548,7 |
| * \sa drm_agp_init() and drm_device::agp. |
| */ |
| struct drm_agp_head { |
| DRM_AGP_KERN agp_info; /**< AGP device information */ |
| struct agp_kern_info agp_info; /**< AGP device information */ |
| struct list_head memory; |
| unsigned long mode; /**< AGP mode */ |
| struct agp_bridge_data *bridge; |
| 616,13 → 634,6 |
| }; |
| /** |
| * GEM specific mm private for tracking GEM objects |
| */ |
| struct drm_gem_mm { |
| struct drm_vma_offset_manager vma_manager; |
| }; |
| /** |
| * This structure defines the drm_mm memory object, which will be used by the |
| * DRM for its buffer objects. |
| */ |
| 680,7 → 691,7 |
| uint32_t pending_read_domains; |
| uint32_t pending_write_domain; |
| void *driver_private; |
| }; |
| #include <drm/drm_crtc.h> |
| 735,10 → 746,6 |
| int (*set_unique)(struct drm_device *dev, struct drm_master *master, |
| struct drm_unique *unique); |
| int (*irq_by_busid)(struct drm_device *dev, struct drm_irq_busid *p); |
| /* hooks that are for PCI */ |
| int (*agp_init)(struct drm_device *dev); |
| void (*agp_destroy)(struct drm_device *dev); |
| }; |
| #endif |
| 800,12 → 807,18 |
| /** |
| * Called by vblank timestamping code. |
| * |
| * Return the current display scanout position from a crtc. |
| * Return the current display scanout position from a crtc, and an |
| * optional accurate ktime_get timestamp of when position was measured. |
| * |
| * \param dev DRM device. |
| * \param crtc Id of the crtc to query. |
| * \param flags Flags from the caller (DRM_CALLED_FROM_VBLIRQ or 0). |
| * \param *vpos Target location for current vertical scanout position. |
| * \param *hpos Target location for current horizontal scanout position. |
| * \param *stime Target location for timestamp taken immediately before |
| * scanout position query. Can be NULL to skip timestamp. |
| * \param *etime Target location for timestamp taken immediately after |
| * scanout position query. Can be NULL to skip timestamp. |
| * |
| * Returns vpos as a positive number while in active scanout area. |
| * Returns vpos as a negative number inside vblank, counting the number |
| 822,7 → 835,9 |
| * |
| */ |
| int (*get_scanout_position) (struct drm_device *dev, int crtc, |
| int *vpos, int *hpos); |
| unsigned int flags, |
| int *vpos, int *hpos, void *stime, |
| void *etime); |
| /** |
| * Called by \c drm_get_last_vbltimestamp. Should return a precise |
| 872,7 → 887,6 |
| * |
| * Returns 0 on success. |
| */ |
| int (*gem_init_object) (struct drm_gem_object *obj); |
| void (*gem_free_object) (struct drm_gem_object *obj); |
| int (*gem_open_object) (struct drm_gem_object *, struct drm_file *); |
| void (*gem_close_object) (struct drm_gem_object *, struct drm_file *); |
| 884,28 → 898,7 |
| #define DRM_MINOR_CONTROL 2 |
| #define DRM_MINOR_RENDER 3 |
| /** |
| * debugfs node list. This structure represents a debugfs file to |
| * be created by the drm core |
| */ |
| struct drm_debugfs_list { |
| const char *name; /** file name */ |
| // int (*show)(struct seq_file*, void*); /** show callback */ |
| u32 driver_features; /**< Required driver features for this entry */ |
| }; |
| /** |
| * debugfs node structure. This structure represents a debugfs file. |
| */ |
| struct drm_debugfs_node { |
| struct list_head list; |
| struct drm_minor *minor; |
| struct drm_debugfs_list *debugfs_ent; |
| struct dentry *dent; |
| }; |
| /** |
| * Info file list entry. This structure represents a debugfs or proc file to |
| * be created by the drm core |
| */ |
| 968,7 → 961,7 |
| * may contain multiple heads. |
| */ |
| struct drm_device { |
| struct list_head driver_item; /**< list of devices per driver */ |
| struct list_head legacy_dev_list;/**< list of devices per driver for stealth attach cleanup */ |
| char *devname; /**< For /proc/interrupts */ |
| int if_version; /**< Highest interface version set */ |
| 981,31 → 974,19 |
| /** \name Usage Counters */ |
| /*@{ */ |
| int open_count; /**< Outstanding files open */ |
| atomic_t ioctl_count; /**< Outstanding IOCTLs pending */ |
| atomic_t vma_count; /**< Outstanding vma areas open */ |
| int buf_use; /**< Buffers in use -- cannot alloc */ |
| atomic_t buf_alloc; /**< Buffer allocation in progress */ |
| /*@} */ |
| /** \name Performance counters */ |
| /*@{ */ |
| unsigned long counters; |
| // enum drm_stat_type types[15]; |
| atomic_t counts[15]; |
| /*@} */ |
| struct list_head filelist; |
| /** \name Memory management */ |
| /*@{ */ |
| struct list_head maplist; /**< Linked list of regions */ |
| int map_count; /**< Number of mappable regions */ |
| // struct drm_open_hash map_hash; /**< User token hash table for maps */ |
| /** \name Context handle management */ |
| /*@{ */ |
| struct list_head ctxlist; /**< Linked list of context handles */ |
| int ctx_count; /**< Number of context handles */ |
| struct mutex ctxlist_mutex; /**< For ctxlist */ |
| struct idr ctx_idr; |
| 1021,12 → 1002,11 |
| /** \name Context support */ |
| /*@{ */ |
| int irq_enabled; /**< True if irq handler is enabled */ |
| bool irq_enabled; /**< True if irq handler is enabled */ |
| __volatile__ long context_flag; /**< Context swapping flag */ |
| int last_context; /**< Last current context */ |
| /*@} */ |
| // struct work_struct work; |
| /** \name VBLANK IRQ support */ |
| /*@{ */ |
| 1036,21 → 1016,8 |
| * Once the modeset ioctl *has* been called though, we can safely |
| * disable them when unused. |
| */ |
| int vblank_disable_allowed; |
| bool vblank_disable_allowed; |
| // wait_queue_head_t *vbl_queue; /**< VBLANK wait queue */ |
| atomic_t *_vblank_count; /**< number of VBLANK interrupts (driver must alloc the right number of counters) */ |
| struct timeval *_vblank_time; /**< timestamp of current vblank_count (drivers must alloc right number of fields) */ |
| spinlock_t vblank_time_lock; /**< Protects vblank count and time updates during vblank enable/disable */ |
| spinlock_t vbl_lock; |
| atomic_t *vblank_refcount; /* number of users of vblank interruptsper crtc */ |
| u32 *last_vblank; /* protected by dev->vbl_lock, used */ |
| /* for wraparound handling */ |
| int *vblank_enabled; /* so we don't call enable more than |
| once per disable */ |
| int *vblank_inmodeset; /* Display driver is setting mode */ |
| u32 *last_vblank_wait; /* Last vblank seqno waited per CRTC */ |
| // struct timer_list vblank_disable_timer; |
| u32 max_vblank_count; /**< size of vblank counter register */ |
| 1070,7 → 1037,6 |
| int pci_device; /**< PCI device id */ |
| unsigned int num_crtcs; /**< Number of CRTCs on this device */ |
| void *dev_private; /**< device private data */ |
| void *mm_private; |
| struct address_space *dev_mapping; |
| // struct drm_sigdata sigdata; /**< For block_all_signals */ |
| // sigset_t sigmask; |
| 1087,6 → 1053,7 |
| /*@{ */ |
| struct mutex object_name_lock; |
| struct idr object_name_idr; |
| struct drm_vma_offset_manager *vma_offset_manager; |
| /*@} */ |
| int switch_power_state; |
| 1156,6 → 1123,7 |
| /* Memory management support (drm_memory.h) */ |
| #include <drm/drm_memory.h> |
| /* Misc. IOCTL support (drm_ioctl.h) */ |
| extern int drm_irq_by_busid(struct drm_device *dev, void *data, |
| struct drm_file *file_priv); |
| 1171,6 → 1139,8 |
| struct drm_file *file_priv); |
| extern int drm_getcap(struct drm_device *dev, void *data, |
| struct drm_file *file_priv); |
| extern int drm_setclientcap(struct drm_device *dev, void *data, |
| struct drm_file *file_priv); |
| extern int drm_setversion(struct drm_device *dev, void *data, |
| struct drm_file *file_priv); |
| extern int drm_noop(struct drm_device *dev, void *data, |
| 1284,8 → 1254,10 |
| int crtc, int *max_error, |
| struct timeval *vblank_time, |
| unsigned flags, |
| struct drm_crtc *refcrtc); |
| extern void drm_calc_timestamping_constants(struct drm_crtc *crtc); |
| const struct drm_crtc *refcrtc, |
| const struct drm_display_mode *mode); |
| extern void drm_calc_timestamping_constants(struct drm_crtc *crtc, |
| const struct drm_display_mode *mode); |
| extern bool |
| drm_mode_parse_command_line_for_connector(const char *mode_option, |
| 1320,7 → 1292,6 |
| extern void drm_master_put(struct drm_master **master); |
| extern void drm_put_dev(struct drm_device *dev); |
| extern int drm_put_minor(struct drm_minor **minor); |
| extern void drm_unplug_dev(struct drm_device *dev); |
| extern unsigned int drm_debug; |
| extern unsigned int drm_rnodes; |
| 1341,11 → 1312,36 |
| #if defined(CONFIG_DEBUG_FS) |
| extern int drm_debugfs_init(struct drm_minor *minor, int minor_id, |
| struct dentry *root); |
| extern int drm_debugfs_create_files(struct drm_info_list *files, int count, |
| struct dentry *root, struct drm_minor *minor); |
| extern int drm_debugfs_remove_files(struct drm_info_list *files, int count, |
| extern int drm_debugfs_create_files(const struct drm_info_list *files, |
| int count, struct dentry *root, |
| struct drm_minor *minor); |
| extern int drm_debugfs_remove_files(const struct drm_info_list *files, |
| int count, struct drm_minor *minor); |
| extern int drm_debugfs_cleanup(struct drm_minor *minor); |
| #else |
| static inline int drm_debugfs_init(struct drm_minor *minor, int minor_id, |
| struct dentry *root) |
| { |
| return 0; |
| } |
| static inline int drm_debugfs_create_files(const struct drm_info_list *files, |
| int count, struct dentry *root, |
| struct drm_minor *minor) |
| { |
| return 0; |
| } |
| static inline int drm_debugfs_remove_files(const struct drm_info_list *files, |
| int count, struct drm_minor *minor) |
| { |
| return 0; |
| } |
| static inline int drm_debugfs_cleanup(struct drm_minor *minor) |
| { |
| return 0; |
| } |
| #endif |
| /* Info file support */ |
| 1396,8 → 1392,6 |
| void drm_gem_destroy(struct drm_device *dev); |
| void drm_gem_object_release(struct drm_gem_object *obj); |
| void drm_gem_object_free(struct kref *kref); |
| struct drm_gem_object *drm_gem_object_alloc(struct drm_device *dev, |
| size_t size); |
| int drm_gem_object_init(struct drm_device *dev, |
| struct drm_gem_object *obj, size_t size); |
| void drm_gem_private_object_init(struct drm_device *dev, |
| 1517,7 → 1511,7 |
| #define drm_sysfs_connector_add(connector) |
| #define drm_sysfs_connector_remove(connector) |
| #define LFB_SIZE 0xC00000 |
| #define LFB_SIZE 0x1000000 |
| extern struct drm_device *main_device; |
| extern struct drm_file *drm_file_handlers[256]; |
| /drivers/include/drm/drm_crtc.h |
|---|
| 30,6 → 30,7 |
| #include <linux/types.h> |
| #include <linux/idr.h> |
| #include <linux/fb.h> |
| #include <linux/hdmi.h> |
| #include <drm/drm_mode.h> |
| #include <drm/drm_fourcc.h> |
| 108,6 → 109,7 |
| MODE_ONE_HEIGHT, /* only one height is supported */ |
| MODE_ONE_SIZE, /* only one resolution is supported */ |
| MODE_NO_REDUCED, /* monitor doesn't accept reduced blanking */ |
| MODE_NO_STEREO, /* stereo modes not supported */ |
| MODE_UNVERIFIED = -3, /* mode needs to reverified */ |
| MODE_BAD = -2, /* unspecified reason */ |
| MODE_ERROR = -1 /* error condition */ |
| 124,8 → 126,11 |
| .vscan = (vs), .flags = (f), \ |
| .base.type = DRM_MODE_OBJECT_MODE |
| #define CRTC_INTERLACE_HALVE_V 0x1 /* halve V values for interlacing */ |
| #define CRTC_INTERLACE_HALVE_V (1 << 0) /* halve V values for interlacing */ |
| #define CRTC_STEREO_DOUBLE (1 << 1) /* adjust timings for stereo modes */ |
| #define DRM_MODE_FLAG_3D_MAX DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF |
| struct drm_display_mode { |
| /* Header */ |
| struct list_head head; |
| 155,8 → 160,7 |
| int height_mm; |
| /* Actual mode we give to hw */ |
| int clock_index; |
| int synth_clock; |
| int crtc_clock; /* in KHz */ |
| int crtc_hdisplay; |
| int crtc_hblank_start; |
| int crtc_hblank_end; |
| 178,8 → 182,14 |
| int vrefresh; /* in Hz */ |
| int hsync; /* in kHz */ |
| enum hdmi_picture_aspect picture_aspect_ratio; |
| }; |
| static inline bool drm_mode_is_stereo(const struct drm_display_mode *mode) |
| { |
| return mode->flags & DRM_MODE_FLAG_3D_MASK; |
| } |
| enum drm_connector_status { |
| connector_status_connected = 1, |
| connector_status_disconnected = 2, |
| 439,7 → 449,7 |
| uint16_t *gamma_store; |
| /* Constants needed for precise vblank and swap timestamping. */ |
| s64 framedur_ns, linedur_ns, pixeldur_ns; |
| int framedur_ns, linedur_ns, pixeldur_ns; |
| /* if you are using the helper */ |
| void *helper_private; |
| 587,7 → 597,7 |
| */ |
| struct drm_connector { |
| struct drm_device *dev; |
| struct device kdev; |
| struct device *kdev; |
| struct device_attribute *attr; |
| struct list_head head; |
| 597,6 → 607,7 |
| int connector_type_id; |
| bool interlace_allowed; |
| bool doublescan_allowed; |
| bool stereo_allowed; |
| struct list_head modes; /* list of modes on this connector */ |
| enum drm_connector_status status; |
| 920,7 → 931,20 |
| struct drm_crtc *crtc, |
| const struct drm_crtc_funcs *funcs); |
| extern void drm_crtc_cleanup(struct drm_crtc *crtc); |
| extern unsigned int drm_crtc_index(struct drm_crtc *crtc); |
| /** |
| * drm_crtc_mask - find the mask of a registered CRTC |
| * @crtc: CRTC to find mask for |
| * |
| * Given a registered CRTC, return the mask bit of that CRTC for an |
| * encoder's possible_crtcs field. |
| */ |
| static inline uint32_t drm_crtc_mask(struct drm_crtc *crtc) |
| { |
| return 1 << drm_crtc_index(crtc); |
| } |
| extern void drm_connector_ida_init(void); |
| extern void drm_connector_ida_destroy(void); |
| extern int drm_connector_init(struct drm_device *dev, |
| 941,6 → 965,19 |
| const struct drm_encoder_funcs *funcs, |
| int encoder_type); |
| /** |
| * drm_encoder_crtc_ok - can a given crtc drive a given encoder? |
| * @encoder: encoder to test |
| * @crtc: crtc to test |
| * |
| * Return false if @encoder can't be driven by @crtc, true otherwise. |
| */ |
| static inline bool drm_encoder_crtc_ok(struct drm_encoder *encoder, |
| struct drm_crtc *crtc) |
| { |
| return !!(encoder->possible_crtcs & drm_crtc_mask(crtc)); |
| } |
| extern int drm_plane_init(struct drm_device *dev, |
| struct drm_plane *plane, |
| unsigned long possible_crtcs, |
| 964,6 → 1001,7 |
| extern bool drm_probe_ddc(struct i2c_adapter *adapter); |
| extern struct edid *drm_get_edid(struct drm_connector *connector, |
| struct i2c_adapter *adapter); |
| extern struct edid *drm_edid_duplicate(const struct edid *edid); |
| extern int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid); |
| extern void drm_mode_probed_add(struct drm_connector *connector, struct drm_display_mode *mode); |
| extern void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src); |
| 975,7 → 1013,7 |
| extern void drm_mode_config_cleanup(struct drm_device *dev); |
| extern void drm_mode_set_name(struct drm_display_mode *mode); |
| extern bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2); |
| extern bool drm_mode_equal_no_clocks(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2); |
| extern bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2); |
| extern int drm_mode_width(const struct drm_display_mode *mode); |
| extern int drm_mode_height(const struct drm_display_mode *mode); |
| 1108,6 → 1146,8 |
| int GTF_2C, int GTF_K, int GTF_2J); |
| extern int drm_add_modes_noedid(struct drm_connector *connector, |
| int hdisplay, int vdisplay); |
| extern void drm_set_preferred_mode(struct drm_connector *connector, |
| int hpref, int vpref); |
| extern int drm_edid_header_is_valid(const u8 *raw_edid); |
| extern bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid); |
| 1135,4 → 1175,21 |
| extern int drm_format_vert_chroma_subsampling(uint32_t format); |
| extern const char *drm_get_format_name(uint32_t format); |
| /* Helpers */ |
| static inline struct drm_crtc *drm_crtc_find(struct drm_device *dev, |
| uint32_t id) |
| { |
| struct drm_mode_object *mo; |
| mo = drm_mode_object_find(dev, id, DRM_MODE_OBJECT_CRTC); |
| return mo ? obj_to_crtc(mo) : NULL; |
| } |
| static inline struct drm_encoder *drm_encoder_find(struct drm_device *dev, |
| uint32_t id) |
| { |
| struct drm_mode_object *mo; |
| mo = drm_mode_object_find(dev, id, DRM_MODE_OBJECT_ENCODER); |
| return mo ? obj_to_encoder(mo) : NULL; |
| } |
| #endif /* __DRM_CRTC_H__ */ |
| /drivers/include/drm/drm_crtc_helper.h |
|---|
| 120,7 → 120,7 |
| */ |
| struct drm_connector_helper_funcs { |
| int (*get_modes)(struct drm_connector *connector); |
| int (*mode_valid)(struct drm_connector *connector, |
| enum drm_mode_status (*mode_valid)(struct drm_connector *connector, |
| struct drm_display_mode *mode); |
| struct drm_encoder *(*best_encoder)(struct drm_connector *connector); |
| }; |
| 163,7 → 163,7 |
| extern int drm_helper_resume_force_mode(struct drm_device *dev); |
| extern void drm_kms_helper_poll_init(struct drm_device *dev); |
| extern void drm_kms_helper_poll_fini(struct drm_device *dev); |
| extern void drm_helper_hpd_irq_event(struct drm_device *dev); |
| extern bool drm_helper_hpd_irq_event(struct drm_device *dev); |
| extern void drm_kms_helper_hotplug_event(struct drm_device *dev); |
| extern void drm_kms_helper_poll_disable(struct drm_device *dev); |
| /drivers/include/drm/drm_dp_helper.h |
|---|
| 41,22 → 41,22 |
| * 1.2 formally includes both eDP and DPI definitions. |
| */ |
| #define AUX_NATIVE_WRITE 0x8 |
| #define AUX_NATIVE_READ 0x9 |
| #define AUX_I2C_WRITE 0x0 |
| #define AUX_I2C_READ 0x1 |
| #define AUX_I2C_STATUS 0x2 |
| #define AUX_I2C_MOT 0x4 |
| #define DP_AUX_I2C_WRITE 0x0 |
| #define DP_AUX_I2C_READ 0x1 |
| #define DP_AUX_I2C_STATUS 0x2 |
| #define DP_AUX_I2C_MOT 0x4 |
| #define DP_AUX_NATIVE_WRITE 0x8 |
| #define DP_AUX_NATIVE_READ 0x9 |
| #define AUX_NATIVE_REPLY_ACK (0x0 << 4) |
| #define AUX_NATIVE_REPLY_NACK (0x1 << 4) |
| #define AUX_NATIVE_REPLY_DEFER (0x2 << 4) |
| #define AUX_NATIVE_REPLY_MASK (0x3 << 4) |
| #define DP_AUX_NATIVE_REPLY_ACK (0x0 << 0) |
| #define DP_AUX_NATIVE_REPLY_NACK (0x1 << 0) |
| #define DP_AUX_NATIVE_REPLY_DEFER (0x2 << 0) |
| #define DP_AUX_NATIVE_REPLY_MASK (0x3 << 0) |
| #define AUX_I2C_REPLY_ACK (0x0 << 6) |
| #define AUX_I2C_REPLY_NACK (0x1 << 6) |
| #define AUX_I2C_REPLY_DEFER (0x2 << 6) |
| #define AUX_I2C_REPLY_MASK (0x3 << 6) |
| #define DP_AUX_I2C_REPLY_ACK (0x0 << 2) |
| #define DP_AUX_I2C_REPLY_NACK (0x1 << 2) |
| #define DP_AUX_I2C_REPLY_DEFER (0x2 << 2) |
| #define DP_AUX_I2C_REPLY_MASK (0x3 << 2) |
| /* AUX CH addresses */ |
| /* DPCD */ |
| 77,10 → 77,10 |
| #define DP_DOWNSTREAMPORT_PRESENT 0x005 |
| # define DP_DWN_STRM_PORT_PRESENT (1 << 0) |
| # define DP_DWN_STRM_PORT_TYPE_MASK 0x06 |
| /* 00b = DisplayPort */ |
| /* 01b = Analog */ |
| /* 10b = TMDS or HDMI */ |
| /* 11b = Other */ |
| # define DP_DWN_STRM_PORT_TYPE_DP (0 << 1) |
| # define DP_DWN_STRM_PORT_TYPE_ANALOG (1 << 1) |
| # define DP_DWN_STRM_PORT_TYPE_TMDS (2 << 1) |
| # define DP_DWN_STRM_PORT_TYPE_OTHER (3 << 1) |
| # define DP_FORMAT_CONVERSION (1 << 3) |
| # define DP_DETAILED_CAP_INFO_AVAILABLE (1 << 4) /* DPI */ |
| 266,9 → 266,10 |
| #define DP_TEST_REQUEST 0x218 |
| # define DP_TEST_LINK_TRAINING (1 << 0) |
| # define DP_TEST_LINK_PATTERN (1 << 1) |
| # define DP_TEST_LINK_VIDEO_PATTERN (1 << 1) |
| # define DP_TEST_LINK_EDID_READ (1 << 2) |
| # define DP_TEST_LINK_PHY_TEST_PATTERN (1 << 3) /* DPCD >= 1.1 */ |
| # define DP_TEST_LINK_FAUX_PATTERN (1 << 4) /* DPCD >= 1.2 */ |
| #define DP_TEST_LINK_RATE 0x219 |
| # define DP_LINK_RATE_162 (0x6) |
| 333,20 → 334,20 |
| #define DP_LINK_STATUS_SIZE 6 |
| bool drm_dp_channel_eq_ok(u8 link_status[DP_LINK_STATUS_SIZE], |
| bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE], |
| int lane_count); |
| bool drm_dp_clock_recovery_ok(u8 link_status[DP_LINK_STATUS_SIZE], |
| bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE], |
| int lane_count); |
| u8 drm_dp_get_adjust_request_voltage(u8 link_status[DP_LINK_STATUS_SIZE], |
| u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE], |
| int lane); |
| u8 drm_dp_get_adjust_request_pre_emphasis(u8 link_status[DP_LINK_STATUS_SIZE], |
| u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE], |
| int lane); |
| #define DP_RECEIVER_CAP_SIZE 0xf |
| #define EDP_PSR_RECEIVER_CAP_SIZE 2 |
| void drm_dp_link_train_clock_recovery_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]); |
| void drm_dp_link_train_channel_eq_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]); |
| void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]); |
| void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]); |
| u8 drm_dp_link_rate_to_bw_code(int link_rate); |
| int drm_dp_bw_code_to_link_rate(u8 link_bw); |
| 379,15 → 380,22 |
| #define EDP_VSC_PSR_CRC_VALUES_VALID (1<<2) |
| static inline int |
| drm_dp_max_link_rate(u8 dpcd[DP_RECEIVER_CAP_SIZE]) |
| drm_dp_max_link_rate(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) |
| { |
| return drm_dp_bw_code_to_link_rate(dpcd[DP_MAX_LINK_RATE]); |
| } |
| static inline u8 |
| drm_dp_max_lane_count(u8 dpcd[DP_RECEIVER_CAP_SIZE]) |
| drm_dp_max_lane_count(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) |
| { |
| return dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; |
| } |
| static inline bool |
| drm_dp_enhanced_frame_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) |
| { |
| return dpcd[DP_DPCD_REV] >= 0x11 && |
| (dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP); |
| } |
| #endif /* _DRM_DP_HELPER_H_ */ |
| /drivers/include/drm/drm_mem_util.h |
|---|
| 27,6 → 27,8 |
| #ifndef _DRM_MEM_UTIL_H_ |
| #define _DRM_MEM_UTIL_H_ |
| #include <linux/vmalloc.h> |
| static __inline__ void *drm_calloc_large(size_t nmemb, size_t size) |
| { |
| void *p; |
| 35,7 → 37,7 |
| return NULL; |
| if (size * nmemb <= PAGE_SIZE) |
| return calloc(nmemb, size); |
| return kcalloc(nmemb, size, GFP_KERNEL); |
| p = (void*)KernelAlloc(size * nmemb); |
| if ( p != NULL ) |
| /drivers/include/drm/drm_memory.h |
|---|
| 33,6 → 33,7 |
| * OTHER DEALINGS IN THE SOFTWARE. |
| */ |
| #include <linux/vmalloc.h> |
| #include <drm/drmP.h> |
| /** |
| /drivers/include/drm/drm_mode.h |
|---|
| 58,7 → 58,22 |
| #define DRM_MODE_FLAG_PIXMUX (1<<11) |
| #define DRM_MODE_FLAG_DBLCLK (1<<12) |
| #define DRM_MODE_FLAG_CLKDIV2 (1<<13) |
| /* |
| * When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX |
| * (define not exposed to user space). |
| */ |
| #define DRM_MODE_FLAG_3D_MASK (0x1f<<14) |
| #define DRM_MODE_FLAG_3D_NONE (0<<14) |
| #define DRM_MODE_FLAG_3D_FRAME_PACKING (1<<14) |
| #define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2<<14) |
| #define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3<<14) |
| #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4<<14) |
| #define DRM_MODE_FLAG_3D_L_DEPTH (5<<14) |
| #define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6<<14) |
| #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7<<14) |
| #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8<<14) |
| /* DPMS flags */ |
| /* bit compatible with the xorg definitions. */ |
| #define DRM_MODE_DPMS_ON 0 |
| 165,6 → 180,7 |
| #define DRM_MODE_ENCODER_LVDS 3 |
| #define DRM_MODE_ENCODER_TVDAC 4 |
| #define DRM_MODE_ENCODER_VIRTUAL 5 |
| #define DRM_MODE_ENCODER_DSI 6 |
| struct drm_mode_get_encoder { |
| __u32 encoder_id; |
| 203,6 → 219,7 |
| #define DRM_MODE_CONNECTOR_TV 13 |
| #define DRM_MODE_CONNECTOR_eDP 14 |
| #define DRM_MODE_CONNECTOR_VIRTUAL 15 |
| #define DRM_MODE_CONNECTOR_DSI 16 |
| struct drm_mode_get_connector { |
| 223,6 → 240,8 |
| __u32 connection; |
| __u32 mm_width, mm_height; /**< HxW in millimeters */ |
| __u32 subpixel; |
| __u32 pad; |
| }; |
| #define DRM_MODE_PROP_PENDING (1<<0) |
| 367,13 → 386,13 |
| * depending on the value in flags different members are used. |
| * |
| * CURSOR_BO uses |
| * crtc |
| * crtc_id |
| * width |
| * height |
| * handle - if 0 turns the cursor of |
| * handle - if 0 turns the cursor off |
| * |
| * CURSOR_MOVE uses |
| * crtc |
| * crtc_id |
| * x |
| * y |
| */ |
| 388,6 → 407,19 |
| __u32 handle; |
| }; |
| struct drm_mode_cursor2 { |
| __u32 flags; |
| __u32 crtc_id; |
| __s32 x; |
| __s32 y; |
| __u32 width; |
| __u32 height; |
| /* driver specific handle */ |
| __u32 handle; |
| __s32 hot_x; |
| __s32 hot_y; |
| }; |
| struct drm_mode_crtc_lut { |
| __u32 crtc_id; |
| __u32 gamma_size; |
| 399,7 → 431,8 |
| }; |
| #define DRM_MODE_PAGE_FLIP_EVENT 0x01 |
| #define DRM_MODE_PAGE_FLIP_FLAGS DRM_MODE_PAGE_FLIP_EVENT |
| #define DRM_MODE_PAGE_FLIP_ASYNC 0x02 |
| #define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT|DRM_MODE_PAGE_FLIP_ASYNC) |
| /* |
| * Request a page flip on the specified crtc. |
| 413,12 → 446,15 |
| * flip is already pending as the ioctl is called, EBUSY will be |
| * returned. |
| * |
| * The ioctl supports one flag, DRM_MODE_PAGE_FLIP_EVENT, which will |
| * request that drm sends back a vblank event (see drm.h: struct |
| * drm_event_vblank) when the page flip is done. The user_data field |
| * passed in with this ioctl will be returned as the user_data field |
| * in the vblank event struct. |
| * Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank |
| * event (see drm.h: struct drm_event_vblank) when the page flip is |
| * done. The user_data field passed in with this ioctl will be |
| * returned as the user_data field in the vblank event struct. |
| * |
| * Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen |
| * 'as soon as possible', meaning that it not delay waiting for vblank. |
| * This may cause tearing on the screen. |
| * |
| * The reserved field must be zero until we figure out something |
| * clever to use it for. |
| */ |
| /drivers/include/drm/drm_pciids.h |
|---|
| 261,6 → 261,18 |
| {0x1002, 0x679B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI|RADEON_NEW_MEMMAP}, \ |
| {0x1002, 0x679E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI|RADEON_NEW_MEMMAP}, \ |
| {0x1002, 0x679F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI|RADEON_NEW_MEMMAP}, \ |
| {0x1002, 0x67A0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII|RADEON_NEW_MEMMAP}, \ |
| {0x1002, 0x67A1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII|RADEON_NEW_MEMMAP}, \ |
| {0x1002, 0x67A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII|RADEON_NEW_MEMMAP}, \ |
| {0x1002, 0x67A8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII|RADEON_NEW_MEMMAP}, \ |
| {0x1002, 0x67A9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII|RADEON_NEW_MEMMAP}, \ |
| {0x1002, 0x67AA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII|RADEON_NEW_MEMMAP}, \ |
| {0x1002, 0x67B0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII|RADEON_NEW_MEMMAP}, \ |
| {0x1002, 0x67B1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII|RADEON_NEW_MEMMAP}, \ |
| {0x1002, 0x67B8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII|RADEON_NEW_MEMMAP}, \ |
| {0x1002, 0x67B9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII|RADEON_NEW_MEMMAP}, \ |
| {0x1002, 0x67BA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII|RADEON_NEW_MEMMAP}, \ |
| {0x1002, 0x67BE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII|RADEON_NEW_MEMMAP}, \ |
| {0x1002, 0x6800, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
| {0x1002, 0x6801, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
| {0x1002, 0x6802, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
| /drivers/include/drm/drm_vma_manager.h |
|---|
| 24,7 → 24,7 |
| */ |
| #include <drm/drm_mm.h> |
| //#include <linux/fs.h> |
| #include <linux/fs.h> |
| #include <linux/mm.h> |
| #include <linux/module.h> |
| #include <linux/rbtree.h> |
| /drivers/include/drm/i915_drm.h |
|---|
| 49,6 → 49,10 |
| #define SNB_GMCH_GGMS_MASK 0x3 |
| #define SNB_GMCH_GMS_SHIFT 3 /* Graphics Mode Select */ |
| #define SNB_GMCH_GMS_MASK 0x1f |
| #define BDW_GMCH_GGMS_SHIFT 6 |
| #define BDW_GMCH_GGMS_MASK 0x3 |
| #define BDW_GMCH_GMS_SHIFT 8 |
| #define BDW_GMCH_GMS_MASK 0xff |
| #define I830_GMCH_CTRL 0x52 |
| /drivers/include/drm/i915_pciids.h |
|---|
| 208,4 → 208,29 |
| #define INTEL_VLV_D_IDS(info) \ |
| INTEL_VGA_DEVICE(0x0155, info) |
| #define _INTEL_BDW_M(gt, id, info) \ |
| INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info) |
| #define _INTEL_BDW_D(gt, id, info) \ |
| INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info) |
| #define _INTEL_BDW_M_IDS(gt, info) \ |
| _INTEL_BDW_M(gt, 0x1602, info), /* ULT */ \ |
| _INTEL_BDW_M(gt, 0x1606, info), /* ULT */ \ |
| _INTEL_BDW_M(gt, 0x160B, info), /* Iris */ \ |
| _INTEL_BDW_M(gt, 0x160E, info) /* ULX */ |
| #define _INTEL_BDW_D_IDS(gt, info) \ |
| _INTEL_BDW_D(gt, 0x160A, info), /* Server */ \ |
| _INTEL_BDW_D(gt, 0x160D, info) /* Workstation */ |
| #define INTEL_BDW_M_IDS(info) \ |
| _INTEL_BDW_M_IDS(1, info), \ |
| _INTEL_BDW_M_IDS(2, info), \ |
| _INTEL_BDW_M_IDS(3, info) |
| #define INTEL_BDW_D_IDS(info) \ |
| _INTEL_BDW_D_IDS(1, info), \ |
| _INTEL_BDW_D_IDS(2, info), \ |
| _INTEL_BDW_D_IDS(3, info) |
| #endif /* _I915_PCIIDS_H */ |
| /drivers/include/linux/delay.h |
|---|
| 6,4 → 6,7 |
| * |
| * Delay routines, using a pre-computed "loops_per_jiffy" value. |
| */ |
| #define usleep_range(min, max) udelay(max) |
| #endif /* defined(_LINUX_DELAY_H) */ |
| /drivers/include/linux/file.h |
|---|
| 0,0 → 1,7 |
| /* |
| * Wrapper functions for accessing the file_struct fd array. |
| */ |
| #ifndef __LINUX_FILE_H |
| #define __LINUX_FILE_H |
| #endif /* __LINUX_FILE_H */ |
| /drivers/include/linux/fs.h |
|---|
| 0,0 → 1,3 |
| #ifndef _LINUX_FS_H |
| #define _LINUX_FS_H |
| #endif /* _LINUX_FS_H */ |
| /drivers/include/linux/kernel.h |
|---|
| 36,10 → 36,29 |
| #define PTR_ALIGN(p, a) ((typeof(p))ALIGN((unsigned long)(p), (a))) |
| #define IS_ALIGNED(x, a) (((x) & ((typeof(x))(a) - 1)) == 0) |
| #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr)) |
| /* |
| * This looks more complex than it should be. But we need to |
| * get the type for the ~ right in round_down (it needs to be |
| * as wide as the result!), and we want to evaluate the macro |
| * arguments just once each. |
| */ |
| #define __round_mask(x, y) ((__typeof__(x))((y)-1)) |
| #define round_up(x, y) ((((x)-1) | __round_mask(x, y))+1) |
| #define round_down(x, y) ((x) & ~__round_mask(x, y)) |
| #define FIELD_SIZEOF(t, f) (sizeof(((t*)0)->f)) |
| #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) |
| #define DIV_ROUND_UP_ULL(ll,d) \ |
| ({ unsigned long long _tmp = (ll)+(d)-1; do_div(_tmp, d); _tmp; }) |
| #if BITS_PER_LONG == 32 |
| # define DIV_ROUND_UP_SECTOR_T(ll,d) DIV_ROUND_UP_ULL(ll, d) |
| #else |
| # define DIV_ROUND_UP_SECTOR_T(ll,d) DIV_ROUND_UP(ll,d) |
| #endif |
| /* The `const' in roundup() prevents gcc-3.3 from calling __divdi3 */ |
| #define roundup(x, y) ( \ |
| { \ |
| 47,17 → 66,40 |
| (((x) + (__y - 1)) / __y) * __y; \ |
| } \ |
| ) |
| #define rounddown(x, y) ( \ |
| { \ |
| typeof(x) __x = (x); \ |
| __x - (__x % (y)); \ |
| } \ |
| ) |
| #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) |
| #define DIV_ROUND_UP_ULL(ll,d) \ |
| ({ unsigned long long _tmp = (ll)+(d)-1; do_div(_tmp, d); _tmp; }) |
| /* |
| * Divide positive or negative dividend by positive divisor and round |
| * to closest integer. Result is undefined for negative divisors and |
| * for negative dividends if the divisor variable type is unsigned. |
| */ |
| #define DIV_ROUND_CLOSEST(x, divisor)( \ |
| { \ |
| typeof(divisor) __divisor = divisor; \ |
| (((x) + ((__divisor) / 2)) / (__divisor)); \ |
| typeof(x) __x = x; \ |
| typeof(divisor) __d = divisor; \ |
| (((typeof(x))-1) > 0 || \ |
| ((typeof(divisor))-1) > 0 || (__x) > 0) ? \ |
| (((__x) + ((__d) / 2)) / (__d)) : \ |
| (((__x) - ((__d) / 2)) / (__d)); \ |
| } \ |
| ) |
| /* |
| * Multiplies an integer by a fraction, while avoiding unnecessary |
| * overflow or loss of precision. |
| */ |
| #define mult_frac(x, numer, denom)( \ |
| { \ |
| typeof(x) quot = (x) / (denom); \ |
| typeof(x) rem = (x) % (denom); \ |
| (quot * (numer)) + ((rem * (numer)) / (denom)); \ |
| } \ |
| ) |
| #define clamp_t(type, val, min, max) ({ \ |
| type __val = (val); \ |
| /drivers/include/linux/mipi_display.h |
|---|
| 0,0 → 1,130 |
| /* |
| * Defines for Mobile Industry Processor Interface (MIPI(R)) |
| * Display Working Group standards: DSI, DCS, DBI, DPI |
| * |
| * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de> |
| * Copyright (C) 2006 Nokia Corporation |
| * Author: Imre Deak <imre.deak@nokia.com> |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| */ |
| #ifndef MIPI_DISPLAY_H |
| #define MIPI_DISPLAY_H |
| /* MIPI DSI Processor-to-Peripheral transaction types */ |
| enum { |
| MIPI_DSI_V_SYNC_START = 0x01, |
| MIPI_DSI_V_SYNC_END = 0x11, |
| MIPI_DSI_H_SYNC_START = 0x21, |
| MIPI_DSI_H_SYNC_END = 0x31, |
| MIPI_DSI_COLOR_MODE_OFF = 0x02, |
| MIPI_DSI_COLOR_MODE_ON = 0x12, |
| MIPI_DSI_SHUTDOWN_PERIPHERAL = 0x22, |
| MIPI_DSI_TURN_ON_PERIPHERAL = 0x32, |
| MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM = 0x03, |
| MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM = 0x13, |
| MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM = 0x23, |
| MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM = 0x04, |
| MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM = 0x14, |
| MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM = 0x24, |
| MIPI_DSI_DCS_SHORT_WRITE = 0x05, |
| MIPI_DSI_DCS_SHORT_WRITE_PARAM = 0x15, |
| MIPI_DSI_DCS_READ = 0x06, |
| MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE = 0x37, |
| MIPI_DSI_END_OF_TRANSMISSION = 0x08, |
| MIPI_DSI_NULL_PACKET = 0x09, |
| MIPI_DSI_BLANKING_PACKET = 0x19, |
| MIPI_DSI_GENERIC_LONG_WRITE = 0x29, |
| MIPI_DSI_DCS_LONG_WRITE = 0x39, |
| MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20 = 0x0c, |
| MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24 = 0x1c, |
| MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16 = 0x2c, |
| MIPI_DSI_PACKED_PIXEL_STREAM_30 = 0x0d, |
| MIPI_DSI_PACKED_PIXEL_STREAM_36 = 0x1d, |
| MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12 = 0x3d, |
| MIPI_DSI_PACKED_PIXEL_STREAM_16 = 0x0e, |
| MIPI_DSI_PACKED_PIXEL_STREAM_18 = 0x1e, |
| MIPI_DSI_PIXEL_STREAM_3BYTE_18 = 0x2e, |
| MIPI_DSI_PACKED_PIXEL_STREAM_24 = 0x3e, |
| }; |
| /* MIPI DSI Peripheral-to-Processor transaction types */ |
| enum { |
| MIPI_DSI_RX_ACKNOWLEDGE_AND_ERROR_REPORT = 0x02, |
| MIPI_DSI_RX_END_OF_TRANSMISSION = 0x08, |
| MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_1BYTE = 0x11, |
| MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_2BYTE = 0x12, |
| MIPI_DSI_RX_GENERIC_LONG_READ_RESPONSE = 0x1a, |
| MIPI_DSI_RX_DCS_LONG_READ_RESPONSE = 0x1c, |
| MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_1BYTE = 0x21, |
| MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_2BYTE = 0x22, |
| }; |
| /* MIPI DCS commands */ |
| enum { |
| MIPI_DCS_NOP = 0x00, |
| MIPI_DCS_SOFT_RESET = 0x01, |
| MIPI_DCS_GET_DISPLAY_ID = 0x04, |
| MIPI_DCS_GET_RED_CHANNEL = 0x06, |
| MIPI_DCS_GET_GREEN_CHANNEL = 0x07, |
| MIPI_DCS_GET_BLUE_CHANNEL = 0x08, |
| MIPI_DCS_GET_DISPLAY_STATUS = 0x09, |
| MIPI_DCS_GET_POWER_MODE = 0x0A, |
| MIPI_DCS_GET_ADDRESS_MODE = 0x0B, |
| MIPI_DCS_GET_PIXEL_FORMAT = 0x0C, |
| MIPI_DCS_GET_DISPLAY_MODE = 0x0D, |
| MIPI_DCS_GET_SIGNAL_MODE = 0x0E, |
| MIPI_DCS_GET_DIAGNOSTIC_RESULT = 0x0F, |
| MIPI_DCS_ENTER_SLEEP_MODE = 0x10, |
| MIPI_DCS_EXIT_SLEEP_MODE = 0x11, |
| MIPI_DCS_ENTER_PARTIAL_MODE = 0x12, |
| MIPI_DCS_ENTER_NORMAL_MODE = 0x13, |
| MIPI_DCS_EXIT_INVERT_MODE = 0x20, |
| MIPI_DCS_ENTER_INVERT_MODE = 0x21, |
| MIPI_DCS_SET_GAMMA_CURVE = 0x26, |
| MIPI_DCS_SET_DISPLAY_OFF = 0x28, |
| MIPI_DCS_SET_DISPLAY_ON = 0x29, |
| MIPI_DCS_SET_COLUMN_ADDRESS = 0x2A, |
| MIPI_DCS_SET_PAGE_ADDRESS = 0x2B, |
| MIPI_DCS_WRITE_MEMORY_START = 0x2C, |
| MIPI_DCS_WRITE_LUT = 0x2D, |
| MIPI_DCS_READ_MEMORY_START = 0x2E, |
| MIPI_DCS_SET_PARTIAL_AREA = 0x30, |
| MIPI_DCS_SET_SCROLL_AREA = 0x33, |
| MIPI_DCS_SET_TEAR_OFF = 0x34, |
| MIPI_DCS_SET_TEAR_ON = 0x35, |
| MIPI_DCS_SET_ADDRESS_MODE = 0x36, |
| MIPI_DCS_SET_SCROLL_START = 0x37, |
| MIPI_DCS_EXIT_IDLE_MODE = 0x38, |
| MIPI_DCS_ENTER_IDLE_MODE = 0x39, |
| MIPI_DCS_SET_PIXEL_FORMAT = 0x3A, |
| MIPI_DCS_WRITE_MEMORY_CONTINUE = 0x3C, |
| MIPI_DCS_READ_MEMORY_CONTINUE = 0x3E, |
| MIPI_DCS_SET_TEAR_SCANLINE = 0x44, |
| MIPI_DCS_GET_SCANLINE = 0x45, |
| MIPI_DCS_READ_DDB_START = 0xA1, |
| MIPI_DCS_READ_DDB_CONTINUE = 0xA8, |
| }; |
| /* MIPI DCS pixel formats */ |
| #define MIPI_DCS_PIXEL_FMT_24BIT 7 |
| #define MIPI_DCS_PIXEL_FMT_18BIT 6 |
| #define MIPI_DCS_PIXEL_FMT_16BIT 5 |
| #define MIPI_DCS_PIXEL_FMT_12BIT 3 |
| #define MIPI_DCS_PIXEL_FMT_8BIT 2 |
| #define MIPI_DCS_PIXEL_FMT_3BIT 1 |
| #endif |
| /drivers/include/linux/mm.h |
|---|
| 12,6 → 12,54 |
| /* to align the pointer to the (next) page boundary */ |
| #define PAGE_ALIGN(addr) ALIGN(addr, PAGE_SIZE) |
| /* |
| * These are the virtual MM functions - opening of an area, closing and |
| * unmapping it (needed to keep files on disk up-to-date etc), pointer |
| * to the functions called when a no-page or a wp-page exception occurs. |
| */ |
| struct vm_operations_struct { |
| void (*open)(struct vm_area_struct * area); |
| void (*close)(struct vm_area_struct * area); |
| int (*fault)(struct vm_area_struct *vma, struct vm_fault *vmf); |
| /* notification that a previously read-only page is about to become |
| * writable, if an error is returned it will cause a SIGBUS */ |
| int (*page_mkwrite)(struct vm_area_struct *vma, struct vm_fault *vmf); |
| /* called by access_process_vm when get_user_pages() fails, typically |
| * for use by special VMAs that can switch between memory and hardware |
| */ |
| int (*access)(struct vm_area_struct *vma, unsigned long addr, |
| void *buf, int len, int write); |
| #ifdef CONFIG_NUMA |
| /* |
| * set_policy() op must add a reference to any non-NULL @new mempolicy |
| * to hold the policy upon return. Caller should pass NULL @new to |
| * remove a policy and fall back to surrounding context--i.e. do not |
| * install a MPOL_DEFAULT policy, nor the task or system default |
| * mempolicy. |
| */ |
| int (*set_policy)(struct vm_area_struct *vma, struct mempolicy *new); |
| /* |
| * get_policy() op must add reference [mpol_get()] to any policy at |
| * (vma,addr) marked as MPOL_SHARED. The shared policy infrastructure |
| * in mm/mempolicy.c will do this automatically. |
| * get_policy() must NOT add a ref if the policy at (vma,addr) is not |
| * marked as MPOL_SHARED. vma policies are protected by the mmap_sem. |
| * If no [shared/vma] mempolicy exists at the addr, get_policy() op |
| * must return NULL--i.e., do not "fallback" to task or system default |
| * policy. |
| */ |
| struct mempolicy *(*get_policy)(struct vm_area_struct *vma, |
| unsigned long addr); |
| int (*migrate)(struct vm_area_struct *vma, const nodemask_t *from, |
| const nodemask_t *to, unsigned long flags); |
| #endif |
| /* called by sys_remap_file_pages() to populate non-linear mapping */ |
| int (*remap_pages)(struct vm_area_struct *vma, unsigned long addr, |
| unsigned long size, pgoff_t pgoff); |
| }; |
| #define offset_in_page(p) ((unsigned long)(p) & ~PAGE_MASK) |
| #endif |
| /drivers/include/linux/uapi/drm/drm.h |
|---|
| 181,7 → 181,6 |
| _DRM_AGP = 3, /**< AGP/GART */ |
| _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */ |
| _DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */ |
| _DRM_GEM = 6, /**< GEM object (obsolete) */ |
| }; |
| /** |
| 611,6 → 610,16 |
| __u64 size; |
| }; |
| #define DRM_CAP_DUMB_BUFFER 0x1 |
| #define DRM_CAP_VBLANK_HIGH_CRTC 0x2 |
| #define DRM_CAP_DUMB_PREFERRED_DEPTH 0x3 |
| #define DRM_CAP_DUMB_PREFER_SHADOW 0x4 |
| #define DRM_CAP_PRIME 0x5 |
| #define DRM_PRIME_CAP_IMPORT 0x1 |
| #define DRM_PRIME_CAP_EXPORT 0x2 |
| #define DRM_CAP_TIMESTAMP_MONOTONIC 0x6 |
| #define DRM_CAP_ASYNC_PAGE_FLIP 0x7 |
| /** DRM_IOCTL_GET_CAP ioctl argument type */ |
| struct drm_get_cap { |
| __u64 capability; |
| 617,6 → 626,21 |
| __u64 value; |
| }; |
| /** |
| * DRM_CLIENT_CAP_STEREO_3D |
| * |
| * if set to 1, the DRM core will expose the stereo 3D capabilities of the |
| * monitor by advertising the supported 3D layouts in the flags of struct |
| * drm_mode_modeinfo. |
| */ |
| #define DRM_CLIENT_CAP_STEREO_3D 1 |
| /** DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */ |
| struct drm_set_client_cap { |
| __u64 capability; |
| __u64 value; |
| }; |
| #define DRM_CLOEXEC O_CLOEXEC |
| struct drm_prime_handle { |
| __u32 handle; |
| 649,6 → 673,7 |
| #define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink) |
| #define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open) |
| #define DRM_IOCTL_GET_CAP DRM_IOWR(0x0c, struct drm_get_cap) |
| #define DRM_IOCTL_SET_CLIENT_CAP DRM_IOW( 0x0d, struct drm_set_client_cap) |
| #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique) |
| #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth) |
| 774,17 → 799,6 |
| __u32 reserved; |
| }; |
| #define DRM_CAP_DUMB_BUFFER 0x1 |
| #define DRM_CAP_VBLANK_HIGH_CRTC 0x2 |
| #define DRM_CAP_DUMB_PREFERRED_DEPTH 0x3 |
| #define DRM_CAP_DUMB_PREFER_SHADOW 0x4 |
| #define DRM_CAP_PRIME 0x5 |
| #define DRM_CAP_TIMESTAMP_MONOTONIC 0x6 |
| #define DRM_CAP_ASYNC_PAGE_FLIP 0x7 |
| #define DRM_PRIME_CAP_IMPORT 0x1 |
| #define DRM_PRIME_CAP_EXPORT 0x2 |
| /* typedef area */ |
| #ifndef __KERNEL__ |
| typedef struct drm_clip_rect drm_clip_rect_t; |
| /drivers/include/linux/uapi/drm/i915_drm.h |
|---|
| 38,10 → 38,10 |
| * |
| * I915_L3_PARITY_UEVENT - Generated when the driver receives a parity mismatch |
| * event from the gpu l3 cache. Additional information supplied is ROW, |
| * BANK, SUBBANK of the affected cacheline. Userspace should keep track of |
| * these events and if a specific cache-line seems to have a persistent |
| * error remap it with the l3 remapping tool supplied in intel-gpu-tools. |
| * The value supplied with the event is always 1. |
| * BANK, SUBBANK, SLICE of the affected cacheline. Userspace should keep |
| * track of these events and if a specific cache-line seems to have a |
| * persistent error remap it with the l3 remapping tool supplied in |
| * intel-gpu-tools. The value supplied with the event is always 1. |
| * |
| * I915_ERROR_UEVENT - Generated upon error detection, currently only via |
| * hangcheck. The error detection event is a good indicator of when things |
| 222,6 → 222,7 |
| #define DRM_I915_GEM_SET_CACHING 0x2f |
| #define DRM_I915_GEM_GET_CACHING 0x30 |
| #define DRM_I915_REG_READ 0x31 |
| #define DRM_I915_GET_RESET_STATS 0x32 |
| #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) |
| #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) |
| 271,6 → 272,7 |
| #define DRM_IOCTL_I915_GEM_CONTEXT_CREATE DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_CREATE, struct drm_i915_gem_context_create) |
| #define DRM_IOCTL_I915_GEM_CONTEXT_DESTROY DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_DESTROY, struct drm_i915_gem_context_destroy) |
| #define DRM_IOCTL_I915_REG_READ DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_REG_READ, struct drm_i915_reg_read) |
| #define DRM_IOCTL_I915_GET_RESET_STATS DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GET_RESET_STATS, struct drm_i915_reset_stats) |
| /* Allow drivers to submit batchbuffers directly to hardware, relying |
| * on the security mechanisms provided by hardware. |
| 719,7 → 721,7 |
| */ |
| #define I915_EXEC_IS_PINNED (1<<10) |
| /** Provide a hint to the kernel that the command stream and auxilliary |
| /** Provide a hint to the kernel that the command stream and auxiliary |
| * state buffers already holds the correct presumed addresses and so the |
| * relocation process may be skipped if no buffers need to be moved in |
| * preparation for the execbuffer. |
| 1031,6 → 1033,22 |
| __u64 val; /* Return value */ |
| }; |
| struct drm_i915_reset_stats { |
| __u32 ctx_id; |
| __u32 flags; |
| /* All resets since boot/module reload, for all contexts */ |
| __u32 reset_count; |
| /* Number of batches lost when active in GPU, for this context */ |
| __u32 batch_active; |
| /* Number of batches lost pending for execution, for this context */ |
| __u32 batch_pending; |
| __u32 pad; |
| }; |
| struct drm_i915_mask { |
| __u32 handle; |
| __u32 width; |
| /drivers/include/linux/vmalloc.h |
|---|
| 0,0 → 1,3 |
| #ifndef _LINUX_VMALLOC_H |
| #define _LINUX_VMALLOC_H |
| #endif /* _LINUX_VMALLOC_H */ |