| 141,58 → 141,58 |
|---|
| |
| /* Flags for perf_boxes |
| */ |
| #define I915_BOX_RING_EMPTY 0x1 |
| #define I915_BOX_FLIP 0x2 |
| #define I915_BOX_WAIT 0x4 |
| #define I915_BOX_TEXTURE_LOAD 0x8 |
| #define I915_BOX_LOST_CONTEXT 0x10 |
| #define I915_BOX_RING_EMPTY 0x1 |
| #define I915_BOX_FLIP 0x2 |
| #define I915_BOX_WAIT 0x4 |
| #define I915_BOX_TEXTURE_LOAD 0x8 |
| #define I915_BOX_LOST_CONTEXT 0x10 |
| |
| /* I915 specific ioctls |
| * The device specific ioctl range is 0x40 to 0x79. |
| */ |
| #define DRM_I915_INIT 0x00 |
| #define DRM_I915_FLUSH 0x01 |
| #define DRM_I915_FLIP 0x02 |
| #define DRM_I915_BATCHBUFFER 0x03 |
| #define DRM_I915_IRQ_EMIT 0x04 |
| #define DRM_I915_IRQ_WAIT 0x05 |
| #define DRM_I915_GETPARAM 0x06 |
| #define DRM_I915_SETPARAM 0x07 |
| #define DRM_I915_ALLOC 0x08 |
| #define DRM_I915_FREE 0x09 |
| #define DRM_I915_INIT_HEAP 0x0a |
| #define DRM_I915_CMDBUFFER 0x0b |
| #define DRM_I915_DESTROY_HEAP 0x0c |
| #define DRM_I915_INIT 0x00 |
| #define DRM_I915_FLUSH 0x01 |
| #define DRM_I915_FLIP 0x02 |
| #define DRM_I915_BATCHBUFFER 0x03 |
| #define DRM_I915_IRQ_EMIT 0x04 |
| #define DRM_I915_IRQ_WAIT 0x05 |
| #define DRM_I915_GETPARAM 0x06 |
| #define DRM_I915_SETPARAM 0x07 |
| #define DRM_I915_ALLOC 0x08 |
| #define DRM_I915_FREE 0x09 |
| #define DRM_I915_INIT_HEAP 0x0a |
| #define DRM_I915_CMDBUFFER 0x0b |
| #define DRM_I915_DESTROY_HEAP 0x0c |
| #define DRM_I915_SET_VBLANK_PIPE 0x0d |
| #define DRM_I915_GET_VBLANK_PIPE 0x0e |
| #define DRM_I915_VBLANK_SWAP 0x0f |
| #define DRM_I915_HWS_ADDR 0x11 |
| #define DRM_I915_GEM_INIT 0x13 |
| #define DRM_I915_GEM_EXECBUFFER 0x14 |
| #define DRM_I915_GEM_PIN 0x15 |
| #define DRM_I915_GEM_UNPIN 0x16 |
| #define DRM_I915_GEM_BUSY 0x17 |
| #define DRM_I915_GEM_THROTTLE 0x18 |
| #define DRM_I915_GEM_ENTERVT 0x19 |
| #define DRM_I915_GEM_LEAVEVT 0x1a |
| #define DRM_I915_GEM_CREATE 0x1b |
| #define DRM_I915_GEM_PREAD 0x1c |
| #define DRM_I915_GEM_PWRITE 0x1d |
| #define DRM_I915_GEM_MMAP 0x1e |
| #define DRM_I915_GEM_SET_DOMAIN 0x1f |
| #define DRM_I915_GEM_SW_FINISH 0x20 |
| #define DRM_I915_GEM_SET_TILING 0x21 |
| #define DRM_I915_GEM_GET_TILING 0x22 |
| #define DRM_I915_GEM_GET_APERTURE 0x23 |
| #define DRM_I915_GEM_MMAP_GTT 0x24 |
| #define DRM_I915_VBLANK_SWAP 0x0f |
| #define DRM_I915_HWS_ADDR 0x11 |
| #define DRM_I915_GEM_INIT 0x13 |
| #define DRM_I915_GEM_EXECBUFFER 0x14 |
| #define DRM_I915_GEM_PIN 0x15 |
| #define DRM_I915_GEM_UNPIN 0x16 |
| #define DRM_I915_GEM_BUSY 0x17 |
| #define DRM_I915_GEM_THROTTLE 0x18 |
| #define DRM_I915_GEM_ENTERVT 0x19 |
| #define DRM_I915_GEM_LEAVEVT 0x1a |
| #define DRM_I915_GEM_CREATE 0x1b |
| #define DRM_I915_GEM_PREAD 0x1c |
| #define DRM_I915_GEM_PWRITE 0x1d |
| #define DRM_I915_GEM_MMAP 0x1e |
| #define DRM_I915_GEM_SET_DOMAIN 0x1f |
| #define DRM_I915_GEM_SW_FINISH 0x20 |
| #define DRM_I915_GEM_SET_TILING 0x21 |
| #define DRM_I915_GEM_GET_TILING 0x22 |
| #define DRM_I915_GEM_GET_APERTURE 0x23 |
| #define DRM_I915_GEM_MMAP_GTT 0x24 |
| #define DRM_I915_GET_PIPE_FROM_CRTC_ID 0x25 |
| #define DRM_I915_GEM_MADVISE 0x26 |
| #define DRM_I915_GEM_MADVISE 0x26 |
| #define DRM_I915_OVERLAY_PUT_IMAGE 0x27 |
| #define DRM_I915_OVERLAY_ATTRS 0x28 |
| #define DRM_I915_OVERLAY_ATTRS 0x28 |
| #define DRM_I915_GEM_EXECBUFFER2 0x29 |
| #define DRM_I915_GET_SPRITE_COLORKEY 0x2a |
| #define DRM_I915_SET_SPRITE_COLORKEY 0x2b |
| #define DRM_I915_GEM_WAIT 0x2c |
| #define DRM_I915_GEM_WAIT 0x2c |
| #define DRM_I915_GEM_CONTEXT_CREATE 0x2d |
| #define DRM_I915_GEM_CONTEXT_DESTROY 0x2e |
| #define DRM_I915_GEM_SET_CACHEING 0x2f |