| 190,16 → 190,16 |
|---|
| # define DP_TRAIN_VOLTAGE_SWING_MASK 0x3 |
| # define DP_TRAIN_VOLTAGE_SWING_SHIFT 0 |
| # define DP_TRAIN_MAX_SWING_REACHED (1 << 2) |
| # define DP_TRAIN_VOLTAGE_SWING_400 (0 << 0) |
| # define DP_TRAIN_VOLTAGE_SWING_600 (1 << 0) |
| # define DP_TRAIN_VOLTAGE_SWING_800 (2 << 0) |
| # define DP_TRAIN_VOLTAGE_SWING_1200 (3 << 0) |
| # define DP_TRAIN_VOLTAGE_SWING_LEVEL_0 (0 << 0) |
| # define DP_TRAIN_VOLTAGE_SWING_LEVEL_1 (1 << 0) |
| # define DP_TRAIN_VOLTAGE_SWING_LEVEL_2 (2 << 0) |
| # define DP_TRAIN_VOLTAGE_SWING_LEVEL_3 (3 << 0) |
| |
| # define DP_TRAIN_PRE_EMPHASIS_MASK (3 << 3) |
| # define DP_TRAIN_PRE_EMPHASIS_0 (0 << 3) |
| # define DP_TRAIN_PRE_EMPHASIS_3_5 (1 << 3) |
| # define DP_TRAIN_PRE_EMPHASIS_6 (2 << 3) |
| # define DP_TRAIN_PRE_EMPHASIS_9_5 (3 << 3) |
| # define DP_TRAIN_PRE_EMPH_LEVEL_0 (0 << 3) |
| # define DP_TRAIN_PRE_EMPH_LEVEL_1 (1 << 3) |
| # define DP_TRAIN_PRE_EMPH_LEVEL_2 (2 << 3) |
| # define DP_TRAIN_PRE_EMPH_LEVEL_3 (3 << 3) |
| |
| # define DP_TRAIN_PRE_EMPHASIS_SHIFT 3 |
| # define DP_TRAIN_MAX_PRE_EMPHASIS_REACHED (1 << 5) |
| 304,6 → 304,7 |
|---|
| |
| #define DP_TEST_SINK_MISC 0x246 |
| #define DP_TEST_CRC_SUPPORTED (1 << 5) |
| # define DP_TEST_COUNT_MASK 0x7 |
| |
| #define DP_TEST_RESPONSE 0x260 |
| # define DP_TEST_ACK (1 << 0) |
| 404,26 → 405,6 |
|---|
| #define MODE_I2C_READ 4 |
| #define MODE_I2C_STOP 8 |
| |
| /** |
| * struct i2c_algo_dp_aux_data - driver interface structure for i2c over dp |
| * aux algorithm |
| * @running: set by the algo indicating whether an i2c is ongoing or whether |
| * the i2c bus is quiescent |
| * @address: i2c target address for the currently ongoing transfer |
| * @aux_ch: driver callback to transfer a single byte of the i2c payload |
| */ |
| struct i2c_algo_dp_aux_data { |
| bool running; |
| u16 address; |
| int (*aux_ch) (struct i2c_adapter *adapter, |
| int mode, uint8_t write_byte, |
| uint8_t *read_byte); |
| }; |
| |
| int |
| i2c_dp_aux_add_bus(struct i2c_adapter *adapter); |
| |
| |
| #define DP_LINK_STATUS_SIZE 6 |
| bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE], |
| int lane_count); |
| 550,6 → 531,7 |
|---|
| struct mutex hw_mutex; |
| ssize_t (*transfer)(struct drm_dp_aux *aux, |
| struct drm_dp_aux_msg *msg); |
| unsigned i2c_nack_count, i2c_defer_count; |
| }; |
| |
| ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, |