0,0 → 1,81 |
#include "math64.h" |
#include "pxa255_DSP.h" |
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Boolean pxa255dspAccess(struct ArmCpu* cpu, void* userData, Boolean MRRC, UInt8 op, UInt8 RdLo, UInt8 RdHi, UInt8 acc){ |
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Pxa255dsp* dsp = userData; |
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if(acc != 0 || op != 0) return false; //bad encoding |
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if(MRRC){ //MRA: read acc0 |
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cpuSetReg(cpu, RdLo, u64_64_to_32(dsp->acc0)); |
cpuSetReg(cpu, RdHi, (UInt8)u64_get_hi(dsp->acc0)); |
} |
else{ //MAR: write acc0 |
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dsp->acc0 = u64_from_halves(cpuGetRegExternal(cpu, RdHi) & 0xFF, cpuGetRegExternal(cpu, RdLo)); |
} |
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return true; |
} |
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Boolean pxa255dspOp(struct ArmCpu* cpu, void* userData, Boolean two/* MCR2/MRC2 ? */, Boolean MRC, UInt8 op1, UInt8 Rs, UInt8 opcode_3, UInt8 Rm, UInt8 acc){ |
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Pxa255dsp* dsp = userData; |
UInt64 addend = u64_zero(); |
UInt32 Vs, Vm; |
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if(op1 != 1 || two || MRC || acc != 0) return false; //bad encoding |
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Vs = cpuGetRegExternal(cpu, Rs); |
Vm = cpuGetRegExternal(cpu, Rm); |
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switch(opcode_3 >> 2){ |
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case 0: //MIA |
addend = u64_smul3232(Vm, Vs); |
break; |
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case 1: //invalid |
return false; |
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case 2: //MIAPH |
addend = u64_smul3232((Int32)((Int16)(Vm >> 0)), (Int32)((Int16)(Vs >> 0))); |
addend = u64_add(addend, u64_smul3232((Int32)((Int16)(Vm >> 16)), (Int32)((Int16)(Vs >> 16)))); |
break; |
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case 3: //MIAxy |
if(opcode_3 & 2) Vm >>= 16; //X set |
if(opcode_3 & 1) Vs >>= 16; //Y set |
addend = u64_smul3232((Int32)((Int16)Vm), (Int32)((Int16)Vs)); |
break; |
} |
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dsp->acc0 = u64_and(u64_add(dsp->acc0, addend), u64_from_halves(0xFF, 0xFFFFFFFFUL)); |
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return true; |
} |
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Boolean pxa255dspInit(Pxa255dsp* dsp, ArmCpu* cpu){ |
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ArmCoprocessor cp; |
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__mem_zero(dsp, sizeof(Pxa255dsp)); |
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cp.regXfer = pxa255dspOp; |
cp.dataProcessing = NULL; |
cp.memAccess = NULL; |
cp.twoRegF = pxa255dspAccess; |
cp.userData = dsp; |
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cpuCoprocessorRegister(cpu, 0, &cp); |
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return true; |
} |
Property changes: |
Added: svn:executable |
+* |
\ No newline at end of property |