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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 808 | serge | 1 | |
| 2 | /* R500 */ |
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| 3 | { RHD_RV505, "RV505" }, |
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| 4 | { RHD_RV515, "RV515" }, |
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| 5 | { RHD_RV516, "RV516" }, |
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| 6 | { RHD_R520, "R520" }, |
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| 7 | { RHD_RV530, "RV530" }, |
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| 8 | { RHD_RV535, "RV535" }, |
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| 9 | { RHD_RV550, "RV550" }, |
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| 10 | { RHD_RV560, "RV560" }, |
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| 11 | { RHD_RV570, "RV570" }, |
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| 12 | { RHD_R580, "R580" }, |
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| 13 | /* R500 Mobility */ |
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| 14 | { RHD_M52, "M52" }, |
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| 15 | { RHD_M54, "M54" }, |
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| 16 | { RHD_M56, "M56" }, |
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| 17 | { RHD_M58, "M58" }, |
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| 18 | { RHD_M62, "M62" }, |
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| 19 | { RHD_M64, "M64" }, |
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| 20 | { RHD_M66, "M66" }, |
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| 21 | { RHD_M68, "M68" }, |
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| 22 | { RHD_M71, "M71" }, |
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| 23 | /* R500 integrated */ |
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| 24 | { RHD_RS600, "RS600" }, |
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| 25 | { RHD_RS690, "RS690" }, |
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| 26 | { RHD_RS740, "RS740" }, |
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| 27 | /* R600 */ |
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| 28 | { RHD_R600, "R600" }, |
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| 29 | { RHD_RV610, "RV610" }, |
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| 30 | { RHD_RV630, "RV630" }, |
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| 31 | /* R600 Mobility */ |
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| 32 | { RHD_M72, "M72" }, |
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| 33 | { RHD_M74, "M74" }, |
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| 34 | { RHD_M76, "M76" }, |
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| 35 | /* RV670 came into existence after RV6x0 and M7x */ |
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| 36 | { RHD_RV670, "RV670" }, |
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| 37 | { RHD_R680, "R680" }, |
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| 38 | { RHD_RV620, "RV620" }, |
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| 39 | { RHD_RV635, "RV635" }, |
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| 40 | { -1, NULL } |
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| 41 | }; |
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| 42 | |||
| 43 | |||
| 44 | # define PCI_ID_LIST PciChipset_t RHDPCIchipsets[] |
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| 45 | # define LIST_END { 0, 0} |
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| 46 | |||
| 47 | |||
| 48 | RHD_DEVICE_MATCH( 0x7100, RHD_R520 ), /* Radeon X1800 */ |
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| 49 | RHD_DEVICE_MATCH( 0x7101, RHD_M58 ), /* Mobility Radeon X1800 XT */ |
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| 50 | RHD_DEVICE_MATCH( 0x7102, RHD_M58 ), /* Mobility Radeon X1800 */ |
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| 51 | RHD_DEVICE_MATCH( 0x7103, RHD_M58 ), /* Mobility FireGL V7200 */ |
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| 52 | RHD_DEVICE_MATCH( 0x7104, RHD_R520 ), /* FireGL V7200 */ |
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| 53 | RHD_DEVICE_MATCH( 0x7105, RHD_R520 ), /* FireGL V5300 */ |
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| 54 | RHD_DEVICE_MATCH( 0x7106, RHD_M58 ), /* Mobility FireGL V7100 */ |
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| 55 | RHD_DEVICE_MATCH( 0x7108, RHD_R520 ), /* Radeon X1800 */ |
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| 56 | RHD_DEVICE_MATCH( 0x7109, RHD_R520 ), /* Radeon X1800 */ |
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| 57 | RHD_DEVICE_MATCH( 0x710A, RHD_R520 ), /* Radeon X1800 */ |
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| 58 | RHD_DEVICE_MATCH( 0x710B, RHD_R520 ), /* Radeon X1800 */ |
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| 59 | RHD_DEVICE_MATCH( 0x710C, RHD_R520 ), /* Radeon X1800 */ |
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| 60 | RHD_DEVICE_MATCH( 0x710E, RHD_R520 ), /* FireGL V7300 */ |
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| 61 | RHD_DEVICE_MATCH( 0x710F, RHD_R520 ), /* FireGL V7350 */ |
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| 62 | RHD_DEVICE_MATCH( 0x7140, RHD_RV515 ), /* Radeon X1600/X1550 */ |
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| 63 | RHD_DEVICE_MATCH( 0x7141, RHD_RV505 ), /* RV505 */ |
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| 64 | RHD_DEVICE_MATCH( 0x7142, RHD_RV515 ), /* Radeon X1300/X1550 */ |
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| 65 | RHD_DEVICE_MATCH( 0x7143, RHD_RV505 ), /* Radeon X1550 */ |
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| 66 | RHD_DEVICE_MATCH( 0x7144, RHD_M54 ), /* M54-GL */ |
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| 67 | RHD_DEVICE_MATCH( 0x7145, RHD_M54 ), /* Mobility Radeon X1400 */ |
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| 68 | RHD_DEVICE_MATCH( 0x7146, RHD_RV515 ), /* Radeon X1300/X1550 */ |
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| 69 | RHD_DEVICE_MATCH( 0x7147, RHD_RV505 ), /* Radeon X1550 64-bit */ |
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| 70 | RHD_DEVICE_MATCH( 0x7149, RHD_M52 ), /* Mobility Radeon X1300 */ |
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| 71 | RHD_DEVICE_MATCH( 0x714A, RHD_M52 ), /* Mobility Radeon X1300 */ |
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| 72 | RHD_DEVICE_MATCH( 0x714B, RHD_M52 ), /* Mobility Radeon X1300 */ |
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| 73 | RHD_DEVICE_MATCH( 0x714C, RHD_M52 ), /* Mobility Radeon X1300 */ |
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| 74 | RHD_DEVICE_MATCH( 0x714D, RHD_RV515 ), /* Radeon X1300 */ |
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| 75 | RHD_DEVICE_MATCH( 0x714E, RHD_RV515 ), /* Radeon X1300 */ |
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| 76 | RHD_DEVICE_MATCH( 0x714F, RHD_RV505 ), /* RV505 */ |
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| 77 | RHD_DEVICE_MATCH( 0x7151, RHD_RV505 ), /* RV505 */ |
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| 78 | RHD_DEVICE_MATCH( 0x7152, RHD_RV515 ), /* FireGL V3300 */ |
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| 79 | RHD_DEVICE_MATCH( 0x7153, RHD_RV515 ), /* FireGL V3350 */ |
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| 80 | RHD_DEVICE_MATCH( 0x715E, RHD_RV515 ), /* Radeon X1300 */ |
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| 81 | RHD_DEVICE_MATCH( 0x715F, RHD_RV505 ), /* Radeon X1550 64-bit */ |
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| 82 | RHD_DEVICE_MATCH( 0x7180, RHD_RV516 ), /* Radeon X1300/X1550 */ |
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| 83 | RHD_DEVICE_MATCH( 0x7181, RHD_RV516 ), /* Radeon X1600 */ |
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| 84 | RHD_DEVICE_MATCH( 0x7183, RHD_RV516 ), /* Radeon X1300/X1550 */ |
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| 85 | RHD_DEVICE_MATCH( 0x7186, RHD_M64 ), /* Mobility Radeon X1450 */ |
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| 86 | RHD_DEVICE_MATCH( 0x7187, RHD_RV516 ), /* Radeon X1300/X1550 */ |
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| 87 | RHD_DEVICE_MATCH( 0x7188, RHD_M64 ), /* Mobility Radeon X2300 */ |
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| 88 | RHD_DEVICE_MATCH( 0x718A, RHD_M64 ), /* Mobility Radeon X2300 */ |
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| 89 | RHD_DEVICE_MATCH( 0x718B, RHD_M62 ), /* Mobility Radeon X1350 */ |
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| 90 | RHD_DEVICE_MATCH( 0x718C, RHD_M62 ), /* Mobility Radeon X1350 */ |
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| 91 | RHD_DEVICE_MATCH( 0x718D, RHD_M64 ), /* Mobility Radeon X1450 */ |
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| 92 | RHD_DEVICE_MATCH( 0x718F, RHD_RV516 ), /* Radeon X1300 */ |
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| 93 | RHD_DEVICE_MATCH( 0x7193, RHD_RV516 ), /* Radeon X1550 */ |
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| 94 | RHD_DEVICE_MATCH( 0x7196, RHD_M62 ), /* Mobility Radeon X1350 */ |
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| 95 | RHD_DEVICE_MATCH( 0x719B, RHD_RV516 ), /* FireMV 2250 */ |
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| 96 | RHD_DEVICE_MATCH( 0x719F, RHD_RV516 ), /* Radeon X1550 64-bit */ |
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| 97 | RHD_DEVICE_MATCH( 0x71C0, RHD_RV530 ), /* Radeon X1600 */ |
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| 98 | RHD_DEVICE_MATCH( 0x71C1, RHD_RV535 ), /* Radeon X1650 */ |
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| 99 | RHD_DEVICE_MATCH( 0x71C2, RHD_RV530 ), /* Radeon X1600 */ |
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| 100 | RHD_DEVICE_MATCH( 0x71C3, RHD_RV535 ), /* Radeon X1600 */ |
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| 101 | RHD_DEVICE_MATCH( 0x71C4, RHD_M56 ), /* Mobility FireGL V5200 */ |
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| 102 | RHD_DEVICE_MATCH( 0x71C5, RHD_M56 ), /* Mobility Radeon X1600 */ |
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| 103 | RHD_DEVICE_MATCH( 0x71C6, RHD_RV530 ), /* Radeon X1650 */ |
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| 104 | RHD_DEVICE_MATCH( 0x71C7, RHD_RV535 ), /* Radeon X1650 */ |
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| 105 | RHD_DEVICE_MATCH( 0x71CD, RHD_RV530 ), /* Radeon X1600 */ |
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| 106 | RHD_DEVICE_MATCH( 0x71CE, RHD_RV530 ), /* Radeon X1300 XT/X1600 Pro */ |
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| 107 | RHD_DEVICE_MATCH( 0x71D2, RHD_RV530 ), /* FireGL V3400 */ |
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| 108 | RHD_DEVICE_MATCH( 0x71D4, RHD_M66 ), /* Mobility FireGL V5250 */ |
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| 109 | RHD_DEVICE_MATCH( 0x71D5, RHD_M66 ), /* Mobility Radeon X1700 */ |
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| 110 | RHD_DEVICE_MATCH( 0x71D6, RHD_M66 ), /* Mobility Radeon X1700 XT */ |
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| 111 | RHD_DEVICE_MATCH( 0x71DA, RHD_RV530 ), /* FireGL V5200 */ |
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| 112 | RHD_DEVICE_MATCH( 0x71DE, RHD_M66 ), /* Mobility Radeon X1700 */ |
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| 113 | RHD_DEVICE_MATCH( 0x7200, RHD_RV550 ), /* Radeon X2300HD */ |
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| 114 | RHD_DEVICE_MATCH( 0x7210, RHD_M71 ), /* Mobility Radeon HD 2300 */ |
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| 115 | RHD_DEVICE_MATCH( 0x7211, RHD_M71 ), /* Mobility Radeon HD 2300 */ |
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| 116 | RHD_DEVICE_MATCH( 0x7240, RHD_R580 ), /* Radeon X1950 */ |
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| 117 | RHD_DEVICE_MATCH( 0x7243, RHD_R580 ), /* Radeon X1900 */ |
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| 118 | RHD_DEVICE_MATCH( 0x7244, RHD_R580 ), /* Radeon X1950 */ |
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| 119 | RHD_DEVICE_MATCH( 0x7245, RHD_R580 ), /* Radeon X1900 */ |
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| 120 | RHD_DEVICE_MATCH( 0x7246, RHD_R580 ), /* Radeon X1900 */ |
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| 121 | RHD_DEVICE_MATCH( 0x7247, RHD_R580 ), /* Radeon X1900 */ |
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| 122 | RHD_DEVICE_MATCH( 0x7248, RHD_R580 ), /* Radeon X1900 */ |
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| 123 | RHD_DEVICE_MATCH( 0x7249, RHD_R580 ), /* Radeon X1900 */ |
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| 124 | RHD_DEVICE_MATCH( 0x724A, RHD_R580 ), /* Radeon X1900 */ |
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| 125 | RHD_DEVICE_MATCH( 0x724B, RHD_R580 ), /* Radeon X1900 */ |
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| 126 | RHD_DEVICE_MATCH( 0x724C, RHD_R580 ), /* Radeon X1900 */ |
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| 127 | RHD_DEVICE_MATCH( 0x724D, RHD_R580 ), /* Radeon X1900 */ |
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| 128 | RHD_DEVICE_MATCH( 0x724E, RHD_R580 ), /* AMD Stream Processor */ |
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| 129 | RHD_DEVICE_MATCH( 0x724F, RHD_R580 ), /* Radeon X1900 */ |
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| 130 | RHD_DEVICE_MATCH( 0x7280, RHD_RV570 ), /* Radeon X1950 */ |
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| 131 | RHD_DEVICE_MATCH( 0x7281, RHD_RV560 ), /* RV560 */ |
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| 132 | RHD_DEVICE_MATCH( 0x7283, RHD_RV560 ), /* RV560 */ |
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| 133 | RHD_DEVICE_MATCH( 0x7284, RHD_M68 ), /* Mobility Radeon X1900 */ |
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| 134 | RHD_DEVICE_MATCH( 0x7287, RHD_RV560 ), /* RV560 */ |
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| 135 | RHD_DEVICE_MATCH( 0x7288, RHD_RV570 ), /* Radeon X1950 GT */ |
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| 136 | RHD_DEVICE_MATCH( 0x7289, RHD_RV570 ), /* RV570 */ |
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| 137 | RHD_DEVICE_MATCH( 0x728B, RHD_RV570 ), /* RV570 */ |
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| 138 | RHD_DEVICE_MATCH( 0x728C, RHD_RV570 ), /* ATI FireGL V7400 */ |
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| 139 | RHD_DEVICE_MATCH( 0x7290, RHD_RV560 ), /* RV560 */ |
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| 140 | RHD_DEVICE_MATCH( 0x7291, RHD_RV560 ), /* Radeon X1650 */ |
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| 141 | RHD_DEVICE_MATCH( 0x7293, RHD_RV560 ), /* Radeon X1650 */ |
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| 142 | RHD_DEVICE_MATCH( 0x7297, RHD_RV560 ), /* RV560 */ |
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| 143 | RHD_DEVICE_MATCH( 0x791E, RHD_RS690 ), /* Radeon X1200 */ |
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| 144 | RHD_DEVICE_MATCH( 0x791F, RHD_RS690 ), /* Radeon X1200 */ |
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| 145 | RHD_DEVICE_MATCH( 0x793F, RHD_RS600 ), /* Radeon Xpress 1200 */ |
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| 146 | RHD_DEVICE_MATCH( 0x7941, RHD_RS600 ), /* Radeon Xpress 1200 */ |
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| 147 | RHD_DEVICE_MATCH( 0x7942, RHD_RS600 ), /* Radeon Xpress 1200 (M) */ |
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| 148 | RHD_DEVICE_MATCH( 0x796C, RHD_RS740 ), /* RS740 */ |
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| 149 | RHD_DEVICE_MATCH( 0x796D, RHD_RS740 ), /* RS740M */ |
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| 150 | RHD_DEVICE_MATCH( 0x796E, RHD_RS740 ), /* ATI Radeon 2100 RS740 */ |
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| 151 | RHD_DEVICE_MATCH( 0x796F, RHD_RS740 ), /* RS740M */ |
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| 152 | RHD_DEVICE_MATCH( 0x9400, RHD_R600 ), /* Radeon HD 2900 XT */ |
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| 153 | RHD_DEVICE_MATCH( 0x9401, RHD_R600 ), /* Radeon HD 2900 XT */ |
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| 154 | RHD_DEVICE_MATCH( 0x9402, RHD_R600 ), /* Radeon HD 2900 XT */ |
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| 155 | RHD_DEVICE_MATCH( 0x9403, RHD_R600 ), /* Radeon HD 2900 Pro */ |
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| 156 | RHD_DEVICE_MATCH( 0x9405, RHD_R600 ), /* Radeon HD 2900 GT */ |
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| 157 | RHD_DEVICE_MATCH( 0x940A, RHD_R600 ), /* FireGL V8650 */ |
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| 158 | RHD_DEVICE_MATCH( 0x940B, RHD_R600 ), /* FireGL V8600 */ |
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| 159 | RHD_DEVICE_MATCH( 0x940F, RHD_R600 ), /* FireGL V7600 */ |
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| 160 | RHD_DEVICE_MATCH( 0x94C0, RHD_RV610 ), /* RV610 */ |
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| 161 | RHD_DEVICE_MATCH( 0x94C1, RHD_RV610 ), /* Radeon HD 2400 XT */ |
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| 162 | RHD_DEVICE_MATCH( 0x94C3, RHD_RV610 ), /* Radeon HD 2400 Pro */ |
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| 163 | RHD_DEVICE_MATCH( 0x94C4, RHD_RV610 ), /* ATI Radeon HD 2400 PRO AGP */ |
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| 164 | RHD_DEVICE_MATCH( 0x94C5, RHD_RV610 ), /* FireGL V4000 */ |
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| 165 | RHD_DEVICE_MATCH( 0x94C6, RHD_RV610 ), /* RV610 */ |
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| 166 | RHD_DEVICE_MATCH( 0x94C7, RHD_RV610 ), /* ATI Radeon HD 2350 */ |
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| 167 | RHD_DEVICE_MATCH( 0x94C8, RHD_M74 ), /* Mobility Radeon HD 2400 XT */ |
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| 168 | RHD_DEVICE_MATCH( 0x94C9, RHD_M72 ), /* Mobility Radeon HD 2400 */ |
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| 169 | RHD_DEVICE_MATCH( 0x94CB, RHD_M72 ), /* ATI RADEON E2400 */ |
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| 170 | RHD_DEVICE_MATCH( 0x94CC, RHD_RV610 ), /* ATI Radeon HD 2400 */ |
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| 171 | RHD_DEVICE_MATCH( 0x9500, RHD_RV670 ), /* RV670 */ |
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| 172 | RHD_DEVICE_MATCH( 0x9501, RHD_RV670 ), /* ATI Radeon HD3870 */ |
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| 173 | RHD_DEVICE_MATCH( 0x9505, RHD_RV670 ), /* ATI Radeon HD3850 */ |
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| 174 | RHD_DEVICE_MATCH( 0x9507, RHD_RV670 ), /* RV670 */ |
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| 175 | RHD_DEVICE_MATCH( 0x950F, RHD_R680 ), /* ATI Radeon HD3870 X2 */ |
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| 176 | RHD_DEVICE_MATCH( 0x9511, RHD_RV670 ), /* ATI FireGL V7700 */ |
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| 177 | RHD_DEVICE_MATCH( 0x9515, RHD_RV670 ), /* ATI Radeon HD 3850 AGP */ |
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| 178 | RHD_DEVICE_MATCH( 0x9580, RHD_RV630 ), /* RV630 */ |
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| 179 | RHD_DEVICE_MATCH( 0x9581, RHD_M76 ), /* Mobility Radeon HD 2600 */ |
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| 180 | RHD_DEVICE_MATCH( 0x9583, RHD_M76 ), /* Mobility Radeon HD 2600 XT */ |
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| 181 | RHD_DEVICE_MATCH( 0x9586, RHD_RV630 ), /* ATI Radeon HD 2600 XT AGP */ |
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| 182 | RHD_DEVICE_MATCH( 0x9587, RHD_RV630 ), /* ATI Radeon HD 2600 Pro AGP */ |
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| 183 | RHD_DEVICE_MATCH( 0x9588, RHD_RV630 ), /* Radeon HD 2600 XT */ |
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| 184 | RHD_DEVICE_MATCH( 0x9589, RHD_RV630 ), /* Radeon HD 2600 Pro */ |
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| 185 | RHD_DEVICE_MATCH( 0x958A, RHD_RV630 ), /* Gemini RV630 */ |
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| 186 | RHD_DEVICE_MATCH( 0x958B, RHD_M76 ), /* Gemini ATI Mobility Radeon HD 2600 XT */ |
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| 187 | RHD_DEVICE_MATCH( 0x958C, RHD_RV630 ), /* FireGL V5600 */ |
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| 188 | RHD_DEVICE_MATCH( 0x958D, RHD_RV630 ), /* FireGL V3600 */ |
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| 189 | RHD_DEVICE_MATCH( 0x958E, RHD_RV630 ), /* ATI Radeon HD 2600 LE */ |
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| 190 | RHD_DEVICE_MATCH( 0x9590, RHD_RV635 ), /* ATI Radeon HD 3600 Series */ |
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| 191 | RHD_DEVICE_MATCH( 0x9591, RHD_RV635 ), /* ATI Mobility Radeon HD 3650 */ |
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| 192 | RHD_DEVICE_MATCH( 0x9596, RHD_RV635 ), /* ATI Radeon HD 3650 AGP */ |
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| 193 | RHD_DEVICE_MATCH( 0x9597, RHD_RV635 ), /* ATI Radeon HD 3600 Series */ |
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| 194 | RHD_DEVICE_MATCH( 0x9598, RHD_RV635 ), /* ATI Radeon HD 3670 */ |
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| 195 | RHD_DEVICE_MATCH( 0x9599, RHD_RV635 ), /* ATI Radeon HD 3600 Series */ |
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| 196 | RHD_DEVICE_MATCH( 0x95C0, RHD_RV620 ), /* ATI Radeon HD 3470 */ |
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| 197 | RHD_DEVICE_MATCH( 0x95C2, RHD_M82 ), /* ATI Mobility Radeon HD 3430 (M82) */ |
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| 198 | RHD_DEVICE_MATCH( 0x95C4, RHD_M82 ), /* ATI Mobility Radeon HD 3400 Series (M82) */ |
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| 199 | RHD_DEVICE_MATCH( 0x95C5, RHD_RV620 ), /* ATI Radeon HD 3450 */ |
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| 200 | RHD_DEVICE_MATCH( 0x95C7, RHD_RV620 ), /* ATI Radeon HD 3430 */ |
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| 201 | RHD_DEVICE_MATCH( 0x95CD, RHD_RV620 ), /* ATI FireMV 2450 */ |
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| 202 | RHD_DEVICE_MATCH( 0x95CE, RHD_RV620 ), /* ATI FireMV 2260 */ |
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| 203 | RHD_DEVICE_MATCH( 0x95CF, RHD_RV620 ), /* ATI FireMV 2260 */ |
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| 204 | LIST_END |
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| 205 | }; |
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| 206 | |||
| 207 | |||
| 208 | xf86TokenToString(SymTabPtr table, int token) |
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| 209 | { |
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| 210 | int i; |
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| 211 | |||
| 212 | |||
| 213 | |||
| 214 | |||
| 215 | return NULL; |
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| 216 | else |
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| 217 | return(table[i].name); |
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| 218 | } |
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| 219 | |||
| 220 | |||
| 221 | { |
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| 222 | const PciChipset_t *dev; |
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| 223 | u32 bus, last_bus; |
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| 224 | |||
| 225 | |||
| 226 | return 0; |
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| 227 | |||
| 228 | |||
| 229 | { |
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| 230 | u32 devfn; |
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| 231 | |||
| 232 | |||
| 233 | { |
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| 234 | u32 id; |
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| 235 | id = PciRead32(bus,devfn, 0); |
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| 236 | |||
| 237 | |||
| 238 | continue; |
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| 239 | |||
| 240 | |||
| 241 | { |
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| 242 | CARD32 reg2C; |
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| 243 | int i; |
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| 244 | |||
| 245 | |||
| 246 | |||
| 247 | |||
| 248 | rhd.devfn = devfn; |
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| 249 | rhd.PciTag = pciTag(bus,(devfn>>3)&0x1F,devfn&0x7); |
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| 250 | |||
| 251 | |||
| 252 | |||
| 253 | |||
| 254 | |||
| 255 | |||
| 256 | rhd.subdevice_id = reg2C >> 16; |
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| 257 | |||
| 258 | |||
| 259 | { |
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| 260 | CARD32 base; |
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| 261 | Bool validSize; |
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| 262 | |||
| 263 | |||
| 264 | if(base) |
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| 265 | { |
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| 266 | if (base & PCI_MAP_IO) |
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| 267 | { |
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| 268 | rhd.ioBase[i] = (CARD32)PCIGETIO(base); |
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| 269 | rhd.memtype[i] = base & PCI_MAP_IO_ATTR_MASK; |
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| 270 | } |
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| 271 | else |
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| 272 | { |
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| 273 | rhd.memBase[i] = (CARD32)PCIGETMEMORY(base); |
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| 274 | rhd.memtype[i] = base & PCI_MAP_MEMORY_ATTR_MASK; |
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| 275 | } |
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| 276 | } |
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| 277 | rhd.memsize[i] = pciGetBaseSize(bus,devfn, i, TRUE, &validSize); |
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| 278 | } |
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| 279 | rhd.ChipName = (char*)xf86TokenToString(RHDChipsets, rhd.PciDeviceID); |
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| 280 | |||
| 281 | |||
| 282 | } |
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| 283 | }; |
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| 284 | }; |
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| 285 | return NULL; |
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| 286 | } |
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| 287 | |||
| 288 | |||
| 289 | { |
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| 290 | while(list->device) |
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| 291 | { |
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| 292 | if(dev==list->device) |
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| 293 | return list; |
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| 294 | list++; |
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| 295 | } |
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| 296 | return 0; |
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| 297 | } |
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| 298 | |||
| 299 | |||
| 300 | |||
| 301 | { |
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| 302 | int offset; |
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| 303 | CARD32 addr1; |
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| 304 | CARD32 addr2; |
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| 305 | CARD32 mask1; |
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| 306 | CARD32 mask2; |
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| 307 | int bits = 0; |
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| 308 | |||
| 309 | |||
| 310 | * silently ignore bogus index values. Valid values are 0-6. 0-5 are |
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| 311 | * the 6 base address registers, and 6 is the ROM base address register. |
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| 312 | */ |
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| 313 | if (index < 0 || index > 6) |
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| 314 | return 0; |
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| 315 | |||
| 316 | |||
| 317 | *min = destructive; |
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| 318 | |||
| 319 | |||
| 320 | if (index == 6) |
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| 321 | offset = PCI_MAP_ROM_REG; |
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| 322 | else |
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| 323 | offset = PCI_MAP_REG_START + (index << 2); |
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| 324 | |||
| 325 | |||
| 326 | /* |
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| 327 | * Check if this is the second part of a 64 bit address. |
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| 328 | * XXX need to check how endianness affects 64 bit addresses. |
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| 329 | */ |
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| 330 | if (index > 0 && index < 6) { |
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| 331 | addr2 = PciRead32(bus, devfn, offset - 4); |
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| 332 | if (PCI_MAP_IS_MEM(addr2) && PCI_MAP_IS64BITMEM(addr2)) |
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| 333 | return 0; |
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| 334 | } |
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| 335 | |||
| 336 | |||
| 337 | PciWrite32(bus, devfn, offset, 0xffffffff); |
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| 338 | mask1 = PciRead32(bus, devfn, offset); |
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| 339 | PciWrite32(bus, devfn, offset, addr1); |
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| 340 | } else { |
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| 341 | mask1 = addr1; |
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| 342 | } |
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| 343 | |||
| 344 | |||
| 345 | if (index < 5 && PCI_MAP_IS_MEM(mask1) && PCI_MAP_IS64BITMEM(mask1)) |
||
| 346 | { |
||
| 347 | if (PCIGETMEMORY(mask1) == 0) |
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| 348 | { |
||
| 349 | addr2 = PciRead32(bus, devfn, offset + 4); |
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| 350 | if (destructive) |
||
| 351 | { |
||
| 352 | PciWrite32(bus, devfn, offset + 4, 0xffffffff); |
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| 353 | mask2 = PciRead32(bus, devfn, offset + 4); |
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| 354 | PciWrite32(bus, devfn, offset + 4, addr2); |
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| 355 | } |
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| 356 | else |
||
| 357 | { |
||
| 358 | mask2 = addr2; |
||
| 359 | } |
||
| 360 | if (mask2 == 0) |
||
| 361 | return 0; |
||
| 362 | bits = 32; |
||
| 363 | while ((mask2 & 1) == 0) |
||
| 364 | { |
||
| 365 | bits++; |
||
| 366 | mask2 >>= 1; |
||
| 367 | } |
||
| 368 | if (bits > 32) |
||
| 369 | return bits; |
||
| 370 | } |
||
| 371 | } |
||
| 372 | if (index < 6) |
||
| 373 | if (PCI_MAP_IS_MEM(mask1)) |
||
| 374 | mask1 = PCIGETMEMORY(mask1); |
||
| 375 | else |
||
| 376 | mask1 = PCIGETIO(mask1); |
||
| 377 | else |
||
| 378 | mask1 = PCIGETROM(mask1); |
||
| 379 | if (mask1 == 0) |
||
| 380 | return 0; |
||
| 381 | bits = 0; |
||
| 382 | while ((mask1 & 1) == 0) { |
||
| 383 | bits++; |
||
| 384 | mask1 >>= 1; |
||
| 385 | } |
||
| 386 | /* I/O maps can be no larger than 8 bits */ |
||
| 387 | |||
| 388 | |||
| 389 | bits = 8; |
||
| 390 | /* ROM maps can be no larger than 24 bits */ |
||
| 391 | if (index == 6 && bits > 24) |
||
| 392 | bits = 24; |
||
| 393 | return bits; |
||
| 394 | } |
||
| 395 | > |
||
| 396 | |||
| 397 |