Rev 877 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed
| Rev | Author | Line No. | Line |
|---|---|---|---|
| 808 | serge | 1 | |
| 2 | |||
| 3 | { |
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| 4 | rhdPtr->MMIOMapSize = 1 << rhdPtr->memsize[RHD_MMIO_BAR]; |
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| 5 | rhdPtr->MMIOBase = MapIoMem((void*)rhdPtr->memBase[RHD_MMIO_BAR], |
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| 6 | rhdPtr->MMIOMapSize,PG_SW+PG_NOCACHE); |
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| 877 | serge | 7 | if( rhdPtr->MMIOBase==0) |
| 808 | serge | 8 | return 0; |
| 9 | |||
| 10 | DBG(dbgprintf("Mapped IO at %x (size %x)\n", rhdPtr->MMIOBase, rhdPtr->MMIOMapSize)); |
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| 11 | |||
| 12 | } |
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| 13 | |||
| 14 | #define RADEON_NB_TOM 0x15c |
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| 15 | |||
| 16 | static size_t rhdGetVideoRamSize(RHDPtr rhdPtr) |
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| 17 | |||
| 877 | serge | 18 | size_t RamSize, BARSize; |
| 808 | serge | 19 | |
| 877 | serge | 20 | if (rhdPtr->ChipSet == RHD_RS690) |
| 808 | serge | 21 | |
| 22 | else |
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| 23 | if (rhdPtr->IsIGP) |
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| 24 | { |
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| 25 | u32_t tom = _RHDRegRead(rhdPtr, RADEON_NB_TOM); |
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| 26 | RamSize = (((tom >> 16) - (tom & 0xffff) + 1) << 6); |
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| 877 | serge | 27 | _RHDRegWrite(rhdPtr,R5XX_CONFIG_MEMSIZE, RamSize<<10); |
| 808 | serge | 28 | } |
| 29 | else |
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| 30 | { |
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| 31 | if (rhdPtr->ChipSet < RHD_R600) |
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| 32 | { |
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| 33 | RamSize = (_RHDRegRead(rhdPtr, R5XX_CONFIG_MEMSIZE)) >> 10; |
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| 34 | if(RamSize==0) RamSize=8192; |
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| 35 | } |
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| 36 | else |
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| 37 | RamSize = (_RHDRegRead(rhdPtr, R6XX_CONFIG_MEMSIZE)) >> 10; |
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| 38 | }; |
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| 39 | |||
| 40 | BARSize = 1 << (rhdPtr->memsize[RHD_FB_BAR] - 10); |
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| 41 | |||
| 42 | BARSize = 0x20000; |
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| 43 | |||
| 44 | if (RamSize > BARSize) { |
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| 45 | |||
| 46 | " exceeds the PCI BAR aperture.\n")); |
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| 47 | DBG(dbgprintf("Using only %dkB of the total " |
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| 48 | "%dkB.\n", (int) BARSize, (int) RamSize)); |
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| 49 | return BARSize; |
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| 50 | } |
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| 51 | else return RamSize; |
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| 52 | } |
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| 53 | |||
| 54 | static Bool |
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| 55 | |||
| 56 | { |
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| 57 | rhdPtr->FbMapSize = 1 << rhdPtr->memsize[RHD_FB_BAR]; |
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| 58 | rhdPtr->PhisBase = rhdPtr->memBase[RHD_FB_BAR]; |
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| 59 | |||
| 60 | // rhdPtr->FbBase = MapIoMem(rhdPtr->PhisBase, rhdPtr->FbMapSize,PG_SW+PG_NOCACHE); |
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| 61 | |||
| 817 | serge | 62 | // if (!rhdPtr->FbBase) |
| 808 | serge | 63 | |
| 817 | serge | 64 | |
| 65 | /* These devices have an internal address reference, which some other |
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| 808 | serge | 66 | |
| 67 | * address in the BAR */ |
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| 68 | if (rhdPtr->ChipSet < RHD_R600) |
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| 69 | rhdPtr->FbIntAddress = _RHDRegRead(rhdPtr, HDP_FB_LOCATION)<< 16; |
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| 70 | else |
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| 71 | rhdPtr->FbIntAddress = _RHDRegRead(rhdPtr, R6XX_CONFIG_FB_BASE); |
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| 72 | |||
| 73 | // rhdPtr->FbIntAddress = _RHDRegRead(rhdPtr, 0x6110); |
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| 74 | |||
| 75 | |||
| 76 | if (rhdPtr->FbIntAddress != rhdPtr->PhisBase) |
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| 77 | |||
| 78 | "0x%08X while card Internal Address is 0x%08X\n", |
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| 79 | (unsigned int) rhdPtr->PhisBase,rhdPtr->FbIntAddress); |
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| 80 | // dbgprintf("Mapped FB at %p (size 0x%08X)\n",rhdPtr->FbBase, rhdPtr->FbMapSize); |
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| 81 | return TRUE; |
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| 817 | serge | 82 | } |
| 808 | serge | 83 | |
| 84 | Bool RHDPreInit() |
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| 85 | |||
| 86 | /* We need access to IO space already */ |
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| 87 | if (!rhdMapMMIO(&rhd)) { |
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| 88 | dbgprintf("Failed to map MMIO.\n"); |
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| 89 | return FALSE; |
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| 90 | }; |
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| 91 | |||
| 92 | rhd.videoRam = rhdGetVideoRamSize(&rhd); |
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| 93 | |||
| 94 | { |
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| 95 | dbgprintf("No Video RAM detected.\n"); |
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| 96 | goto error1; |
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| 97 | } |
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| 98 | dbgprintf("VideoRAM: %d kByte\n",rhd.videoRam); |
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| 99 | |||
| 100 | rhd.FbFreeStart = 0; |
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| 101 | |||
| 102 | |||
| 103 | if( !rhdMapFB(&rhd)) |
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| 104 | |||
| 105 | |||
| 106 | rhd.FbScanoutStart = 0; |
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| 107 | |||
| 108 | rhd.FbFreeStart = 10*1024*1024; |
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| 109 | rhd.FbFreeSize = rhd.FbMapSize - 10*1024*1024; |
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| 817 | serge | 110 | |
| 111 | rhdInitHeap(&rhd); |
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| 808 | serge | 112 | |
| 113 | |||
| 114 | error1: |
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| 115 | |||
| 116 | }; |
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| 117 | > |
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| 118 | > |
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| 119 |