Rev 808 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed
| Rev | Author | Line No. | Line |
|---|---|---|---|
| 808 | serge | 1 | |
| 2 | |||
| 3 | { |
||
| 4 | rhdPtr->MMIOMapSize = 1 << rhdPtr->memsize[RHD_MMIO_BAR]; |
||
| 5 | rhdPtr->MMIOBase = MapIoMem(rhdPtr->memBase[RHD_MMIO_BAR], |
||
| 6 | rhdPtr->MMIOMapSize,PG_SW+PG_NOCACHE); |
||
| 7 | if( rhdPtr->MMIOBase==0) |
||
| 8 | return 0; |
||
| 9 | |||
| 10 | DBG(dbgprintf("Mapped IO at %x (size %x)\n", rhdPtr->MMIOBase, rhdPtr->MMIOMapSize)); |
||
| 11 | |||
| 12 | } |
||
| 13 | |||
| 14 | #define RADEON_NB_TOM 0x15c |
||
| 15 | |||
| 16 | static CARD32 |
||
| 17 | |||
| 18 | { |
||
| 19 | CARD32 RamSize, BARSize; |
||
| 20 | |||
| 21 | if (rhdPtr->ChipSet == RHD_RS690) |
||
| 22 | |||
| 23 | else |
||
| 24 | if (rhdPtr->IsIGP) |
||
| 25 | { |
||
| 26 | CARD32 tom = _RHDRegRead(rhdPtr, RADEON_NB_TOM); |
||
| 27 | RamSize = (((tom >> 16) - (tom & 0xffff) + 1) << 6); |
||
| 28 | _RHDRegWrite(rhdPtr,R5XX_CONFIG_MEMSIZE, RamSize<<10); |
||
| 29 | } |
||
| 30 | else |
||
| 31 | { |
||
| 32 | if (rhdPtr->ChipSet < RHD_R600) |
||
| 33 | { |
||
| 34 | RamSize = (_RHDRegRead(rhdPtr, R5XX_CONFIG_MEMSIZE)) >> 10; |
||
| 35 | if(RamSize==0) RamSize=8192; |
||
| 36 | } |
||
| 37 | else |
||
| 38 | RamSize = (_RHDRegRead(rhdPtr, R6XX_CONFIG_MEMSIZE)) >> 10; |
||
| 39 | }; |
||
| 40 | |||
| 41 | BARSize = 1 << (rhdPtr->memsize[RHD_FB_BAR] - 10); |
||
| 42 | |||
| 43 | BARSize = 0x20000; |
||
| 44 | |||
| 45 | if (RamSize > BARSize) { |
||
| 46 | |||
| 47 | " exceeds the PCI BAR aperture.\n")); |
||
| 48 | DBG(dbgprintf("Using only %dkB of the total " |
||
| 49 | "%dkB.\n", (int) BARSize, (int) RamSize)); |
||
| 50 | return BARSize; |
||
| 51 | } |
||
| 52 | else return RamSize; |
||
| 53 | } |
||
| 54 | |||
| 55 | static Bool |
||
| 56 | |||
| 57 | { |
||
| 58 | rhdPtr->FbMapSize = 1 << rhdPtr->memsize[RHD_FB_BAR]; |
||
| 59 | rhdPtr->PhisBase = rhdPtr->memBase[RHD_FB_BAR]; |
||
| 60 | |||
| 61 | // rhdPtr->FbBase = MapIoMem(rhdPtr->PhisBase, rhdPtr->FbMapSize,PG_SW+PG_NOCACHE); |
||
| 62 | |||
| 817 | serge | 63 | // if (!rhdPtr->FbBase) |
| 808 | serge | 64 | |
| 817 | serge | 65 | |
| 66 | /* These devices have an internal address reference, which some other |
||
| 808 | serge | 67 | |
| 68 | * address in the BAR */ |
||
| 69 | if (rhdPtr->ChipSet < RHD_R600) |
||
| 70 | rhdPtr->FbIntAddress = _RHDRegRead(rhdPtr, HDP_FB_LOCATION)<< 16; |
||
| 71 | else |
||
| 72 | rhdPtr->FbIntAddress = _RHDRegRead(rhdPtr, R6XX_CONFIG_FB_BASE); |
||
| 73 | |||
| 74 | // rhdPtr->FbIntAddress = _RHDRegRead(rhdPtr, 0x6110); |
||
| 75 | |||
| 76 | |||
| 77 | if (rhdPtr->FbIntAddress != rhdPtr->PhisBase) |
||
| 78 | |||
| 79 | "0x%08X while card Internal Address is 0x%08X\n", |
||
| 80 | (unsigned int) rhdPtr->PhisBase,rhdPtr->FbIntAddress); |
||
| 81 | // dbgprintf("Mapped FB at %p (size 0x%08X)\n",rhdPtr->FbBase, rhdPtr->FbMapSize); |
||
| 82 | return TRUE; |
||
| 817 | serge | 83 | } |
| 808 | serge | 84 | |
| 85 | Bool RHDPreInit() |
||
| 86 | |||
| 87 | /* We need access to IO space already */ |
||
| 88 | if (!rhdMapMMIO(&rhd)) { |
||
| 89 | dbgprintf("Failed to map MMIO.\n"); |
||
| 90 | return FALSE; |
||
| 91 | }; |
||
| 92 | |||
| 93 | rhd.videoRam = rhdGetVideoRamSize(&rhd); |
||
| 94 | |||
| 95 | { |
||
| 96 | dbgprintf("No Video RAM detected.\n"); |
||
| 97 | goto error1; |
||
| 98 | } |
||
| 99 | dbgprintf("VideoRAM: %d kByte\n",rhd.videoRam); |
||
| 100 | |||
| 101 | rhd.FbFreeStart = 0; |
||
| 102 | |||
| 103 | |||
| 104 | if( !rhdMapFB(&rhd)) |
||
| 105 | |||
| 106 | |||
| 107 | rhd.FbScanoutStart = 0; |
||
| 108 | |||
| 109 | rhd.FbFreeStart = 10*1024*1024; |
||
| 110 | rhd.FbFreeSize = rhd.FbMapSize - 10*1024*1024; |
||
| 817 | serge | 111 | |
| 112 | rhdInitHeap(&rhd); |
||
| 808 | serge | 113 | |
| 114 | |||
| 115 | error1: |
||
| 116 | |||
| 117 | }; |
||
| 118 | |||
| 119 | int KernelFree(void *p) |
||
| 120 | |||
| 121 | |||
| 122 | return 0; |
||
| 123 | |||
| 124 | > |
||
| 125 | > |
||
| 126 |