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Rev | Author | Line No. | Line |
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813 | serge | 1 | |
808 | serge | 2 | #include "rhd_regs.h" |
3 | |||
4 | |||
813 | serge | 5 | #define IS_R500_3D 1 |
6 | |||
7 | |||
8 | |||
9 | |||
808 | serge | 10 | RHD_UNKNOWN = 0, |
11 | RHD_R300, |
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812 | serge | 12 | RHD_R350, |
13 | RHD_RV350, |
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14 | RHD_RV370, |
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15 | RHD_RV380, |
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16 | /* R500 */ |
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808 | serge | 17 | RHD_RV505, |
18 | RHD_RV515, |
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19 | RHD_RV516, |
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20 | RHD_R520, |
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21 | RHD_RV530, |
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22 | RHD_RV535, |
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23 | RHD_RV550, |
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24 | RHD_RV560, |
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25 | RHD_RV570, |
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26 | RHD_R580, |
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27 | /* R500 Mobility */ |
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28 | RHD_M52, |
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29 | RHD_M54, |
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30 | RHD_M56, |
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31 | RHD_M58, |
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32 | RHD_M62, |
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33 | RHD_M64, |
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34 | RHD_M66, |
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35 | RHD_M68, |
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36 | RHD_M71, |
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37 | /* R500 integrated */ |
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38 | RHD_RS600, |
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39 | RHD_RS690, |
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40 | RHD_RS740, |
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41 | /* R600 */ |
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42 | RHD_R600, |
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43 | RHD_RV610, |
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44 | RHD_RV630, |
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45 | /* R600 Mobility */ |
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46 | RHD_M72, |
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47 | RHD_M74, |
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48 | RHD_M76, |
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49 | /* RV670 came into existence after RV6x0 and M7x */ |
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50 | RHD_RV670, |
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51 | RHD_R680, |
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52 | RHD_RV620, |
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53 | RHD_M82, |
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54 | RHD_RV635, |
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55 | RHD_M86, |
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56 | RHD_RS780, |
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812 | serge | 57 | RHD_CHIP_END |
808 | serge | 58 | }; |
59 | |||
60 | |||
61 | RHD_FAMILY_UNKNOWN = 0, |
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62 | |||
812 | serge | 63 | |
64 | |||
65 | |||
66 | RHD_FAMILY_RS100, /* U1 (IGP320M) or A3 (IGP320)*/ |
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67 | RHD_FAMILY_RV200, |
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68 | RHD_FAMILY_RS200, /* U2 (IGP330M/340M/350M) or A4 (IGP330/340/345/350), RS250 (IGP 7000) */ |
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69 | RHD_FAMILY_R200, |
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70 | RHD_FAMILY_RV250, |
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71 | RHD_FAMILY_RS300, /* RS300/RS350 */ |
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72 | RHD_FAMILY_RV280, |
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73 | |||
74 | |||
75 | RHD_FAMILY_R350, |
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76 | RHD_FAMILY_RV350, |
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77 | RHD_FAMILY_RV380, /* RV370/RV380/M22/M24 */ |
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78 | RHD_FAMILY_R420, /* R420/R423/M18 */ |
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79 | RHD_FAMILY_RV410, /* RV410, M26 */ |
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80 | RHD_FAMILY_RS400, /* xpress 200, 200m (RS400) Intel */ |
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81 | RHD_FAMILY_RS480, /* xpress 200, 200m (RS410/480/482/485) AMD */ |
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82 | |||
83 | |||
808 | serge | 84 | RHD_FAMILY_R520, |
85 | RHD_FAMILY_RV530, |
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86 | RHD_FAMILY_RV560, |
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87 | RHD_FAMILY_RV570, |
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88 | RHD_FAMILY_R580, |
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89 | RHD_FAMILY_RS690, |
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90 | RHD_FAMILY_R600, |
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91 | RHD_FAMILY_RV610, |
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92 | RHD_FAMILY_RV630, |
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93 | RHD_FAMILY_RV670, |
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94 | RHD_FAMILY_RV620, |
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95 | RHD_FAMILY_RV635, |
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812 | serge | 96 | RHD_FAMILY_RS780 |
97 | }; |
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808 | serge | 98 | |
99 | |||
100 | #define RHD_MMIO_BAR 2 |
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101 | |||
102 | |||
103 | #define RHD_MEM_FB 2 |
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104 | |||
105 | |||
106 | { |
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107 | CARD32 MMIOBase; |
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108 | CARD32 MMIOMapSize; |
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109 | CARD32 videoRam; |
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110 | |||
111 | |||
817 | serge | 112 | CARD32 PhisBase; |
808 | serge | 113 | CARD32 FbIntAddress; /* card internal address of FB */ |
114 | CARD32 FbMapSize; |
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115 | |||
116 | |||
117 | CARD32 FbFreeSize; |
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118 | |||
119 | |||
120 | unsigned int FbScanoutStart; |
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121 | unsigned int FbScanoutSize; |
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122 | |||
123 | |||
124 | enum RHD_FAMILIES ChipFamily; |
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812 | serge | 125 | |
126 | |||
808 | serge | 127 | |
128 | |||
129 | |||
130 | |||
131 | CARD32 devfn; |
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132 | |||
133 | |||
134 | CARD16 PciDeviceID; |
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135 | |||
136 | |||
137 | CARD16 subdevice_id; |
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138 | |||
139 | |||
140 | CARD32 ioBase[6]; |
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141 | CARD32 memtype[6]; |
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142 | CARD32 memsize[6]; |
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143 | |||
144 | |||
145 | struct mem_block *gart_heap; |
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146 | |||
147 | |||
148 | CARD32 displayHeight; |
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149 | |||
150 | |||
151 | CARD32 __ymin; |
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152 | CARD32 __xmax; |
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153 | CARD32 __ymax; |
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154 | |||
155 | |||
156 | CARD32 dst_pitch_offset; |
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157 | CARD32 surface_cntl; |
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158 | |||
159 | |||
160 | u32 ring_rp; |
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161 | u32 ring_wp; |
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162 | |||
163 | |||
811 | serge | 164 | Bool has_tcl; |
165 | }RHD_t, *RHDPtr; |
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808 | serge | 166 | |
167 | |||
168 | |||
169 | |||
170 | { |
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171 | int xmin; |
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172 | int ymin; |
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173 | int xmax; |
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174 | int ymax; |
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175 | }clip_t, *PTRclip; |
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176 | |||
177 | |||
815 | serge | 178 | |
179 | { |
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180 | u32_t width; |
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817 | serge | 181 | u32_t height; |
182 | u32_t format; |
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183 | u32_t flags; |
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184 | u32_t pitch_offset; |
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185 | u32_t pitch; |
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186 | u32_t offset; |
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187 | void* raw; |
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188 | void* usermap; |
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189 | }pixmap_t; |
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815 | serge | 190 | |
191 | |||
818 | serge | 192 | |
815 | serge | 193 | |
808 | serge | 194 | int token; /* id of the token */ |
195 | const char * name; /* token name */ |
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196 | } SymTabRec, *SymTabPtr; |
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197 | |||
198 | |||
813 | serge | 199 | |
200 | |||
201 | OUTREG8(CARD16 offset, u8 value) |
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202 | { |
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203 | *(volatile CARD8 *)((CARD8 *)(rhd.MMIOBase + offset)) = value; |
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204 | } |
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205 | |||
206 | |||
207 | |||
808 | serge | 208 | { |
209 | return *(volatile CARD32 *)((CARD8*)(rhd.MMIOBase + offset)); |
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210 | } |
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211 | |||
212 | |||
213 | |||
214 | |||
215 | OUTREG(CARD16 offset, CARD32 value) |
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216 | { |
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217 | *(volatile CARD32 *)((CARD8 *)(rhd.MMIOBase + offset)) = value; |
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218 | } |
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219 | |||
220 | |||
221 | { |
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222 | return *(volatile CARD32 *)((CARD8*)(rhdPtr->MMIOBase + offset)); |
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223 | } |
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224 | |||
225 | |||
226 | MASKREG(CARD16 offset, CARD32 value, CARD32 mask) |
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227 | { |
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228 | CARD32 tmp; |
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229 | |||
230 | |||
231 | tmp &= ~mask; |
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232 | tmp |= (value & mask); |
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233 | OUTREG(offset, tmp); |
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234 | }; |
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235 | |||
236 | |||
237 | _RHDRegWrite(RHDPtr rhdPtr, CARD16 offset, CARD32 value) |
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238 | { |
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239 | *(volatile CARD32 *)((CARD8 *)(rhdPtr->MMIOBase + offset)) = value; |
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240 | } |
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241 | |||
242 | |||
243 | _RHDRegMask(RHDPtr rhdPtr, CARD16 offset, CARD32 value, CARD32 mask) |
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244 | { |
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245 | CARD32 tmp; |
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246 | |||
247 | |||
248 | tmp &= ~mask; |
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249 | tmp |= (value & mask); |
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250 | _RHDRegWrite(rhdPtr, offset, tmp); |
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251 | }; |
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252 | |||
253 | |||
254 | |||
255 | |||
256 | #define RHDRegWrite(ptr, offset, value) _RHDRegWrite((ptr)->rhdPtr, (offset), (value)) |
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257 | #define RHDRegMask(ptr, offset, value, mask) _RHDRegMask((ptr)->rhdPtr, (offset), (value), (mask)) |
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258 | |||
259 | |||
260 | |||
261 | |||
262 | |||
263 | int rhdInitHeap(RHDPtr rhdPtr); |
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264 | |||
265 | |||
266 | |||
267 | |||
268 | // #define DBG(x) |
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269 | |||
270 | |||
271 | typedef struct s_cursor |
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272 | { |
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273 | u32 magic; // 'CURS' |
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274 | void (*destroy)(struct s_cursor*); // destructor |
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275 | u32 fd; // next object in list |
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276 | u32 bk; // prev object in list |
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277 | u32 pid; // owner id |
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278 | |||
279 | |||
280 | u32 hot_x; // hotspot coords |
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281 | u32 hot_y; |
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282 | }cursor_t; |
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283 | #pragma pack (pop) |
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284 | |||
285 | |||
286 | #define LOAD_FROM_MEM 1 |
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287 | #define LOAD_INDIRECT 2 |
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288 | |||
289 | |||
290 | void __stdcall copy_cursor(void *img, void *src); |
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291 | void destroy_cursor(cursor_t *cursor); |
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292 | void __destroy_cursor(cursor_t *cursor); // wrap |
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293 | |||
294 | |||
295 | void __stdcall r500_SetCursor(cursor_t *cursor, int x, int y); |
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296 | void __stdcall r500_CursorRestore(int x, int y); |
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297 | |||
298 | |||
299 | |||
813 | serge | 300 | |
301 | |||
302 | u32_t x ; |
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303 | u32_t y ; |
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304 | } xPointFixed; |
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305 | |||
306 | |||
307 | |||
308 | |||
309 | |||
310 | |||
311 | |||
312 | |||
313 | #define IntToxFixed(i) ((xFixed) (i) << XFIXED_BITS) |
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314 | |||
315 | |||
316 | |||
317 | |||
318 | ((type) << 16) | \ |
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319 | ((a) << 12) | \ |
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320 | ((r) << 8) | \ |
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321 | ((g) << 4) | \ |
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322 | ((b))) |
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323 | |||
324 | |||
325 | #define PICT_FORMAT_RGB(f) (((f) ) & 0xfff) |
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326 | |||
327 | |||
328 | #define PICT_TYPE_A 1 |
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329 | #define PICT_TYPE_ARGB 2 |
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330 | #define PICT_TYPE_ABGR 3 |
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331 | #define PICT_TYPE_COLOR 4 |
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332 | #define PICT_TYPE_GRAY 5 |
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333 | |||
334 | |||
335 | PICT_a8r8g8b8 = PICT_FORMAT(32,PICT_TYPE_ARGB,8,8,8,8), |
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336 | PICT_x8r8g8b8 = PICT_FORMAT(32,PICT_TYPE_ARGB,0,8,8,8), |
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337 | PICT_a8b8g8r8 = PICT_FORMAT(32,PICT_TYPE_ABGR,8,8,8,8), |
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338 | PICT_x8b8g8r8 = PICT_FORMAT(32,PICT_TYPE_ABGR,0,8,8,8), |
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339 | |||
340 | |||
341 | PICT_r8g8b8 = PICT_FORMAT(24,PICT_TYPE_ARGB,0,8,8,8), |
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342 | PICT_b8g8r8 = PICT_FORMAT(24,PICT_TYPE_ABGR,0,8,8,8), |
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343 | |||
344 | |||
345 | PICT_r5g6b5 = PICT_FORMAT(16,PICT_TYPE_ARGB,0,5,6,5), |
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346 | PICT_b5g6r5 = PICT_FORMAT(16,PICT_TYPE_ABGR,0,5,6,5), |
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347 | |||
348 | |||
349 | PICT_x1r5g5b5 = PICT_FORMAT(16,PICT_TYPE_ARGB,0,5,5,5), |
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350 | PICT_a1b5g5r5 = PICT_FORMAT(16,PICT_TYPE_ABGR,1,5,5,5), |
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351 | PICT_x1b5g5r5 = PICT_FORMAT(16,PICT_TYPE_ABGR,0,5,5,5), |
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352 | PICT_a4r4g4b4 = PICT_FORMAT(16,PICT_TYPE_ARGB,4,4,4,4), |
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353 | PICT_x4r4g4b4 = PICT_FORMAT(16,PICT_TYPE_ARGB,0,4,4,4), |
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354 | PICT_a4b4g4r4 = PICT_FORMAT(16,PICT_TYPE_ABGR,4,4,4,4), |
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355 | PICT_x4b4g4r4 = PICT_FORMAT(16,PICT_TYPE_ABGR,0,4,4,4), |
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356 | |||
357 | |||
358 | PICT_a8 = PICT_FORMAT(8,PICT_TYPE_A,8,0,0,0), |
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359 | PICT_r3g3b2 = PICT_FORMAT(8,PICT_TYPE_ARGB,0,3,3,2), |
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360 | PICT_b2g3r3 = PICT_FORMAT(8,PICT_TYPE_ABGR,0,3,3,2), |
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361 | PICT_a2r2g2b2 = PICT_FORMAT(8,PICT_TYPE_ARGB,2,2,2,2), |
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362 | PICT_a2b2g2r2 = PICT_FORMAT(8,PICT_TYPE_ABGR,2,2,2,2), |
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363 | |||
364 | |||
365 | PICT_g8 = PICT_FORMAT(8,PICT_TYPE_GRAY,0,0,0,0), |
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366 | |||
367 | |||
368 | |||
369 | |||
370 | PICT_x4g4 = PICT_FORMAT(8,PICT_TYPE_GRAY,0,0,0,0), |
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371 | |||
372 | |||
373 | PICT_a4 = PICT_FORMAT(4,PICT_TYPE_A,4,0,0,0), |
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374 | PICT_r1g2b1 = PICT_FORMAT(4,PICT_TYPE_ARGB,0,1,2,1), |
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375 | PICT_b1g2r1 = PICT_FORMAT(4,PICT_TYPE_ABGR,0,1,2,1), |
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376 | PICT_a1r1g1b1 = PICT_FORMAT(4,PICT_TYPE_ARGB,1,1,1,1), |
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377 | PICT_a1b1g1r1 = PICT_FORMAT(4,PICT_TYPE_ABGR,1,1,1,1), |
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378 | |||
379 | |||
380 | PICT_g4 = PICT_FORMAT(4,PICT_TYPE_GRAY,0,0,0,0), |
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381 | |||
382 | |||
383 | PICT_a1 = PICT_FORMAT(1,PICT_TYPE_A,1,0,0,0), |
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384 | |||
385 | |||
386 | } PictFormatShort; |
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387 | |||
388 | |||
829 | serge | 389 |