Rev 373 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed
Rev | Author | Line No. | Line |
---|---|---|---|
425 | victor | 1 | $Revision: 425 $ |
261 | hidnplayr | 2 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
3 | ;; ;; |
||
4 | ;; RTL8139.INC ;; |
||
5 | ;; ;; |
||
6 | ;; Ethernet driver for Menuet OS ;; |
||
7 | ;; ;; |
||
8 | ;; Version 0.2 11 August 2003 ;; |
||
9 | ;; ;; |
||
10 | ;; Driver for chips of RealTek 8139 family ;; |
||
11 | ;; References: ;; |
||
12 | ;; www.realtek.com.hw - data sheets ;; |
||
13 | ;; rtl8139.c - linux driver ;; |
||
14 | ;; 8139too.c - linux driver ;; |
||
15 | ;; ethernet driver template by Mike Hibbett ;; |
||
16 | ;; ;; |
||
17 | ;; The copyright statement is ;; |
||
18 | ;; ;; |
||
19 | ;; GNU GENERAL PUBLIC LICENSE ;; |
||
20 | ;; Version 2, June 1991 ;; |
||
21 | ;; ;; |
||
22 | ;; Copyright 2003 Endre Kozma, ;; |
||
23 | ;; endre.kozma@axelero.hu ;; |
||
24 | ;; ;; |
||
25 | ;; See file COPYING for details ;; |
||
26 | ;; ;; |
||
330 | heavyiron | 27 | ;; 10.01.2007 Bugfix for l8139_transmit from Paolo Franchetti ;; |
261 | hidnplayr | 28 | ;; ;; |
29 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
||
302 | hidnplayr | 30 | ETH_ALEN equ 6 |
31 | ETH_HLEN equ (2 * ETH_ALEN + 2) |
||
32 | ETH_ZLEN equ 60 ; 60 + 4bytes auto payload for |
||
33 | ; mininmum 64bytes frame length |
||
261 | hidnplayr | 34 | |
302 | hidnplayr | 35 | PCI_REG_COMMAND equ 0x04 ; command register |
36 | PCI_BIT_PIO equ 0 ; bit0: io space control |
||
37 | PCI_BIT_MMIO equ 1 ; bit1: memory space control |
||
38 | PCI_BIT_MASTER equ 2 ; bit2: device acts as a PCI master |
||
261 | hidnplayr | 39 | |
302 | hidnplayr | 40 | RTL8139_REG_MAR0 equ 0x08 ; multicast filter register 0 |
41 | RTL8139_REG_MAR4 equ 0x0c ; multicast filter register 4 |
||
42 | RTL8139_REG_TSD0 equ 0x10 ; transmit status of descriptor |
||
43 | RTL8139_REG_TSAD0 equ 0x20 ; transmit start address of descriptor |
||
44 | RTL8139_REG_RBSTART equ 0x30 ; RxBuffer start address |
||
45 | RTL8139_REG_COMMAND equ 0x37 ; command register |
||
46 | RTL8139_REG_CAPR equ 0x38 ; current address of packet read |
||
47 | RTL8139_REG_IMR equ 0x3c ; interrupt mask register |
||
48 | RTL8139_REG_ISR equ 0x3e ; interrupt status register |
||
49 | RTL8139_REG_TXCONFIG equ 0x40 ; transmit configuration register |
||
50 | RTL8139_REG_TXCONFIG_0 equ 0x40 ; transmit configuration register 0 |
||
51 | RTL8139_REG_TXCONFIG_1 equ 0x41 ; transmit configuration register 1 |
||
52 | RTL8139_REG_TXCONFIG_2 equ 0x42 ; transmit configuration register 2 |
||
53 | RTL8139_REG_TXCONFIG_3 equ 0x43 ; transmit configuration register 3 |
||
54 | RTL8139_REG_RXCONFIG equ 0x44 ; receive configuration register 0 |
||
55 | RTL8139_REG_RXCONFIG_0 equ 0x44 ; receive configuration register 0 |
||
56 | RTL8139_REG_RXCONFIG_1 equ 0x45 ; receive configuration register 1 |
||
57 | RTL8139_REG_RXCONFIG_2 equ 0x46 ; receive configuration register 2 |
||
58 | RTL8139_REG_RXCONFIG_3 equ 0x47 ; receive configuration register 3 |
||
59 | RTL8139_REG_MPC equ 0x4c ; missed packet counter |
||
60 | RTL8139_REG_9346CR equ 0x50 ; serial eeprom 93C46 command register |
||
61 | RTL8139_REG_CONFIG1 equ 0x52 ; configuration register 1 |
||
62 | RTL8139_REG_CONFIG4 equ 0x5a ; configuration register 4 |
||
63 | RTL8139_REG_HLTCLK equ 0x5b ; undocumented halt clock register |
||
64 | RTL8139_REG_BMCR equ 0x62 ; basic mode control register |
||
65 | RTL8139_REG_ANAR equ 0x66 ; auto negotiation advertisement register |
||
261 | hidnplayr | 66 | |
67 | ; 5.1 packet header |
||
302 | hidnplayr | 68 | RTL8139_BIT_RUNT equ 4 ; total packet length < 64 bytes |
69 | RTL8139_BIT_LONG equ 3 ; total packet length > 4k |
||
70 | RTL8139_BIT_CRC equ 2 ; crc error occured |
||
71 | RTL8139_BIT_FAE equ 1 ; frame alignment error occured |
||
72 | RTL8139_BIT_ROK equ 0 ; received packet is ok |
||
261 | hidnplayr | 73 | ; 5.4 command register |
302 | hidnplayr | 74 | RTL8139_BIT_RST equ 4 ; reset bit |
75 | RTL8139_BIT_RE equ 3 ; receiver enabled |
||
76 | RTL8139_BIT_TE equ 2 ; transmitter enabled |
||
77 | RTL8139_BIT_BUFE equ 0 ; rx buffer is empty, no packet stored |
||
261 | hidnplayr | 78 | ; 5.6 interrupt status register |
302 | hidnplayr | 79 | RTL8139_BIT_ISR_TOK equ 2 ; transmit ok |
80 | RTL8139_BIT_ISR_RER equ 1 ; receive error interrupt |
||
81 | RTL8139_BIT_ISR_ROK equ 0 ; receive ok |
||
261 | hidnplayr | 82 | ; 5.7 transmit configyration register |
302 | hidnplayr | 83 | RTL8139_BIT_TX_MXDMA equ 8 ; Max DMA burst size per Tx DMA burst |
84 | RTL8139_BIT_TXRR equ 4 ; Tx Retry count 16+(TXRR*16) |
||
261 | hidnplayr | 85 | ; 5.8 receive configuration register |
302 | hidnplayr | 86 | RTL8139_BIT_RXFTH equ 13 ; Rx fifo threshold |
87 | RTL8139_BIT_RBLEN equ 11 ; Ring buffer length indicator |
||
88 | RTL8139_BIT_RX_MXDMA equ 8 ; Max DMA burst size per Rx DMA burst |
||
89 | RTL8139_BIT_NOWRAP equ 7 ; transfered data wrapping |
||
90 | RTL8139_BIT_9356SEL equ 6 ; eeprom selector 9346/9356 |
||
91 | RTL8139_BIT_AER equ 5 ; accept error packets |
||
92 | RTL8139_BIT_AR equ 4 ; accept runt packets |
||
93 | RTL8139_BIT_AB equ 3 ; accept broadcast packets |
||
94 | RTL8139_BIT_AM equ 2 ; accept multicast packets |
||
95 | RTL8139_BIT_APM equ 1 ; accept physical match packets |
||
96 | RTL8139_BIT_AAP equ 0 ; accept all packets |
||
261 | hidnplayr | 97 | ; 5.9 93C46/93C56 command register |
302 | hidnplayr | 98 | RTL8139_BIT_93C46_EEM1 equ 7 ; RTL8139 eeprom operating mode1 |
99 | RTL8139_BIT_93C46_EEM0 equ 6 ; RTL8139 eeprom operating mode0 |
||
100 | RTL8139_BIT_93C46_EECS equ 3 ; chip select |
||
101 | RTL8139_BIT_93C46_EESK equ 2 ; serial data clock |
||
102 | RTL8139_BIT_93C46_EEDI equ 1 ; serial data input |
||
103 | RTL8139_BIT_93C46_EEDO equ 0 ; serial data output |
||
261 | hidnplayr | 104 | ; 5.11 configuration register 1 |
302 | hidnplayr | 105 | RTL8139_BIT_LWACT equ 4 ; see RTL8139_REG_CONFIG1 |
106 | RTL8139_BIT_SLEEP equ 1 ; sleep bit at older chips |
||
107 | RTL8139_BIT_PWRDWN equ 0 ; power down bit at older chips |
||
108 | RTL8139_BIT_PMEn equ 0 ; power management enabled |
||
261 | hidnplayr | 109 | ; 5.14 configuration register 4 |
302 | hidnplayr | 110 | RTL8139_BIT_LWPTN equ 2 ; see RTL8139_REG_CONFIG4 |
261 | hidnplayr | 111 | ; 6.2 transmit status register |
302 | hidnplayr | 112 | RTL8139_BIT_ERTXTH equ 16 ; early TX threshold |
113 | RTL8139_BIT_TOK equ 15 ; transmit ok |
||
114 | RTL8139_BIT_OWN equ 13 ; tx DMA operation is completed |
||
261 | hidnplayr | 115 | ; 6.18 basic mode control register |
302 | hidnplayr | 116 | RTL8139_BIT_ANE equ 12 ; auto negotiation enable |
261 | hidnplayr | 117 | ; 6.20 auto negotiation advertisement register |
302 | hidnplayr | 118 | RTL8139_BIT_TXFD equ 8 ; 100base-T full duplex |
119 | RTL8139_BIT_TX equ 7 ; 100base-T |
||
120 | RTL8139_BIT_10FD equ 6 ; 10base-T full duplex |
||
121 | RTL8139_BIT_10 equ 5 ; 10base-T |
||
122 | RTL8139_BIT_SELECTOR equ 0 ; binary encoded selector CSMA/CD=00001 |
||
261 | hidnplayr | 123 | ; RX/TX buffer size |
302 | hidnplayr | 124 | RTL8139_RBLEN equ 0 ; 0==8K 1==16k 2==32k 3==64k |
125 | RTL8139_RX_BUFFER_SIZE equ (8192 shl RTL8139_RBLEN) |
||
126 | MAX_ETH_FRAME_SIZE equ 1516 ; exactly 1514 wthout CRC |
||
127 | RTL8139_NUM_TX_DESC equ 4 |
||
128 | RTL8139_TX_BUFFER_SIZE equ (MAX_ETH_FRAME_SIZE * RTL8139_NUM_TX_DESC) |
||
129 | RTL8139_TXRR equ 8 ; total retries = 16+(TXRR*16) |
||
130 | RTL8139_TX_MXDMA equ 6 ; 0==16 1==32 2==64 3==128 |
||
131 | ; 4==256 5==512 6==1024 7==2048 |
||
132 | RTL8139_ERTXTH equ 8 ; in unit of 32 bytes e.g:(8*32)=256 |
||
133 | RTL8139_RX_MXDMA equ 7 ; 0==16 1==32 2==64 3==128 |
||
134 | ; 4==256 5==512 6==1024 7==unlimited |
||
135 | RTL8139_RXFTH equ 7 ; 0==16 1==32 2==64 3==128 |
||
136 | ; 4==256 5==512 6==1024 7==no threshold |
||
137 | RTL8139_RX_CONFIG equ ((RTL8139_RBLEN shl RTL8139_BIT_RBLEN) \ |
||
138 | or (RTL8139_RX_MXDMA shl RTL8139_BIT_RX_MXDMA) \ |
||
139 | or (1 shl RTL8139_BIT_NOWRAP) \ |
||
140 | or (RTL8139_RXFTH shl RTL8139_BIT_RXFTH) \ |
||
141 | or (1 shl RTL8139_BIT_AB) or (1 shl RTL8139_BIT_APM) \ |
||
142 | or (1 shl RTL8139_BIT_AER) or (1 shl RTL8139_BIT_AR) \ |
||
143 | or (1 shl RTL8139_BIT_AM)) |
||
144 | RTL8139_TX_TIMEOUT equ 30 ; 300 milliseconds timeout |
||
261 | hidnplayr | 145 | |
302 | hidnplayr | 146 | EE_93C46_REG_ETH_ID equ 7 ; MAC offset |
147 | EE_93C46_READ_CMD equ (6 shl 6) ; 110b + 6bit address |
||
148 | EE_93C56_READ_CMD equ (6 shl 8) ; 110b + 8bit address |
||
149 | EE_93C46_CMD_LENGTH equ 9 ; start bit + cmd + 6bit address |
||
150 | EE_93C56_CMD_LENGTH equ 11 ; start bit + cmd + 8bit ddress |
||
261 | hidnplayr | 151 | |
302 | hidnplayr | 152 | VER_RTL8139 equ 1100000b |
153 | VER_RTL8139A equ 1110000b |
||
261 | hidnplayr | 154 | ; VER_RTL8139AG equ 1110100b |
302 | hidnplayr | 155 | VER_RTL8139B equ 1111000b |
156 | VER_RTL8130 equ VER_RTL8139B |
||
157 | VER_RTL8139C equ 1110100b |
||
158 | VER_RTL8100 equ 1111010b |
||
159 | VER_RTL8100B equ 1110101b |
||
160 | VER_RTL8139D equ VER_RTL8100B |
||
161 | VER_RTL8139CP equ 1110110b |
||
162 | VER_RTL8101 equ 1110111b |
||
261 | hidnplayr | 163 | |
302 | hidnplayr | 164 | IDX_RTL8139 equ 0 |
165 | IDX_RTL8139A equ 1 |
||
166 | IDX_RTL8139B equ 2 |
||
167 | IDX_RTL8139C equ 3 |
||
168 | IDX_RTL8100 equ 4 |
||
169 | IDX_RTL8139D equ 5 |
||
170 | IDX_RTL8139D equ 6 |
||
171 | IDX_RTL8101 equ 7 |
||
261 | hidnplayr | 172 | |
173 | |||
174 | ; These two must be 4 byte aligned ( which they are ) |
||
175 | rtl8139_rx_buff equ eth_data_start |
||
176 | rtl8139_tx_buff equ rtl8139_rx_buff + (RTL8139_RX_BUFFER_SIZE + MAX_ETH_FRAME_SIZE) |
||
177 | |||
178 | uglobal |
||
302 | hidnplayr | 179 | align 4 |
261 | hidnplayr | 180 | rtl8139_rx_buff_offset: dd 0 |
373 | mikedld | 181 | curr_tx_desc dd 0 |
261 | hidnplayr | 182 | endg |
183 | |||
184 | iglobal |
||
185 | hw_ver_array: db VER_RTL8139, VER_RTL8139A, VER_RTL8139B, VER_RTL8139C |
||
302 | hidnplayr | 186 | db VER_RTL8100, VER_RTL8139D, VER_RTL8139CP, VER_RTL8101 |
261 | hidnplayr | 187 | HW_VER_ARRAY_SIZE = $-hw_ver_array |
188 | endg |
||
189 | |||
190 | uglobal |
||
191 | hw_ver_id: db 0 |
||
192 | endg |
||
193 | |||
194 | ;*************************************************************************** |
||
195 | ; Function |
||
196 | ; rtl8139_probe |
||
197 | ; Description |
||
198 | ; Searches for an ethernet card, enables it and clears the rx buffer |
||
199 | ; If a card was found, it enables the ethernet -> TCPIP link |
||
200 | ; Destroyed registers |
||
201 | ; eax, ebx, ecx, edx |
||
202 | ; |
||
203 | ;*************************************************************************** |
||
204 | rtl8139_probe: |
||
205 | ; enable the device |
||
302 | hidnplayr | 206 | mov al, 2 |
207 | mov ah, [pci_bus] |
||
208 | mov bh, [pci_dev] |
||
209 | mov bl, PCI_REG_COMMAND |
||
210 | call pci_read_reg |
||
211 | mov cx, ax |
||
212 | or cl, (1 shl PCI_BIT_MASTER) or (1 shl PCI_BIT_PIO) |
||
213 | and cl, not (1 shl PCI_BIT_MMIO) |
||
214 | mov al, 2 |
||
215 | mov ah, [pci_bus] |
||
216 | mov bh, [pci_dev] |
||
217 | mov bl, PCI_REG_COMMAND |
||
218 | call pci_write_reg |
||
261 | hidnplayr | 219 | ; get chip version |
302 | hidnplayr | 220 | mov edx, [io_addr] |
221 | add edx, RTL8139_REG_TXCONFIG_2 |
||
222 | in ax, dx |
||
223 | shr ah, 2 |
||
224 | shr ax, 6 |
||
225 | and al, 01111111b |
||
226 | mov ecx, HW_VER_ARRAY_SIZE-1 |
||
261 | hidnplayr | 227 | .chip_ver_loop: |
302 | hidnplayr | 228 | cmp al, [hw_ver_array+ecx] |
229 | je .chip_ver_found |
||
230 | dec ecx |
||
231 | jns .chip_ver_loop |
||
232 | xor cl, cl ; default RTL8139 |
||
261 | hidnplayr | 233 | .chip_ver_found: |
302 | hidnplayr | 234 | mov [hw_ver_id], cl |
261 | hidnplayr | 235 | ; wake up the chip |
302 | hidnplayr | 236 | mov edx, [io_addr] |
237 | add edx, RTL8139_REG_HLTCLK |
||
238 | mov al, 'R' ; run the clock |
||
239 | out dx, al |
||
261 | hidnplayr | 240 | ; unlock config and BMCR registers |
302 | hidnplayr | 241 | add edx, RTL8139_REG_9346CR - RTL8139_REG_HLTCLK |
242 | mov al, (1 shl RTL8139_BIT_93C46_EEM1) or (1 shl RTL8139_BIT_93C46_EEM0) |
||
243 | out dx, al |
||
261 | hidnplayr | 244 | ; enable power management |
302 | hidnplayr | 245 | add edx, RTL8139_REG_CONFIG1 - RTL8139_REG_9346CR |
246 | in al, dx |
||
247 | cmp byte [hw_ver_id], IDX_RTL8139B |
||
248 | jl .old_chip |
||
261 | hidnplayr | 249 | ; set LWAKE pin to active high (default value). |
250 | ; it is for Wake-On-LAN functionality of some motherboards. |
||
251 | ; this signal is used to inform the motherboard to execute a wake-up process. |
||
252 | ; only at newer chips. |
||
302 | hidnplayr | 253 | or al, (1 shl RTL8139_BIT_PMEn) |
254 | and al, not (1 shl RTL8139_BIT_LWACT) |
||
255 | out dx, al |
||
256 | add edx, RTL8139_REG_CONFIG4 - RTL8139_REG_CONFIG1 |
||
257 | in al, dx |
||
258 | and al, not (1 shl RTL8139_BIT_LWPTN) |
||
259 | out dx, al |
||
260 | jmp .finish_wake_up |
||
261 | hidnplayr | 261 | .old_chip: |
262 | ; wake up older chips |
||
302 | hidnplayr | 263 | and al, not ((1 shl RTL8139_BIT_SLEEP) or (1 shl RTL8139_BIT_PWRDWN)) |
264 | out dx, al |
||
261 | hidnplayr | 265 | .finish_wake_up: |
266 | ; lock config and BMCR registers |
||
302 | hidnplayr | 267 | xor al, al |
268 | mov edx, [io_addr] |
||
269 | add edx, RTL8139_REG_9346CR |
||
270 | out dx, al |
||
261 | hidnplayr | 271 | ;*************************************************************************** |
272 | ; Function |
||
273 | ; rt8139_reset |
||
274 | ; Description |
||
275 | ; Place the chip (ie, the ethernet card) into a virgin state |
||
276 | ; Destroyed registers |
||
277 | ; eax, ebx, ecx, edx |
||
278 | ; |
||
279 | ;*************************************************************************** |
||
280 | rtl8139_reset: |
||
302 | hidnplayr | 281 | mov edx, [io_addr] |
282 | add edx, RTL8139_REG_COMMAND |
||
283 | mov al, 1 shl RTL8139_BIT_RST |
||
284 | out dx, al |
||
285 | mov cx, 1000 ; wait no longer for the reset |
||
261 | hidnplayr | 286 | .wait_for_reset: |
302 | hidnplayr | 287 | in al, dx |
288 | test al, 1 shl RTL8139_BIT_RST |
||
289 | jz .reset_completed ; RST remains 1 during reset |
||
290 | dec cx |
||
291 | jns .wait_for_reset |
||
261 | hidnplayr | 292 | .reset_completed: |
293 | ; get MAC (hardware address) |
||
302 | hidnplayr | 294 | mov ecx, 2 |
261 | hidnplayr | 295 | .mac_read_loop: |
302 | hidnplayr | 296 | lea eax, [EE_93C46_REG_ETH_ID+ecx] |
297 | push ecx |
||
298 | call rtl8139_read_eeprom |
||
299 | pop ecx |
||
300 | mov [node_addr+ecx*2], ax |
||
301 | dec ecx |
||
302 | jns .mac_read_loop |
||
261 | hidnplayr | 303 | ; unlock config and BMCR registers |
302 | hidnplayr | 304 | mov edx, [io_addr] |
305 | add edx, RTL8139_REG_9346CR |
||
306 | mov al, (1 shl RTL8139_BIT_93C46_EEM1) or (1 shl RTL8139_BIT_93C46_EEM0) |
||
307 | out dx, al |
||
261 | hidnplayr | 308 | ; initialize multicast registers (no filtering) |
302 | hidnplayr | 309 | mov eax, 0xffffffff |
310 | add edx, RTL8139_REG_MAR0 - RTL8139_REG_9346CR |
||
311 | out dx, eax |
||
312 | add edx, RTL8139_REG_MAR4 - RTL8139_REG_MAR0 |
||
313 | out dx, eax |
||
261 | hidnplayr | 314 | ; enable Rx/Tx |
302 | hidnplayr | 315 | mov al, (1 shl RTL8139_BIT_RE) or (1 shl RTL8139_BIT_TE) |
316 | add edx, RTL8139_REG_COMMAND - RTL8139_REG_MAR4 |
||
317 | out dx, al |
||
261 | hidnplayr | 318 | ; 32k Rxbuffer, unlimited dma burst, no wrapping, no rx threshold |
319 | ; accept broadcast packets, accept physical match packets |
||
302 | hidnplayr | 320 | mov ax, RTL8139_RX_CONFIG |
321 | add edx, RTL8139_REG_RXCONFIG - RTL8139_REG_COMMAND |
||
322 | out dx, ax |
||
261 | hidnplayr | 323 | ; 1024 bytes DMA burst, total retries = 16 + 8 * 16 = 144 |
302 | hidnplayr | 324 | mov ax, (RTL8139_TX_MXDMA shl RTL8139_BIT_TX_MXDMA) \ |
325 | or (RTL8139_TXRR shl RTL8139_BIT_TXRR) |
||
326 | add edx, RTL8139_REG_TXCONFIG - RTL8139_REG_RXCONFIG |
||
327 | out dx, ax |
||
261 | hidnplayr | 328 | ; enable auto negotiation |
302 | hidnplayr | 329 | add edx, RTL8139_REG_BMCR - RTL8139_REG_TXCONFIG |
330 | in ax, dx |
||
331 | or ax, (1 shl RTL8139_BIT_ANE) |
||
332 | out dx, ax |
||
261 | hidnplayr | 333 | ; set auto negotiation advertisement |
302 | hidnplayr | 334 | add edx, RTL8139_REG_ANAR - RTL8139_REG_BMCR |
335 | in ax, dx |
||
336 | or ax, (1 shl RTL8139_BIT_SELECTOR) or (1 shl RTL8139_BIT_10) \ |
||
337 | or (1 shl RTL8139_BIT_10FD) or (1 shl RTL8139_BIT_TX) \ |
||
338 | or (1 shl RTL8139_BIT_TXFD) |
||
339 | out dx, ax |
||
261 | hidnplayr | 340 | ; lock config and BMCR registers |
302 | hidnplayr | 341 | xor eax, eax |
342 | add edx, RTL8139_REG_9346CR - RTL8139_REG_ANAR |
||
343 | out dx, al |
||
261 | hidnplayr | 344 | ; init RX/TX pointers |
302 | hidnplayr | 345 | mov [rtl8139_rx_buff_offset], eax |
346 | mov [curr_tx_desc], eax |
||
261 | hidnplayr | 347 | ; clear missing packet counter |
302 | hidnplayr | 348 | add edx, RTL8139_REG_MPC - RTL8139_REG_9346CR |
349 | out dx, eax |
||
261 | hidnplayr | 350 | ; disable all interrupts |
302 | hidnplayr | 351 | add edx, RTL8139_REG_IMR - RTL8139_REG_MPC |
352 | out dx, ax |
||
261 | hidnplayr | 353 | ; set RxBuffer address, init RX buffer offset, init TX ring |
302 | hidnplayr | 354 | mov eax, rtl8139_rx_buff |
355 | add edx, RTL8139_REG_RBSTART - RTL8139_REG_IMR |
||
356 | out dx, eax |
||
261 | hidnplayr | 357 | ; Indicate that we have successfully reset the card |
302 | hidnplayr | 358 | mov eax, [pci_data] |
359 | mov [eth_status], eax |
||
360 | ret |
||
261 | hidnplayr | 361 | |
362 | ;*************************************************************************** |
||
363 | ; Function |
||
364 | ; rtl8139_read_eeprom |
||
365 | ; Description |
||
366 | ; reads eeprom type 93c46 and 93c56 |
||
367 | ; Parameters |
||
368 | ; al - word to be read (6bit in case of 93c46 and 8bit otherwise) |
||
369 | ; Return value |
||
370 | ; ax - word read in |
||
371 | ; Destroyed register(s) |
||
372 | ; eax, cx, ebx, edx |
||
373 | ; |
||
374 | ;*************************************************************************** |
||
375 | rtl8139_read_eeprom: |
||
302 | hidnplayr | 376 | movzx ebx, al |
377 | mov edx, [io_addr] |
||
378 | add edx, RTL8139_REG_RXCONFIG |
||
379 | in al, dx |
||
380 | test al, (1 shl RTL8139_BIT_9356SEL) |
||
381 | jz .type_93c46 |
||
261 | hidnplayr | 382 | ; and bl, 01111111b ; don't care first bit |
302 | hidnplayr | 383 | or bx, EE_93C56_READ_CMD ; it contains start bit |
384 | mov cx, EE_93C56_CMD_LENGTH-1 ; cmd_loop counter |
||
385 | jmp .read_eeprom |
||
261 | hidnplayr | 386 | .type_93c46: |
302 | hidnplayr | 387 | and bl, 00111111b |
388 | or bx, EE_93C46_READ_CMD ; it contains start bit |
||
389 | mov cx, EE_93C46_CMD_LENGTH-1 ; cmd_loop counter |
||
261 | hidnplayr | 390 | .read_eeprom: |
302 | hidnplayr | 391 | add edx, RTL8139_REG_9346CR - RTL8139_REG_RXCONFIG_0 |
261 | hidnplayr | 392 | ; mov al, (1 shl RTL8139_BIT_93C46_EEM1) |
393 | ; out dx, al |
||
302 | hidnplayr | 394 | mov al, (1 shl RTL8139_BIT_93C46_EEM1) \ |
395 | or (1 shl RTL8139_BIT_93C46_EECS) ; wake up the eeprom |
||
396 | out dx, al |
||
261 | hidnplayr | 397 | .cmd_loop: |
302 | hidnplayr | 398 | mov al, (1 shl RTL8139_BIT_93C46_EEM1) or (1 shl RTL8139_BIT_93C46_EECS) |
399 | bt bx, cx |
||
400 | jnc .zero_bit |
||
401 | or al, (1 shl RTL8139_BIT_93C46_EEDI) |
||
261 | hidnplayr | 402 | .zero_bit: |
302 | hidnplayr | 403 | out dx, al |
261 | hidnplayr | 404 | ; push eax |
405 | ; in eax, dx ; eeprom delay |
||
406 | ; pop eax |
||
302 | hidnplayr | 407 | or al, (1 shl RTL8139_BIT_93C46_EESK) |
408 | out dx, al |
||
261 | hidnplayr | 409 | ; in eax, dx ; eeprom delay |
302 | hidnplayr | 410 | dec cx |
411 | jns .cmd_loop |
||
261 | hidnplayr | 412 | ; in eax, dx ; eeprom delay |
302 | hidnplayr | 413 | mov al, (1 shl RTL8139_BIT_93C46_EEM1) or (1 shl RTL8139_BIT_93C46_EECS) |
414 | out dx, al |
||
415 | mov cl, 0xf |
||
261 | hidnplayr | 416 | .read_loop: |
302 | hidnplayr | 417 | shl ebx, 1 |
418 | mov al, (1 shl RTL8139_BIT_93C46_EEM1) \ |
||
419 | or (1 shl RTL8139_BIT_93C46_EECS) \ |
||
420 | or (1 shl RTL8139_BIT_93C46_EESK) |
||
421 | out dx, al |
||
261 | hidnplayr | 422 | ; in eax, dx ; eeprom delay |
302 | hidnplayr | 423 | in al, dx |
424 | and al, (1 shl RTL8139_BIT_93C46_EEDO) |
||
425 | jz .dont_set |
||
426 | inc ebx |
||
261 | hidnplayr | 427 | .dont_set: |
302 | hidnplayr | 428 | mov al, (1 shl RTL8139_BIT_93C46_EEM1) \ |
429 | or (1 shl RTL8139_BIT_93C46_EECS) |
||
430 | out dx, al |
||
261 | hidnplayr | 431 | ; in eax, dx ; eeprom delay |
302 | hidnplayr | 432 | dec cl |
433 | jns .read_loop |
||
434 | xor al, al |
||
435 | out dx, al |
||
436 | mov ax, bx |
||
437 | ret |
||
261 | hidnplayr | 438 | |
439 | ;*************************************************************************** |
||
440 | ; Function |
||
441 | ; rtl8139_transmit |
||
442 | ; Description |
||
443 | ; Transmits a packet of data via the ethernet card |
||
444 | ; Pointer to 48 bit destination address in edi |
||
445 | ; Type of packet in bx |
||
373 | mikedld | 446 | ; Size of packet in ecx |
447 | ; Pointer to packet data in esi |
||
261 | hidnplayr | 448 | ; Destroyed registers |
449 | ; eax, edx, esi, edi |
||
450 | ; ToDo |
||
451 | ; for waiting of timeout the rtl8139 internal timer |
||
452 | ; should be used |
||
453 | ; |
||
454 | ;*************************************************************************** |
||
455 | rtl8139_transmit: |
||
302 | hidnplayr | 456 | cmp ecx, MAX_ETH_FRAME_SIZE |
457 | jg .finish ; packet is too long |
||
458 | push ecx |
||
261 | hidnplayr | 459 | ; check descriptor |
302 | hidnplayr | 460 | mov ecx, [curr_tx_desc] |
461 | mov edx, [io_addr] |
||
462 | lea edx, [edx+ecx*4+RTL8139_REG_TSD0] |
||
463 | push edx ebx |
||
464 | in ax, dx |
||
323 | hidnplayr | 465 | test ax, 0x1fff ; or no size given |
466 | jz .send_packet |
||
467 | and ax, (1 shl RTL8139_BIT_TOK) or (1 shl RTL8139_BIT_OWN) |
||
302 | hidnplayr | 468 | cmp ax, (1 shl RTL8139_BIT_TOK) or (1 shl RTL8139_BIT_OWN) |
469 | jz .send_packet |
||
261 | hidnplayr | 470 | ; wait for timeout |
302 | hidnplayr | 471 | mov ebx, RTL8139_TX_TIMEOUT |
472 | mov eax, 0x5 ; delay x/100 secs |
||
473 | int 0x40 |
||
474 | in ax, dx |
||
475 | and ax, (1 shl RTL8139_BIT_TOK) or (1 shl RTL8139_BIT_OWN) |
||
476 | cmp ax, (1 shl RTL8139_BIT_TOK) or (1 shl RTL8139_BIT_OWN) |
||
477 | jz .send_packet |
||
261 | hidnplayr | 478 | ; chip hung, reset it |
302 | hidnplayr | 479 | call rtl8139_reset |
261 | hidnplayr | 480 | ; reset the card |
481 | .send_packet: |
||
482 | ; calculate tx_buffer address |
||
302 | hidnplayr | 483 | pop ebx |
484 | push esi |
||
485 | mov eax, MAX_ETH_FRAME_SIZE |
||
486 | mul dword [curr_tx_desc] |
||
487 | mov esi, edi |
||
488 | lea edi, [rtl8139_tx_buff+eax] |
||
489 | mov eax, edi |
||
490 | cld |
||
261 | hidnplayr | 491 | ; copy destination address |
302 | hidnplayr | 492 | movsd |
493 | movsw |
||
261 | hidnplayr | 494 | ; copy source address |
302 | hidnplayr | 495 | mov esi, node_addr |
496 | movsd |
||
497 | movsw |
||
261 | hidnplayr | 498 | ; copy packet type |
302 | hidnplayr | 499 | mov [edi], bx |
500 | add edi, 2 |
||
261 | hidnplayr | 501 | ; copy the packet data |
302 | hidnplayr | 502 | pop esi edx ecx |
503 | push ecx |
||
504 | shr ecx, 2 |
||
505 | rep movsd |
||
506 | pop ecx |
||
507 | push ecx |
||
508 | and ecx, 3 |
||
509 | rep movsb |
||
261 | hidnplayr | 510 | ; set address |
302 | hidnplayr | 511 | add edx, RTL8139_REG_TSAD0 - RTL8139_REG_TSD0 |
512 | out dx, eax |
||
261 | hidnplayr | 513 | ; set size and early threshold |
302 | hidnplayr | 514 | pop eax ; pick up the size |
515 | add eax, ETH_HLEN |
||
516 | cmp eax, ETH_ZLEN |
||
517 | jnc .no_pad |
||
518 | mov eax, ETH_ZLEN |
||
261 | hidnplayr | 519 | .no_pad: |
302 | hidnplayr | 520 | or eax, (RTL8139_ERTXTH shl RTL8139_BIT_ERTXTH) |
521 | add edx, RTL8139_REG_TSD0 - RTL8139_REG_TSAD0 |
||
522 | out dx, eax |
||
261 | hidnplayr | 523 | ; get next descriptor 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, ... |
302 | hidnplayr | 524 | inc dword [curr_tx_desc] |
525 | and dword [curr_tx_desc], 3 |
||
261 | hidnplayr | 526 | .finish: |
302 | hidnplayr | 527 | ret |
261 | hidnplayr | 528 | |
529 | ;*************************************************************************** |
||
530 | ; Function |
||
531 | ; rtl8139_poll |
||
532 | ; |
||
533 | ; Description |
||
534 | ; Polls the ethernet card for a received packet |
||
535 | ; Received data, if any, ends up in Ether_buffer |
||
536 | ; Destroyed register(s) |
||
537 | ; eax, edx, ecx |
||
538 | ; |
||
539 | ;*************************************************************************** |
||
540 | rtl8139_poll: |
||
302 | hidnplayr | 541 | mov word [eth_rx_data_len], 0 |
542 | mov edx, [io_addr] |
||
543 | add edx, RTL8139_REG_COMMAND |
||
544 | in al, dx |
||
545 | test al, (1 shl RTL8139_BIT_BUFE) |
||
546 | jnz .finish |
||
261 | hidnplayr | 547 | ; new packet received copy it from rx_buffer into Ether_buffer |
302 | hidnplayr | 548 | mov eax, rtl8139_rx_buff |
549 | add eax, [rtl8139_rx_buff_offset] |
||
261 | hidnplayr | 550 | ; check if packet is ok |
302 | hidnplayr | 551 | test byte [eax], (1 shl RTL8139_BIT_ROK) |
552 | jz .reset_rx |
||
261 | hidnplayr | 553 | ; packet is ok copy it into the Ether_buffer |
302 | hidnplayr | 554 | movzx ecx, word [eax+2] ; packet length |
555 | sub ecx, 4 ; don't copy CRC |
||
556 | mov word [eth_rx_data_len], cx |
||
557 | push ecx |
||
558 | shr ecx, 2 ; first copy dword-wise |
||
559 | lea esi, [eax+4] ; don't copy the packet header |
||
560 | mov edi, Ether_buffer |
||
561 | cld |
||
562 | rep movsd ; copy the dwords |
||
563 | pop ecx |
||
564 | and ecx, 3 |
||
565 | rep movsb ; copy the rest bytes |
||
261 | hidnplayr | 566 | ; update rtl8139_rx_buff_offset |
302 | hidnplayr | 567 | movzx eax, word [eax+2] ; packet length |
568 | add eax, [rtl8139_rx_buff_offset] |
||
569 | add eax, 4+3 ; packet header is 4 bytes long + dword alignment |
||
570 | and eax, not 3 ; dword alignment |
||
571 | cmp eax, RTL8139_RX_BUFFER_SIZE |
||
572 | jl .no_wrap |
||
573 | sub eax, RTL8139_RX_BUFFER_SIZE |
||
261 | hidnplayr | 574 | .no_wrap: |
302 | hidnplayr | 575 | mov [rtl8139_rx_buff_offset], eax |
261 | hidnplayr | 576 | ; update CAPR register |
302 | hidnplayr | 577 | sub eax, 0x10 ; value 0x10 is a constant for CAPR |
578 | add edx, RTL8139_REG_CAPR - RTL8139_REG_COMMAND |
||
579 | out dx, ax |
||
261 | hidnplayr | 580 | .finish: |
581 | ; clear active interrupt sources |
||
302 | hidnplayr | 582 | mov edx, [io_addr] |
583 | add edx, RTL8139_REG_ISR |
||
584 | in ax, dx |
||
585 | out dx, ax |
||
586 | ret |
||
261 | hidnplayr | 587 | .reset_rx: |
302 | hidnplayr | 588 | in al, dx ; read command register |
589 | push eax |
||
590 | and al, not (1 shl RTL8139_BIT_RE) |
||
591 | out dx, al |
||
592 | pop eax |
||
593 | out dx, al |
||
594 | add edx, RTL8139_REG_RXCONFIG - RTL8139_REG_COMMAND |
||
595 | mov ax, RTL8139_RX_CONFIG |
||
596 | out dx, ax |
||
597 | ret |
||
598 | |||
599 | rtl8139_cable: |
||
600 | pusha |
||
601 | mov edx, [io_addr] |
||
602 | add edx, 0x58 |
||
603 | in al,dx |
||
604 | test al,1 SHL 2 |
||
605 | jnz .notconnected |
||
606 | popa |
||
607 | xor al,al |
||
608 | inc al |
||
609 | ret |
||
610 | .notconnected: |
||
611 | popa |
||
612 | xor al,al |
||
613 | ret> |