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2288 | clevermous | 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
2 | ;; ;; |
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3 | ;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;; |
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4 | ;; Distributed under terms of the GNU General Public License ;; |
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5 | ;; ;; |
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6 | ;; RTL8139.INC ;; |
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7 | ;; ;; |
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8 | ;; Ethernet driver for Menuet OS ;; |
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9 | ;; ;; |
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10 | ;; Version 0.2 11 August 2003 ;; |
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11 | ;; ;; |
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12 | ;; Driver for chips of RealTek 8139 family ;; |
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13 | ;; References: ;; |
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14 | ;; www.realtek.com.hw - data sheets ;; |
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15 | ;; rtl8139.c - linux driver ;; |
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16 | ;; 8139too.c - linux driver ;; |
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17 | ;; ethernet driver template by Mike Hibbett ;; |
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18 | ;; ;; |
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19 | ;; The copyright statement is ;; |
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20 | ;; ;; |
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21 | ;; GNU GENERAL PUBLIC LICENSE ;; |
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22 | ;; Version 2, June 1991 ;; |
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23 | ;; ;; |
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24 | ;; Copyright 2003 Endre Kozma, ;; |
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25 | ;; endre.kozma@axelero.hu ;; |
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26 | ;; ;; |
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27 | ;; See file COPYING for details ;; |
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28 | ;; ;; |
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29 | ;; 10.01.2007 Bugfix for l8139_transmit from Paolo Franchetti ;; |
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30 | ;; ;; |
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31 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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32 | |||
33 | $Revision: 2288 $ |
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34 | |||
35 | |||
36 | ETH_ALEN equ 6 |
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37 | ETH_HLEN equ (2 * ETH_ALEN + 2) |
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38 | ETH_ZLEN equ 60 ; 60 + 4bytes auto payload for |
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39 | ; mininmum 64bytes frame length |
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40 | |||
41 | PCI_REG_COMMAND equ 0x04 ; command register |
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42 | PCI_BIT_PIO equ 0 ; bit0: io space control |
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43 | PCI_BIT_MMIO equ 1 ; bit1: memory space control |
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44 | PCI_BIT_MASTER equ 2 ; bit2: device acts as a PCI master |
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45 | |||
46 | RTL8139_REG_MAR0 equ 0x08 ; multicast filter register 0 |
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47 | RTL8139_REG_MAR4 equ 0x0c ; multicast filter register 4 |
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48 | RTL8139_REG_TSD0 equ 0x10 ; transmit status of descriptor |
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49 | RTL8139_REG_TSAD0 equ 0x20 ; transmit start address of descriptor |
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50 | RTL8139_REG_RBSTART equ 0x30 ; RxBuffer start address |
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51 | RTL8139_REG_COMMAND equ 0x37 ; command register |
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52 | RTL8139_REG_CAPR equ 0x38 ; current address of packet read |
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53 | RTL8139_REG_IMR equ 0x3c ; interrupt mask register |
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54 | RTL8139_REG_ISR equ 0x3e ; interrupt status register |
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55 | RTL8139_REG_TXCONFIG equ 0x40 ; transmit configuration register |
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56 | RTL8139_REG_TXCONFIG_0 equ 0x40 ; transmit configuration register 0 |
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57 | RTL8139_REG_TXCONFIG_1 equ 0x41 ; transmit configuration register 1 |
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58 | RTL8139_REG_TXCONFIG_2 equ 0x42 ; transmit configuration register 2 |
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59 | RTL8139_REG_TXCONFIG_3 equ 0x43 ; transmit configuration register 3 |
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60 | RTL8139_REG_RXCONFIG equ 0x44 ; receive configuration register 0 |
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61 | RTL8139_REG_RXCONFIG_0 equ 0x44 ; receive configuration register 0 |
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62 | RTL8139_REG_RXCONFIG_1 equ 0x45 ; receive configuration register 1 |
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63 | RTL8139_REG_RXCONFIG_2 equ 0x46 ; receive configuration register 2 |
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64 | RTL8139_REG_RXCONFIG_3 equ 0x47 ; receive configuration register 3 |
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65 | RTL8139_REG_MPC equ 0x4c ; missed packet counter |
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66 | RTL8139_REG_9346CR equ 0x50 ; serial eeprom 93C46 command register |
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67 | RTL8139_REG_CONFIG1 equ 0x52 ; configuration register 1 |
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68 | RTL8139_REG_CONFIG4 equ 0x5a ; configuration register 4 |
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69 | RTL8139_REG_HLTCLK equ 0x5b ; undocumented halt clock register |
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70 | RTL8139_REG_BMCR equ 0x62 ; basic mode control register |
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71 | RTL8139_REG_ANAR equ 0x66 ; auto negotiation advertisement register |
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72 | |||
73 | ; 5.1 packet header |
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74 | RTL8139_BIT_RUNT equ 4 ; total packet length < 64 bytes |
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75 | RTL8139_BIT_LONG equ 3 ; total packet length > 4k |
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76 | RTL8139_BIT_CRC equ 2 ; crc error occured |
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77 | RTL8139_BIT_FAE equ 1 ; frame alignment error occured |
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78 | RTL8139_BIT_ROK equ 0 ; received packet is ok |
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79 | ; 5.4 command register |
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80 | RTL8139_BIT_RST equ 4 ; reset bit |
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81 | RTL8139_BIT_RE equ 3 ; receiver enabled |
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82 | RTL8139_BIT_TE equ 2 ; transmitter enabled |
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83 | RTL8139_BIT_BUFE equ 0 ; rx buffer is empty, no packet stored |
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84 | ; 5.6 interrupt status register |
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85 | RTL8139_BIT_ISR_TOK equ 2 ; transmit ok |
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86 | RTL8139_BIT_ISR_RER equ 1 ; receive error interrupt |
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87 | RTL8139_BIT_ISR_ROK equ 0 ; receive ok |
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88 | ; 5.7 transmit configyration register |
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89 | RTL8139_BIT_TX_MXDMA equ 8 ; Max DMA burst size per Tx DMA burst |
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90 | RTL8139_BIT_TXRR equ 4 ; Tx Retry count 16+(TXRR*16) |
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91 | ; 5.8 receive configuration register |
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92 | RTL8139_BIT_RXFTH equ 13 ; Rx fifo threshold |
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93 | RTL8139_BIT_RBLEN equ 11 ; Ring buffer length indicator |
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94 | RTL8139_BIT_RX_MXDMA equ 8 ; Max DMA burst size per Rx DMA burst |
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95 | RTL8139_BIT_NOWRAP equ 7 ; transfered data wrapping |
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96 | RTL8139_BIT_9356SEL equ 6 ; eeprom selector 9346/9356 |
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97 | RTL8139_BIT_AER equ 5 ; accept error packets |
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98 | RTL8139_BIT_AR equ 4 ; accept runt packets |
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99 | RTL8139_BIT_AB equ 3 ; accept broadcast packets |
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100 | RTL8139_BIT_AM equ 2 ; accept multicast packets |
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101 | RTL8139_BIT_APM equ 1 ; accept physical match packets |
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102 | RTL8139_BIT_AAP equ 0 ; accept all packets |
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103 | ; 5.9 93C46/93C56 command register |
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104 | RTL8139_BIT_93C46_EEM1 equ 7 ; RTL8139 eeprom operating mode1 |
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105 | RTL8139_BIT_93C46_EEM0 equ 6 ; RTL8139 eeprom operating mode0 |
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106 | RTL8139_BIT_93C46_EECS equ 3 ; chip select |
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107 | RTL8139_BIT_93C46_EESK equ 2 ; serial data clock |
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108 | RTL8139_BIT_93C46_EEDI equ 1 ; serial data input |
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109 | RTL8139_BIT_93C46_EEDO equ 0 ; serial data output |
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110 | ; 5.11 configuration register 1 |
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111 | RTL8139_BIT_LWACT equ 4 ; see RTL8139_REG_CONFIG1 |
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112 | RTL8139_BIT_SLEEP equ 1 ; sleep bit at older chips |
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113 | RTL8139_BIT_PWRDWN equ 0 ; power down bit at older chips |
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114 | RTL8139_BIT_PMEn equ 0 ; power management enabled |
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115 | ; 5.14 configuration register 4 |
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116 | RTL8139_BIT_LWPTN equ 2 ; see RTL8139_REG_CONFIG4 |
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117 | ; 6.2 transmit status register |
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118 | RTL8139_BIT_ERTXTH equ 16 ; early TX threshold |
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119 | RTL8139_BIT_TOK equ 15 ; transmit ok |
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120 | RTL8139_BIT_OWN equ 13 ; tx DMA operation is completed |
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121 | ; 6.18 basic mode control register |
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122 | RTL8139_BIT_ANE equ 12 ; auto negotiation enable |
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123 | ; 6.20 auto negotiation advertisement register |
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124 | RTL8139_BIT_TXFD equ 8 ; 100base-T full duplex |
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125 | RTL8139_BIT_TX equ 7 ; 100base-T |
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126 | RTL8139_BIT_10FD equ 6 ; 10base-T full duplex |
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127 | RTL8139_BIT_10 equ 5 ; 10base-T |
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128 | RTL8139_BIT_SELECTOR equ 0 ; binary encoded selector CSMA/CD=00001 |
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129 | ; RX/TX buffer size |
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130 | RTL8139_RBLEN equ 0 ; 0==8K 1==16k 2==32k 3==64k |
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131 | RTL8139_RX_BUFFER_SIZE equ (8192 shl RTL8139_RBLEN) |
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132 | MAX_ETH_FRAME_SIZE equ 1516 ; exactly 1514 wthout CRC |
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133 | RTL8139_NUM_TX_DESC equ 4 |
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134 | RTL8139_TX_BUFFER_SIZE equ (MAX_ETH_FRAME_SIZE * RTL8139_NUM_TX_DESC) |
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135 | RTL8139_TXRR equ 8 ; total retries = 16+(TXRR*16) |
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136 | RTL8139_TX_MXDMA equ 6 ; 0==16 1==32 2==64 3==128 |
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137 | ; 4==256 5==512 6==1024 7==2048 |
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138 | RTL8139_ERTXTH equ 8 ; in unit of 32 bytes e.g:(8*32)=256 |
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139 | RTL8139_RX_MXDMA equ 7 ; 0==16 1==32 2==64 3==128 |
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140 | ; 4==256 5==512 6==1024 7==unlimited |
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141 | RTL8139_RXFTH equ 7 ; 0==16 1==32 2==64 3==128 |
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142 | ; 4==256 5==512 6==1024 7==no threshold |
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143 | RTL8139_RX_CONFIG equ ((RTL8139_RBLEN shl RTL8139_BIT_RBLEN) \ |
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144 | or (RTL8139_RX_MXDMA shl RTL8139_BIT_RX_MXDMA) \ |
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145 | or (1 shl RTL8139_BIT_NOWRAP) \ |
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146 | or (RTL8139_RXFTH shl RTL8139_BIT_RXFTH) \ |
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147 | or (1 shl RTL8139_BIT_AB) or (1 shl RTL8139_BIT_APM) \ |
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148 | or (1 shl RTL8139_BIT_AER) or (1 shl RTL8139_BIT_AR) \ |
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149 | or (1 shl RTL8139_BIT_AM)) |
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150 | RTL8139_TX_TIMEOUT equ 30 ; 300 milliseconds timeout |
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151 | |||
152 | EE_93C46_REG_ETH_ID equ 7 ; MAC offset |
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153 | EE_93C46_READ_CMD equ (6 shl 6) ; 110b + 6bit address |
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154 | EE_93C56_READ_CMD equ (6 shl 8) ; 110b + 8bit address |
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155 | EE_93C46_CMD_LENGTH equ 9 ; start bit + cmd + 6bit address |
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156 | EE_93C56_CMD_LENGTH equ 11 ; start bit + cmd + 8bit ddress |
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157 | |||
158 | VER_RTL8139 equ 1100000b |
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159 | VER_RTL8139A equ 1110000b |
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160 | ; VER_RTL8139AG equ 1110100b |
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161 | VER_RTL8139B equ 1111000b |
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162 | VER_RTL8130 equ VER_RTL8139B |
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163 | VER_RTL8139C equ 1110100b |
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164 | VER_RTL8100 equ 1111010b |
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165 | VER_RTL8100B equ 1110101b |
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166 | VER_RTL8139D equ VER_RTL8100B |
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167 | VER_RTL8139CP equ 1110110b |
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168 | VER_RTL8101 equ 1110111b |
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169 | |||
170 | IDX_RTL8139 equ 0 |
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171 | IDX_RTL8139A equ 1 |
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172 | IDX_RTL8139B equ 2 |
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173 | IDX_RTL8139C equ 3 |
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174 | IDX_RTL8100 equ 4 |
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175 | IDX_RTL8139D equ 5 |
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176 | IDX_RTL8139D equ 6 |
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177 | IDX_RTL8101 equ 7 |
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178 | |||
179 | |||
180 | ; These two must be 4 byte aligned ( which they are ) |
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181 | rtl8139_rx_buff equ eth_data_start |
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182 | rtl8139_tx_buff equ rtl8139_rx_buff + (RTL8139_RX_BUFFER_SIZE + MAX_ETH_FRAME_SIZE) |
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183 | |||
184 | uglobal |
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185 | align 4 |
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186 | rtl8139_rx_buff_offset: |
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187 | dd 0 |
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188 | curr_tx_desc dd 0 |
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189 | endg |
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190 | |||
191 | iglobal |
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192 | hw_ver_array: |
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193 | db VER_RTL8139, VER_RTL8139A, VER_RTL8139B, VER_RTL8139C |
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194 | db VER_RTL8100, VER_RTL8139D, VER_RTL8139CP, VER_RTL8101 |
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195 | HW_VER_ARRAY_SIZE = $-hw_ver_array |
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196 | endg |
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197 | |||
198 | uglobal |
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199 | hw_ver_id: |
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200 | db 0 |
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201 | endg |
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202 | |||
203 | ;*************************************************************************** |
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204 | ; Function |
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205 | ; rtl8139_probe |
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206 | ; Description |
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207 | ; Searches for an ethernet card, enables it and clears the rx buffer |
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208 | ; If a card was found, it enables the ethernet -> TCPIP link |
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209 | ; Destroyed registers |
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210 | ; eax, ebx, ecx, edx |
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211 | ; |
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212 | ;*************************************************************************** |
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213 | rtl8139_probe: |
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214 | ; enable the device |
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215 | mov al, 2 |
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216 | mov ah, [pci_bus] |
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217 | mov bh, [pci_dev] |
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218 | mov bl, PCI_REG_COMMAND |
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219 | call pci_read_reg |
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220 | mov cx, ax |
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221 | or cl, (1 shl PCI_BIT_MASTER) or (1 shl PCI_BIT_PIO) |
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222 | and cl, not (1 shl PCI_BIT_MMIO) |
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223 | mov al, 2 |
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224 | mov ah, [pci_bus] |
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225 | mov bh, [pci_dev] |
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226 | mov bl, PCI_REG_COMMAND |
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227 | call pci_write_reg |
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228 | ; get chip version |
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229 | mov edx, [io_addr] |
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230 | add edx, RTL8139_REG_TXCONFIG_2 |
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231 | in ax, dx |
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232 | shr ah, 2 |
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233 | shr ax, 6 |
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234 | and al, 01111111b |
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235 | mov ecx, HW_VER_ARRAY_SIZE-1 |
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236 | .chip_ver_loop: |
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237 | cmp al, [hw_ver_array+ecx] |
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238 | je .chip_ver_found |
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239 | dec ecx |
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240 | jns .chip_ver_loop |
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241 | xor cl, cl ; default RTL8139 |
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242 | .chip_ver_found: |
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243 | mov [hw_ver_id], cl |
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244 | ; wake up the chip |
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245 | mov edx, [io_addr] |
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246 | add edx, RTL8139_REG_HLTCLK |
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247 | mov al, 'R' ; run the clock |
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248 | out dx, al |
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249 | ; unlock config and BMCR registers |
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250 | add edx, RTL8139_REG_9346CR - RTL8139_REG_HLTCLK |
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251 | mov al, (1 shl RTL8139_BIT_93C46_EEM1) or (1 shl RTL8139_BIT_93C46_EEM0) |
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252 | out dx, al |
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253 | ; enable power management |
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254 | add edx, RTL8139_REG_CONFIG1 - RTL8139_REG_9346CR |
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255 | in al, dx |
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256 | cmp byte [hw_ver_id], IDX_RTL8139B |
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257 | jl .old_chip |
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258 | ; set LWAKE pin to active high (default value). |
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259 | ; it is for Wake-On-LAN functionality of some motherboards. |
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260 | ; this signal is used to inform the motherboard to execute a wake-up process. |
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261 | ; only at newer chips. |
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262 | or al, (1 shl RTL8139_BIT_PMEn) |
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263 | and al, not (1 shl RTL8139_BIT_LWACT) |
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264 | out dx, al |
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265 | add edx, RTL8139_REG_CONFIG4 - RTL8139_REG_CONFIG1 |
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266 | in al, dx |
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267 | and al, not (1 shl RTL8139_BIT_LWPTN) |
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268 | out dx, al |
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269 | jmp .finish_wake_up |
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270 | .old_chip: |
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271 | ; wake up older chips |
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272 | and al, not ((1 shl RTL8139_BIT_SLEEP) or (1 shl RTL8139_BIT_PWRDWN)) |
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273 | out dx, al |
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274 | .finish_wake_up: |
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275 | ; lock config and BMCR registers |
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276 | xor al, al |
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277 | mov edx, [io_addr] |
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278 | add edx, RTL8139_REG_9346CR |
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279 | out dx, al |
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280 | ;*************************************************************************** |
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281 | ; Function |
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282 | ; rt8139_reset |
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283 | ; Description |
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284 | ; Place the chip (ie, the ethernet card) into a virgin state |
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285 | ; Destroyed registers |
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286 | ; eax, ebx, ecx, edx |
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287 | ; |
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288 | ;*************************************************************************** |
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289 | rtl8139_reset: |
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290 | mov edx, [io_addr] |
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291 | add edx, RTL8139_REG_COMMAND |
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292 | mov al, 1 shl RTL8139_BIT_RST |
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293 | out dx, al |
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294 | mov cx, 1000 ; wait no longer for the reset |
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295 | .wait_for_reset: |
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296 | in al, dx |
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297 | test al, 1 shl RTL8139_BIT_RST |
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298 | jz .reset_completed ; RST remains 1 during reset |
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299 | dec cx |
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300 | jns .wait_for_reset |
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301 | .reset_completed: |
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302 | ; get MAC (hardware address) |
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303 | mov ecx, 2 |
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304 | .mac_read_loop: |
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305 | lea eax, [EE_93C46_REG_ETH_ID+ecx] |
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306 | push ecx |
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307 | call rtl8139_read_eeprom |
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308 | pop ecx |
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309 | mov [node_addr+ecx*2], ax |
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310 | dec ecx |
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311 | jns .mac_read_loop |
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312 | ; unlock config and BMCR registers |
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313 | mov edx, [io_addr] |
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314 | add edx, RTL8139_REG_9346CR |
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315 | mov al, (1 shl RTL8139_BIT_93C46_EEM1) or (1 shl RTL8139_BIT_93C46_EEM0) |
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316 | out dx, al |
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317 | ; initialize multicast registers (no filtering) |
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318 | mov eax, 0xffffffff |
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319 | add edx, RTL8139_REG_MAR0 - RTL8139_REG_9346CR |
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320 | out dx, eax |
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321 | add edx, RTL8139_REG_MAR4 - RTL8139_REG_MAR0 |
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322 | out dx, eax |
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323 | ; enable Rx/Tx |
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324 | mov al, (1 shl RTL8139_BIT_RE) or (1 shl RTL8139_BIT_TE) |
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325 | add edx, RTL8139_REG_COMMAND - RTL8139_REG_MAR4 |
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326 | out dx, al |
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327 | ; 32k Rxbuffer, unlimited dma burst, no wrapping, no rx threshold |
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328 | ; accept broadcast packets, accept physical match packets |
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329 | mov eax, RTL8139_RX_CONFIG |
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330 | add edx, RTL8139_REG_RXCONFIG - RTL8139_REG_COMMAND |
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331 | out dx, eax |
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332 | ; 1024 bytes DMA burst, total retries = 16 + 8 * 16 = 144 |
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333 | mov eax, (RTL8139_TX_MXDMA shl RTL8139_BIT_TX_MXDMA) \ |
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334 | or (RTL8139_TXRR shl RTL8139_BIT_TXRR) |
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335 | add edx, RTL8139_REG_TXCONFIG - RTL8139_REG_RXCONFIG |
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336 | out dx, eax |
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337 | ; enable auto negotiation |
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338 | add edx, RTL8139_REG_BMCR - RTL8139_REG_TXCONFIG |
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339 | in ax, dx |
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340 | or ax, (1 shl RTL8139_BIT_ANE) |
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341 | out dx, ax |
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342 | ; set auto negotiation advertisement |
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343 | add edx, RTL8139_REG_ANAR - RTL8139_REG_BMCR |
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344 | in ax, dx |
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345 | or ax, (1 shl RTL8139_BIT_SELECTOR) or (1 shl RTL8139_BIT_10) \ |
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346 | or (1 shl RTL8139_BIT_10FD) or (1 shl RTL8139_BIT_TX) \ |
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347 | or (1 shl RTL8139_BIT_TXFD) |
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348 | out dx, ax |
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349 | ; lock config and BMCR registers |
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350 | xor eax, eax |
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351 | add edx, RTL8139_REG_9346CR - RTL8139_REG_ANAR |
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352 | out dx, al |
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353 | ; init RX/TX pointers |
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354 | mov [rtl8139_rx_buff_offset], eax |
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355 | mov [curr_tx_desc], eax |
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356 | ; clear missing packet counter |
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357 | add edx, RTL8139_REG_MPC - RTL8139_REG_9346CR |
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358 | out dx, eax |
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359 | ; disable all interrupts |
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360 | add edx, RTL8139_REG_IMR - RTL8139_REG_MPC |
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361 | out dx, ax |
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362 | ; set RxBuffer address, init RX buffer offset, init TX ring |
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363 | mov eax, rtl8139_rx_buff ; simba |
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364 | sub eax, OS_BASE |
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365 | add edx, RTL8139_REG_RBSTART - RTL8139_REG_IMR |
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366 | out dx, eax |
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367 | ; Indicate that we have successfully reset the card |
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368 | mov eax, [pci_data] |
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369 | mov [eth_status], eax |
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370 | ret |
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371 | |||
372 | ;*************************************************************************** |
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373 | ; Function |
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374 | ; rtl8139_read_eeprom |
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375 | ; Description |
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376 | ; reads eeprom type 93c46 and 93c56 |
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377 | ; Parameters |
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378 | ; al - word to be read (6bit in case of 93c46 and 8bit otherwise) |
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379 | ; Return value |
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380 | ; ax - word read in |
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381 | ; Destroyed register(s) |
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382 | ; eax, cx, ebx, edx |
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383 | ; |
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384 | ;*************************************************************************** |
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385 | rtl8139_read_eeprom: |
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386 | movzx ebx, al |
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387 | mov edx, [io_addr] |
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388 | add edx, RTL8139_REG_RXCONFIG |
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389 | in al, dx |
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390 | test al, (1 shl RTL8139_BIT_9356SEL) |
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391 | jz .type_93c46 |
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392 | ; and bl, 01111111b ; don't care first bit |
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393 | or bx, EE_93C56_READ_CMD ; it contains start bit |
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394 | mov cx, EE_93C56_CMD_LENGTH-1 ; cmd_loop counter |
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395 | jmp .read_eeprom |
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396 | .type_93c46: |
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397 | and bl, 00111111b |
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398 | or bx, EE_93C46_READ_CMD ; it contains start bit |
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399 | mov cx, EE_93C46_CMD_LENGTH-1 ; cmd_loop counter |
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400 | .read_eeprom: |
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401 | add edx, RTL8139_REG_9346CR - RTL8139_REG_RXCONFIG_0 |
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402 | ; mov al, (1 shl RTL8139_BIT_93C46_EEM1) |
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403 | ; out dx, al |
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404 | mov al, (1 shl RTL8139_BIT_93C46_EEM1) \ |
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405 | or (1 shl RTL8139_BIT_93C46_EECS) ; wake up the eeprom |
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406 | out dx, al |
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407 | .cmd_loop: |
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408 | mov al, (1 shl RTL8139_BIT_93C46_EEM1) or (1 shl RTL8139_BIT_93C46_EECS) |
||
409 | bt bx, cx |
||
410 | jnc .zero_bit |
||
411 | or al, (1 shl RTL8139_BIT_93C46_EEDI) |
||
412 | .zero_bit: |
||
413 | out dx, al |
||
414 | ; push eax |
||
415 | ; in eax, dx ; eeprom delay |
||
416 | ; pop eax |
||
417 | or al, (1 shl RTL8139_BIT_93C46_EESK) |
||
418 | out dx, al |
||
419 | ; in eax, dx ; eeprom delay |
||
420 | dec cx |
||
421 | jns .cmd_loop |
||
422 | ; in eax, dx ; eeprom delay |
||
423 | mov al, (1 shl RTL8139_BIT_93C46_EEM1) or (1 shl RTL8139_BIT_93C46_EECS) |
||
424 | out dx, al |
||
425 | mov cl, 0xf |
||
426 | .read_loop: |
||
427 | shl ebx, 1 |
||
428 | mov al, (1 shl RTL8139_BIT_93C46_EEM1) \ |
||
429 | or (1 shl RTL8139_BIT_93C46_EECS) \ |
||
430 | or (1 shl RTL8139_BIT_93C46_EESK) |
||
431 | out dx, al |
||
432 | ; in eax, dx ; eeprom delay |
||
433 | in al, dx |
||
434 | and al, (1 shl RTL8139_BIT_93C46_EEDO) |
||
435 | jz .dont_set |
||
436 | inc ebx |
||
437 | .dont_set: |
||
438 | mov al, (1 shl RTL8139_BIT_93C46_EEM1) \ |
||
439 | or (1 shl RTL8139_BIT_93C46_EECS) |
||
440 | out dx, al |
||
441 | ; in eax, dx ; eeprom delay |
||
442 | dec cl |
||
443 | jns .read_loop |
||
444 | xor al, al |
||
445 | out dx, al |
||
446 | mov ax, bx |
||
447 | ret |
||
448 | |||
449 | ;*************************************************************************** |
||
450 | ; Function |
||
451 | ; rtl8139_transmit |
||
452 | ; Description |
||
453 | ; Transmits a packet of data via the ethernet card |
||
454 | ; Pointer to 48 bit destination address in edi |
||
455 | ; Type of packet in bx |
||
456 | ; Size of packet in ecx |
||
457 | ; Pointer to packet data in esi |
||
458 | ; Destroyed registers |
||
459 | ; eax, edx, esi, edi |
||
460 | ; ToDo |
||
461 | ; for waiting of timeout the rtl8139 internal timer |
||
462 | ; should be used |
||
463 | ; |
||
464 | ;*************************************************************************** |
||
465 | rtl8139_transmit: |
||
466 | cmp ecx, MAX_ETH_FRAME_SIZE |
||
467 | jg .finish ; packet is too long |
||
468 | push ecx |
||
469 | ; check descriptor |
||
470 | mov ecx, [curr_tx_desc] |
||
471 | mov edx, [io_addr] |
||
472 | lea edx, [edx+ecx*4+RTL8139_REG_TSD0] |
||
473 | push edx ebx |
||
474 | in ax, dx |
||
475 | test ax, 0x1fff ; or no size given |
||
476 | jz .send_packet |
||
477 | and ax, (1 shl RTL8139_BIT_TOK) or (1 shl RTL8139_BIT_OWN) |
||
478 | cmp ax, (1 shl RTL8139_BIT_TOK) or (1 shl RTL8139_BIT_OWN) |
||
479 | jz .send_packet |
||
480 | ; wait for timeout |
||
481 | mov ebx, RTL8139_TX_TIMEOUT |
||
482 | mov eax, 0x5 ; delay x/100 secs |
||
483 | int 0x40 |
||
484 | in ax, dx |
||
485 | and ax, (1 shl RTL8139_BIT_TOK) or (1 shl RTL8139_BIT_OWN) |
||
486 | cmp ax, (1 shl RTL8139_BIT_TOK) or (1 shl RTL8139_BIT_OWN) |
||
487 | jz .send_packet |
||
488 | ; chip hung, reset it |
||
489 | call rtl8139_reset |
||
490 | ; reset the card |
||
491 | .send_packet: |
||
492 | ; calculate tx_buffer address |
||
493 | pop ebx |
||
494 | push esi |
||
495 | mov eax, MAX_ETH_FRAME_SIZE |
||
496 | mul dword [curr_tx_desc] |
||
497 | mov esi, edi |
||
498 | lea edi, [rtl8139_tx_buff+eax] |
||
499 | mov eax, edi |
||
500 | cld |
||
501 | ; copy destination address |
||
502 | movsd |
||
503 | movsw |
||
504 | ; copy source address |
||
505 | mov esi, node_addr |
||
506 | movsd |
||
507 | movsw |
||
508 | ; copy packet type |
||
509 | mov [edi], bx |
||
510 | add edi, 2 |
||
511 | ; copy the packet data |
||
512 | pop esi edx ecx |
||
513 | push ecx |
||
514 | shr ecx, 2 |
||
515 | rep movsd |
||
516 | pop ecx |
||
517 | push ecx |
||
518 | and ecx, 3 |
||
519 | rep movsb |
||
520 | ; set address |
||
521 | sub eax, OS_BASE |
||
522 | add edx, RTL8139_REG_TSAD0 - RTL8139_REG_TSD0 |
||
523 | out dx, eax |
||
524 | ; set size and early threshold |
||
525 | pop eax ; pick up the size |
||
526 | add eax, ETH_HLEN |
||
527 | cmp eax, ETH_ZLEN |
||
528 | jnc .no_pad |
||
529 | mov eax, ETH_ZLEN |
||
530 | .no_pad: |
||
531 | or eax, (RTL8139_ERTXTH shl RTL8139_BIT_ERTXTH) |
||
532 | add edx, RTL8139_REG_TSD0 - RTL8139_REG_TSAD0 |
||
533 | out dx, eax |
||
534 | ; get next descriptor 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, ... |
||
535 | inc dword [curr_tx_desc] |
||
536 | and dword [curr_tx_desc], 3 |
||
537 | .finish: |
||
538 | ret |
||
539 | |||
540 | ;*************************************************************************** |
||
541 | ; Function |
||
542 | ; rtl8139_poll |
||
543 | ; |
||
544 | ; Description |
||
545 | ; Polls the ethernet card for a received packet |
||
546 | ; Received data, if any, ends up in Ether_buffer |
||
547 | ; Destroyed register(s) |
||
548 | ; eax, edx, ecx |
||
549 | ; |
||
550 | ;*************************************************************************** |
||
551 | rtl8139_poll: |
||
552 | mov word [eth_rx_data_len], 0 |
||
553 | mov edx, [io_addr] |
||
554 | add edx, RTL8139_REG_COMMAND |
||
555 | in al, dx |
||
556 | test al, (1 shl RTL8139_BIT_BUFE) |
||
557 | jnz .finish |
||
558 | ; new packet received copy it from rx_buffer into Ether_buffer |
||
559 | mov eax, rtl8139_rx_buff |
||
560 | add eax, [rtl8139_rx_buff_offset] |
||
561 | ; check if packet is ok |
||
562 | test byte [eax], (1 shl RTL8139_BIT_ROK) |
||
563 | jz .reset_rx |
||
564 | ; packet is ok copy it into the Ether_buffer |
||
565 | movzx ecx, word [eax+2] ; packet length |
||
566 | sub ecx, 4 ; don't copy CRC |
||
567 | mov word [eth_rx_data_len], cx |
||
568 | push ecx |
||
569 | shr ecx, 2 ; first copy dword-wise |
||
570 | lea esi, [eax+4] ; don't copy the packet header |
||
571 | mov edi, Ether_buffer |
||
572 | cld |
||
573 | rep movsd ; copy the dwords |
||
574 | pop ecx |
||
575 | and ecx, 3 |
||
576 | rep movsb ; copy the rest bytes |
||
577 | ; update rtl8139_rx_buff_offset |
||
578 | movzx eax, word [eax+2] ; packet length |
||
579 | add eax, [rtl8139_rx_buff_offset] |
||
580 | add eax, 4+3 ; packet header is 4 bytes long + dword alignment |
||
581 | and eax, not 3 ; dword alignment |
||
582 | cmp eax, RTL8139_RX_BUFFER_SIZE |
||
583 | jl .no_wrap |
||
584 | sub eax, RTL8139_RX_BUFFER_SIZE |
||
585 | .no_wrap: |
||
586 | mov [rtl8139_rx_buff_offset], eax |
||
587 | ; update CAPR register |
||
588 | sub eax, 0x10 ; value 0x10 is a constant for CAPR |
||
589 | add edx, RTL8139_REG_CAPR - RTL8139_REG_COMMAND |
||
590 | out dx, ax |
||
591 | .finish: |
||
592 | ; clear active interrupt sources |
||
593 | mov edx, [io_addr] |
||
594 | add edx, RTL8139_REG_ISR |
||
595 | in ax, dx |
||
596 | out dx, ax |
||
597 | ret |
||
598 | .reset_rx: |
||
599 | in al, dx ; read command register |
||
600 | push eax |
||
601 | and al, not (1 shl RTL8139_BIT_RE) |
||
602 | out dx, al |
||
603 | pop eax |
||
604 | out dx, al |
||
605 | add edx, RTL8139_REG_RXCONFIG - RTL8139_REG_COMMAND |
||
606 | mov ax, RTL8139_RX_CONFIG |
||
607 | out dx, ax |
||
608 | ret |
||
609 | |||
610 | rtl8139_cable: |
||
611 | pusha |
||
612 | mov edx, [io_addr] |
||
613 | add edx, 0x58 |
||
614 | in al, dx |
||
615 | test al, 1 SHL 2 |
||
616 | jnz .notconnected |
||
617 | popa |
||
618 | xor al, al |
||
619 | inc al |
||
620 | ret |
||
621 | .notconnected: |
||
622 | popa |
||
623 | xor al, al |
||
624 | ret> |