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4850 mario79 1
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2
;;                                                              ;;
5363 yogev_ezra 3
;; Copyright (C) KolibriOS team 2014-2015. All rights reserved. ;;
4850 mario79 4
;; Distributed under terms of the GNU General Public License    ;;
5
;;                                                              ;;
6
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
7
 
8
$Revision: 6816 $
9
 
10
 
4624 mario79 11
;-----------------------------------------------------------------------------
12
; find the IDE controller in the device list
13
;-----------------------------------------------------------------------------
4700 mario79 14
        mov     ecx, IDE_controller_1
4624 mario79 15
        mov     esi, pcidev_list
4700 mario79 16
;--------------------------------------
17
align 4
4624 mario79 18
.loop:
19
        mov     esi, [esi+PCIDEV.fd]
20
        cmp     esi, pcidev_list
4700 mario79 21
        jz      find_IDE_controller_done
22
 
4624 mario79 23
        mov     eax, [esi+PCIDEV.class]
5147 mario79 24
;        shr     eax, 4
25
;        cmp     eax, 0x01018
26
        shr     eax, 7
27
        cmp     eax, 0x010180 shr 7
4624 mario79 28
        jnz     .loop
4700 mario79 29
;--------------------------------------
4624 mario79 30
.found:
31
        mov     eax, [esi+PCIDEV.class]
32
        DEBUGF  1, 'K : IDE controller programming interface %x\n', eax
4700 mario79 33
        mov     [ecx+IDE_DATA.ProgrammingInterface], eax
6816 dunkaist 34
        mov     [ecx+IDE_DATA.pcidev], esi
4624 mario79 35
 
36
        mov     ah, [esi+PCIDEV.bus]
37
        mov     al, 2
38
        mov     bh, [esi+PCIDEV.devfn]
4700 mario79 39
;--------------------------------------
4841 clevermous 40
        mov     dx, 0x1F0
41
        test    byte [esi+PCIDEV.class], 1
42
        jz      @f
4624 mario79 43
        mov     bl, 0x10
44
        push    eax
45
        call    pci_read_reg
46
        and     eax, 0xFFFC
4841 clevermous 47
        mov     edx, eax
48
        pop     eax
4624 mario79 49
@@:
4841 clevermous 50
        DEBUGF  1, 'K : BAR0 IDE base addr %x\n', dx
51
        mov     [StandardATABases], dx
52
        mov     [ecx+IDE_DATA.BAR0_val], dx
4700 mario79 53
;--------------------------------------
4841 clevermous 54
        mov     dx, 0x3F4
55
        test    byte [esi+PCIDEV.class], 1
56
        jz      @f
4624 mario79 57
        mov     bl, 0x14
58
        push    eax
59
        call    pci_read_reg
60
        and     eax, 0xFFFC
4841 clevermous 61
        mov     edx, eax
62
        pop     eax
4624 mario79 63
@@:
4841 clevermous 64
        DEBUGF  1, 'K : BAR1 IDE base addr %x\n', dx
65
        mov     [ecx+IDE_DATA.BAR1_val], dx
4700 mario79 66
;--------------------------------------
4841 clevermous 67
        mov     dx, 0x170
68
        test    byte [esi+PCIDEV.class], 4
69
        jz      @f
4624 mario79 70
        mov     bl, 0x18
71
        push    eax
72
        call    pci_read_reg
73
        and     eax, 0xFFFC
4841 clevermous 74
        mov     edx, eax
75
        pop     eax
4624 mario79 76
@@:
4841 clevermous 77
        DEBUGF  1, 'K : BAR2 IDE base addr %x\n', dx
78
        mov     [StandardATABases+2], dx
79
        mov     [ecx+IDE_DATA.BAR2_val], dx
4700 mario79 80
;--------------------------------------
4841 clevermous 81
        mov     dx, 0x374
82
        test    byte [esi+PCIDEV.class], 4
83
        jz      @f
4624 mario79 84
        mov     bl, 0x1C
85
        push    eax
86
        call    pci_read_reg
87
        and     eax, 0xFFFC
4841 clevermous 88
        mov     edx, eax
89
        pop     eax
4624 mario79 90
@@:
4841 clevermous 91
        DEBUGF  1, 'K : BAR3 IDE base addr %x\n', dx
92
        mov     [ecx+IDE_DATA.BAR3_val], dx
4700 mario79 93
;--------------------------------------
4624 mario79 94
        mov     bl, 0x20
95
        push    eax
96
        call    pci_read_reg
97
        and     eax, 0xFFFC
98
        DEBUGF  1, 'K : BAR4 IDE controller register base addr %x\n', ax
4700 mario79 99
        mov     [ecx+IDE_DATA.RegsBaseAddres], ax
4624 mario79 100
        pop     eax
4700 mario79 101
;--------------------------------------
4624 mario79 102
        mov     bl, 0x3C
103
        push    eax
104
        call    pci_read_reg
105
        and     eax, 0xFF
106
        DEBUGF  1, 'K : IDE Interrupt %x\n', al
4700 mario79 107
        mov     [ecx+IDE_DATA.Interrupt], ax
4624 mario79 108
        pop     eax
4700 mario79 109
 
110
        add     ecx, sizeof.IDE_DATA
111
;--------------------------------------
112
        jmp     .loop
4624 mario79 113
;-----------------------------------------------------------------------------
4700 mario79 114
uglobal
115
align 4
116
;--------------------------------------
117
IDE_controller_pointer dd ?
118
;--------------------------------------
119
IDE_controller_1 IDE_DATA
120
IDE_controller_2 IDE_DATA
121
IDE_controller_3 IDE_DATA
122
;--------------------------------------
123
cache_ide0  IDE_CACHE
124
cache_ide1  IDE_CACHE
125
cache_ide2  IDE_CACHE
126
cache_ide3  IDE_CACHE
127
cache_ide4  IDE_CACHE
128
cache_ide5  IDE_CACHE
129
cache_ide6  IDE_CACHE
130
cache_ide7  IDE_CACHE
131
cache_ide8  IDE_CACHE
132
cache_ide9  IDE_CACHE
133
cache_ide10 IDE_CACHE
134
cache_ide11 IDE_CACHE
135
;--------------------------------------
4772 mario79 136
IDE_device_1 rd 2
137
IDE_device_2 rd 2
138
IDE_device_3 rd 2
139
;--------------------------------------
4700 mario79 140
endg
6816 dunkaist 141
 
142
;--------------------------------------
143
; set Bus Master bit of Command PCI register
144
;--------------------------------------
145
set_pci_command_bus_master:
146
PCI_COMMAND_BUS_MASTER = 0x0004
147
        push    eax ecx
148
 
149
        mov     ecx, [ecx+IDE_DATA.pcidev]
150
        mov     ah, [ecx+PCIDEV.bus]
151
        mov     al, 1   ; word
152
        mov     bh, [ecx+PCIDEV.devfn]
153
        mov     bl, 0x4 ; Command register
154
        push    eax
155
        call    pci_read_reg
156
        mov     ecx, eax
157
        pop     eax
158
        test    ecx, PCI_COMMAND_BUS_MASTER     ; already set?
159
        jnz     @f
160
        or      ecx, PCI_COMMAND_BUS_MASTER
161
        call    pci_write_reg
162
@@:
163
        pop     ecx eax
164
        ret
165
 
4624 mario79 166
;-----------------------------------------------------------------------------
167
; START of initialisation IDE ATA code
168
;-----------------------------------------------------------------------------
4700 mario79 169
Init_IDE_ATA_controller:
170
        cmp     [ecx+IDE_DATA.ProgrammingInterface], 0
4720 mario79 171
        jne     @f
4624 mario79 172
 
4720 mario79 173
        ret
174
;--------------------------------------
175
@@:
4624 mario79 176
        mov     esi, boot_disabling_ide
177
        call    boot_log
178
;--------------------------------------
179
; Disable IDE interrupts, because the search
180
; for IDE partitions is in the PIO mode.
181
;--------------------------------------
182
.disable_IDE_interrupt:
183
; Disable interrupts in IDE controller for PIO
184
        mov     al, 2
4700 mario79 185
        mov     dx, [ecx+IDE_DATA.BAR1_val] ;0x3F4
4624 mario79 186
        add     dx, 2 ;0x3F6
187
        out     dx, al
4700 mario79 188
        mov     dx, [ecx+IDE_DATA.BAR3_val] ;0x374
4624 mario79 189
        add     dx, 2 ;0x376
190
        out     dx, al
4700 mario79 191
;-----------------------------------------------------------------------------
192
; set current ata bases
4624 mario79 193
@@:
4700 mario79 194
        mov     ax, [ecx+IDE_DATA.BAR0_val]
195
        mov     [StandardATABases], ax
196
        mov     ax, [ecx+IDE_DATA.BAR2_val]
197
        mov     [StandardATABases+2], ax
198
 
4624 mario79 199
        mov     esi, boot_detecthdcd
200
        call    boot_log
4720 mario79 201
;--------------------------------------
4625 mario79 202
include 'dev_hdcd.inc'
4720 mario79 203
;--------------------------------------
204
        ret
4624 mario79 205
;-----------------------------------------------------------------------------
4720 mario79 206
Init_IDE_ATA_controller_2:
207
        cmp     [ecx+IDE_DATA.ProgrammingInterface], 0
208
        jne     @f
209
 
210
        ret
211
;--------------------------------------
212
@@:
4700 mario79 213
        mov     dx, [ecx+IDE_DATA.RegsBaseAddres]
4624 mario79 214
; test whether it is our interrupt?
215
        add     dx, 2
216
        in      al, dx
217
        test    al, 100b
218
        jz      @f
219
; clear Bus Master IDE Status register
220
; clear Interrupt bit
221
        out     dx, al
4700 mario79 222
;--------------------------------------
4624 mario79 223
@@:
224
        add     dx, 8
225
; test whether it is our interrupt?
226
        in      al, dx
227
        test    al, 100b
228
        jz      @f
229
; clear Bus Master IDE Status register
230
; clear Interrupt bit
231
        out     dx, al
4700 mario79 232
;--------------------------------------
4624 mario79 233
@@:
234
; read status register and remove the interrupt request
4700 mario79 235
        mov     dx, [ecx+IDE_DATA.BAR0_val] ;0x1F0
4624 mario79 236
        add     dx, 0x7 ;0x1F7
237
        in      al, dx
4700 mario79 238
        mov     dx, [ecx+IDE_DATA.BAR2_val] ;0x170
4624 mario79 239
        add     dx, 0x7 ;0x177
240
        in      al, dx
241
;-----------------------------------------------------------------------------
4720 mario79 242
;        push    eax edx
243
;        mov     dx, [ecx+IDE_DATA.RegsBaseAddres]
244
;        xor     eax, eax
245
;        add     dx, 2
246
;        in      al, dx
4711 mario79 247
;        DEBUGF  1, "K : Primary Bus Master IDE Status Register %x\n", eax
4624 mario79 248
 
4720 mario79 249
;        add     dx, 8
250
;        in      al, dx
4711 mario79 251
;        DEBUGF  1, "K : Secondary Bus Master IDE Status Register %x\n", eax
4720 mario79 252
;        pop     edx eax
4624 mario79 253
 
4720 mario79 254
;        cmp     [ecx+IDE_DATA.RegsBaseAddres], 0
255
;        setnz   [ecx+IDE_DATA.dma_hdd]
4624 mario79 256
;-----------------------------------------------------------------------------
257
; set interrupts for IDE Controller
258
;-----------------------------------------------------------------------------
4838 mario79 259
        pushfd
260
        cli
4624 mario79 261
.enable_IDE_interrupt:
262
        mov     esi, boot_enabling_ide
263
        call    boot_log
264
; Enable interrupts in IDE controller for DMA
4700 mario79 265
        xor     ebx, ebx
266
        cmp     ecx, IDE_controller_2
267
        jne     @f
268
 
269
        add     ebx, 5
270
        jmp     .check_DRIVE_DATA
271
;--------------------------------------
272
@@:
273
        cmp     ecx, IDE_controller_3
274
        jne     .check_DRIVE_DATA
275
 
276
        add     ebx, 10
277
;--------------------------------------
278
.check_DRIVE_DATA:
4624 mario79 279
        mov     al, 0
4700 mario79 280
        mov     ah, [ebx+DRIVE_DATA+1]
4772 mario79 281
        test    ah, 10100000b ; check for ATAPI devices
4624 mario79 282
        jz      @f
4772 mario79 283
;--------------------------------------
284
.ch1_pio_set_ATAPI:
4624 mario79 285
        DEBUGF  1, "K : IDE CH1 PIO, because ATAPI drive present\n"
4772 mario79 286
        jmp     .ch1_pio_set_for_all
287
;--------------------------------------
288
.ch1_pio_set_no_devices:
289
        DEBUGF  1, "K : IDE CH1 PIO because no devices\n"
290
        jmp     .ch1_pio_set_for_all
291
;-------------------------------------
292
.ch1_pio_set:
293
        DEBUGF  1, "K : IDE CH1 PIO because device not support UDMA\n"
294
;-------------------------------------
295
.ch1_pio_set_for_all:
296
        mov     [ecx+IDE_DATA.dma_hdd_channel_1], al
4624 mario79 297
        jmp     .ch2_check
4700 mario79 298
;--------------------------------------
4624 mario79 299
@@:
4772 mario79 300
        xor     ebx, ebx
301
        call    calculate_IDE_device_values_storage
302
 
303
        test    ah, 1010000b
304
        jz      .ch1_pio_set_no_devices
305
 
306
        test    ah, 1000000b
307
        jz      @f
308
 
309
        cmp     [ebx+IDE_DEVICE.UDMA_possible_modes], al
310
        je      .ch1_pio_set
311
 
312
        cmp     [ebx+IDE_DEVICE.UDMA_set_mode], al
313
        je      .ch1_pio_set
314
;--------------------------------------
315
@@:
316
        test    ah, 10000b
317
        jz      @f
318
 
319
        add     ebx, 2
320
 
321
        cmp     [ebx+IDE_DEVICE.UDMA_possible_modes], al
322
        je      .ch1_pio_set
323
 
324
        cmp     [ebx+IDE_DEVICE.UDMA_set_mode], al
325
        je      .ch1_pio_set
326
;--------------------------------------
327
@@:
4700 mario79 328
        mov     dx, [ecx+IDE_DATA.BAR1_val] ;0x3F4
4624 mario79 329
        add     dx, 2 ;0x3F6
330
        out     dx, al
6816 dunkaist 331
        call    set_pci_command_bus_master
4624 mario79 332
        DEBUGF  1, "K : IDE CH1 DMA enabled\n"
4720 mario79 333
        mov     [ecx+IDE_DATA.dma_hdd_channel_1], byte 1
4700 mario79 334
;--------------------------------------
4624 mario79 335
.ch2_check:
4772 mario79 336
        test    ah, 1010b ; check for ATAPI devices
4624 mario79 337
        jz      @f
4772 mario79 338
;--------------------------------------
339
.ch2_pio_set_ATAPI:
4624 mario79 340
        DEBUGF  1, "K : IDE CH2 PIO, because ATAPI drive present\n"
4772 mario79 341
        jmp     .ch2_pio_set_for_all
342
;--------------------------------------
343
.ch2_pio_set_no_devices:
344
        DEBUGF  1, "K : IDE CH2 PIO because no devices\n"
345
        jmp     .ch2_pio_set_for_all
346
;--------------------------------------
347
.ch2_pio_set:
348
        DEBUGF  1, "K : IDE CH2 PIO because device not support UDMA\n"
349
;--------------------------------------
350
.ch2_pio_set_for_all:
351
        mov     [ecx+IDE_DATA.dma_hdd_channel_2], al
4838 mario79 352
        jmp     .set_interrupts_for_IDE_controllers
4700 mario79 353
;--------------------------------------
4624 mario79 354
@@:
4772 mario79 355
        mov     ebx, 4
356
        call    calculate_IDE_device_values_storage
357
 
358
        test    ah, 101b
359
        jz      .ch2_pio_set_no_devices
360
 
361
        test    ah, 100b
362
        jz      @f
363
 
364
        cmp     [ebx+IDE_DEVICE.UDMA_possible_modes], al
365
        je      .ch2_pio_set
366
 
367
        cmp     [ebx+IDE_DEVICE.UDMA_set_mode], al
368
        je      .ch2_pio_set
369
;--------------------------------------
370
@@:
371
        test    ah, 1b
372
        jz      @f
373
 
374
        add     ebx, 2
375
 
376
        cmp     [ebx+IDE_DEVICE.UDMA_possible_modes], al
377
        je      .ch2_pio_set
378
 
379
        cmp     [ebx+IDE_DEVICE.UDMA_set_mode], al
380
        je      .ch2_pio_set
381
;--------------------------------------
382
@@:
4700 mario79 383
        mov     dx, [ecx+IDE_DATA.BAR3_val] ;0x374
4624 mario79 384
        add     dx, 2 ;0x376
385
        out     dx, al
6816 dunkaist 386
        call    set_pci_command_bus_master
4624 mario79 387
        DEBUGF  1, "K : IDE CH2 DMA enabled\n"
4720 mario79 388
        mov     [ecx+IDE_DATA.dma_hdd_channel_2], byte 1
4624 mario79 389
;--------------------------------------
4838 mario79 390
.set_interrupts_for_IDE_controllers:
391
        mov     esi, boot_set_int_IDE
392
        call    boot_log
393
;--------------------------------------
394
        mov     eax, [ecx+IDE_DATA.ProgrammingInterface]
5147 mario79 395
;        cmp     ax, 0x0180
396
;        je      .pata_ide
4838 mario79 397
 
5147 mario79 398
;        cmp     ax, 0x018a
399
;        jne     .sata_ide
400
 
401
        test    al, 1 ; 0 - legacy PCI mode, 1 - native PCI mode
402
        jnz     .sata_ide
4838 mario79 403
;--------------------------------------
404
.pata_ide:
405
        cmp     [ecx+IDE_DATA.RegsBaseAddres], 0
406
        je      .end_set_interrupts
407
 
408
        push    ecx
6015 clevermous 409
        stdcall attach_int_handler, 14, IDE_irq_14_handler, ecx
410
        pop     ecx
4838 mario79 411
        DEBUGF  1, "K : Set IDE IRQ14 return code %x\n", eax
6015 clevermous 412
        push    ecx
413
        stdcall attach_int_handler, 15, IDE_irq_15_handler, ecx
4838 mario79 414
        DEBUGF  1, "K : Set IDE IRQ15 return code %x\n", eax
415
        pop     ecx
416
 
417
        jmp     .end_set_interrupts
418
;--------------------------------------
419
.sata_ide:
5147 mario79 420
;        cmp     ax, 0x0185
421
;        je      .sata_ide_1
4838 mario79 422
 
5147 mario79 423
;        cmp     ax, 0x018f
424
;        jne     .end_set_interrupts
4838 mario79 425
;--------------------------------------
5147 mario79 426
;.sata_ide_1:
4838 mario79 427
; Some weird controllers generate an interrupt even if IDE interrupts
428
; are disabled and no IDE devices. For example, notebook ASUS K72F -
429
; IDE controller 010185 generates false interrupt when we work with
430
; the IDE controller 01018f. For this reason, the interrupt handler
431
; does not need to be installed if both channel IDE controller
432
; running in PIO mode.
6015 clevermous 433
 
434
; ...unfortunately, PCI interrupt can be shared with other devices
435
; which could enable it without consulting IDE code.
436
; So install the handler anyways and try to process
437
; even those interrupts which we are not expecting.
4838 mario79 438
        cmp     [ecx+IDE_DATA.RegsBaseAddres], 0
439
        je      .end_set_interrupts
440
 
441
        mov     ax, [ecx+IDE_DATA.Interrupt]
442
        movzx   eax, al
443
        push    ecx
6015 clevermous 444
        stdcall attach_int_handler, eax, IDE_common_irq_handler, ecx
4838 mario79 445
        pop     ecx
446
        DEBUGF  1, "K : Set IDE IRQ%d return code %x\n", [ecx+IDE_DATA.Interrupt]:1, eax
447
;--------------------------------------
4624 mario79 448
.end_set_interrupts:
4838 mario79 449
        popfd
4700 mario79 450
        ret
4624 mario79 451
;-----------------------------------------------------------------------------
452
; END of initialisation IDE ATA code
453
;-----------------------------------------------------------------------------
4700 mario79 454
find_IDE_controller_done:
455
        mov     ecx, IDE_controller_1
456
        mov     [IDE_controller_pointer], ecx
457
        call    Init_IDE_ATA_controller
458
        mov     ecx, IDE_controller_2
459
        mov     [IDE_controller_pointer], ecx
460
        call    Init_IDE_ATA_controller
461
        mov     ecx, IDE_controller_3
462
        mov     [IDE_controller_pointer], ecx
463
        call    Init_IDE_ATA_controller
464
;-----------------------------------------------------------------------------
465
        mov     esi, boot_getcache
466
        call    boot_log
467
include 'getcache.inc'
468
;-----------------------------------------------------------------------------
469
        mov     esi, boot_detectpart
470
        call    boot_log
471
include 'sear_par.inc'
472
;-----------------------------------------------------------------------------
4772 mario79 473
        mov     esi, boot_init_sys
474
        call    boot_log
475
        call    Parser_params
476
 
477
if ~ defined extended_primary_loader
478
; ramdisk image should be loaded by extended primary loader if it exists
479
; READ RAMDISK IMAGE FROM HD
480
include '../boot/rdload.inc'
481
end if
482
;-----------------------------------------------------------------------------
4720 mario79 483
        mov     ecx, IDE_controller_1
484
        mov     [IDE_controller_pointer], ecx
485
        call    Init_IDE_ATA_controller_2
486
        mov     ecx, IDE_controller_2
487
        mov     [IDE_controller_pointer], ecx
488
        call    Init_IDE_ATA_controller_2
489
        mov     ecx, IDE_controller_3
490
        mov     [IDE_controller_pointer], ecx
491
        call    Init_IDE_ATA_controller_2
492
;-----------------------------------------------------------------------------