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Rev | Author | Line No. | Line |
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4624 | mario79 | 1 | ;----------------------------------------------------------------------------- |
2 | ; find the IDE controller in the device list |
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3 | ;----------------------------------------------------------------------------- |
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4 | mov esi, pcidev_list |
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5 | .loop: |
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6 | mov esi, [esi+PCIDEV.fd] |
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7 | cmp esi, pcidev_list |
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8 | jz .done |
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9 | mov eax, [esi+PCIDEV.class] |
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10 | shr eax, 4 |
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11 | cmp eax, 0x01018 |
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12 | jnz .loop |
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13 | .found: |
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14 | mov eax, [esi+PCIDEV.class] |
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15 | DEBUGF 1, 'K : IDE controller programming interface %x\n', eax |
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16 | mov [IDEContrProgrammingInterface], eax |
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17 | |||
18 | mov ah, [esi+PCIDEV.bus] |
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19 | mov al, 2 |
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20 | mov bh, [esi+PCIDEV.devfn] |
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21 | ;----------------------------------------------------------------------------- |
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22 | mov bl, 0x10 |
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23 | push eax |
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24 | call pci_read_reg |
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25 | and eax, 0xFFFC |
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26 | cmp ax, 0 |
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27 | je @f |
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28 | cmp ax, 1 |
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29 | jne .show_BAR0 |
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30 | @@: |
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31 | mov ax, 0x1F0 |
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32 | .show_BAR0: |
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33 | DEBUGF 1, 'K : BAR0 IDE base addr %x\n', ax |
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34 | mov [StandardATABases], ax |
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35 | mov [hd_address_table], eax |
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36 | mov [hd_address_table+8], eax |
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37 | mov [IDE_BAR0_val], ax |
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38 | pop eax |
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39 | ;----------------------------------------------------------------------------- |
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40 | mov bl, 0x14 |
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41 | push eax |
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42 | call pci_read_reg |
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43 | and eax, 0xFFFC |
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44 | cmp ax, 0 |
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45 | je @f |
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46 | cmp ax, 1 |
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47 | jne .show_BAR1 |
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48 | @@: |
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49 | mov ax, 0x3F4 |
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50 | .show_BAR1: |
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51 | DEBUGF 1, 'K : BAR1 IDE base addr %x\n', ax |
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52 | mov [IDE_BAR1_val], ax |
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53 | pop eax |
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54 | ;----------------------------------------------------------------------------- |
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55 | mov bl, 0x18 |
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56 | push eax |
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57 | call pci_read_reg |
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58 | and eax, 0xFFFC |
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59 | cmp ax, 0 |
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60 | je @f |
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61 | cmp ax, 1 |
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62 | jne .show_BAR2 |
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63 | @@: |
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64 | mov ax, 0x170 |
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65 | .show_BAR2: |
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66 | DEBUGF 1, 'K : BAR2 IDE base addr %x\n', ax |
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67 | mov [StandardATABases+2], ax |
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68 | mov [hd_address_table+16], eax |
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69 | mov [hd_address_table+24], eax |
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70 | mov [IDE_BAR2_val], ax |
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71 | pop eax |
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72 | ;----------------------------------------------------------------------------- |
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73 | mov bl, 0x1C |
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74 | push eax |
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75 | call pci_read_reg |
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76 | and eax, 0xFFFC |
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77 | cmp ax, 0 |
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78 | je @f |
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79 | cmp ax, 1 |
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80 | jne .show_BAR3 |
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81 | @@: |
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82 | mov ax, 0x374 |
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83 | .show_BAR3: |
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84 | DEBUGF 1, 'K : BAR3 IDE base addr %x\n', ax |
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85 | mov [IDE_BAR3_val], ax |
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86 | pop eax |
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87 | ;----------------------------------------------------------------------------- |
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88 | mov bl, 0x20 |
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89 | push eax |
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90 | call pci_read_reg |
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91 | and eax, 0xFFFC |
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92 | DEBUGF 1, 'K : BAR4 IDE controller register base addr %x\n', ax |
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93 | mov [IDEContrRegsBaseAddr], ax |
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94 | pop eax |
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95 | ;----------------------------------------------------------------------------- |
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96 | mov bl, 0x3C |
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97 | push eax |
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98 | call pci_read_reg |
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99 | and eax, 0xFF |
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100 | DEBUGF 1, 'K : IDE Interrupt %x\n', al |
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101 | mov [IDE_Interrupt], ax |
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102 | pop eax |
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103 | ;----------------------------------------------------------------------------- |
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104 | .done: |
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105 | ;----------------------------------------------------------------------------- |
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106 | ; START of initialisation IDE ATA code |
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107 | ;----------------------------------------------------------------------------- |
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108 | cmp [IDEContrProgrammingInterface], 0 |
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109 | je set_interrupts_for_IDE_controllers.continue |
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110 | |||
111 | mov esi, boot_disabling_ide |
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112 | call boot_log |
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113 | ;-------------------------------------- |
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114 | ; Disable IDE interrupts, because the search |
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115 | ; for IDE partitions is in the PIO mode. |
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116 | ;-------------------------------------- |
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117 | .disable_IDE_interrupt: |
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118 | ; Disable interrupts in IDE controller for PIO |
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119 | mov al, 2 |
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120 | mov dx, [IDE_BAR1_val] ;0x3F4 |
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121 | add dx, 2 ;0x3F6 |
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122 | out dx, al |
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123 | mov dx, [IDE_BAR3_val] ;0x374 |
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124 | add dx, 2 ;0x376 |
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125 | out dx, al |
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126 | @@: |
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127 | ; show base variables of IDE controller |
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128 | ; DEBUGF 1, "K : BAR0 %x \n", [IDE_BAR0_val]:4 |
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129 | ; DEBUGF 1, "K : BAR1 %x \n", [IDE_BAR1_val]:4 |
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130 | ; DEBUGF 1, "K : BAR2 %x \n", [IDE_BAR2_val]:4 |
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131 | ; DEBUGF 1, "K : BAR3 %x \n", [IDE_BAR3_val]:4 |
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132 | ; DEBUGF 1, "K : BAR4 %x \n", [IDEContrRegsBaseAddr]:4 |
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133 | ; DEBUGF 1, "K : IDEContrProgrammingInterface %x \n", [IDEContrProgrammingInterface]:4 |
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134 | ; DEBUGF 1, "K : IDE_Interrupt %x \n", [IDE_Interrupt]:4 |
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135 | ;----------------------------------------------------------------------------- |
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136 | mov esi, boot_detecthdcd |
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137 | call boot_log |
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4625 | mario79 | 138 | include 'dev_hdcd.inc' |
4624 | mario79 | 139 | mov esi, boot_getcache |
140 | call boot_log |
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4625 | mario79 | 141 | include 'getcache.inc' |
4624 | mario79 | 142 | mov esi, boot_detectpart |
143 | call boot_log |
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4625 | mario79 | 144 | include 'sear_par.inc' |
4624 | mario79 | 145 | ;----------------------------------------------------------------------------- |
146 | mov dx, [IDEContrRegsBaseAddr] |
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147 | ; test whether it is our interrupt? |
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148 | add dx, 2 |
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149 | in al, dx |
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150 | test al, 100b |
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151 | jz @f |
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152 | ; clear Bus Master IDE Status register |
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153 | ; clear Interrupt bit |
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154 | out dx, al |
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155 | @@: |
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156 | add dx, 8 |
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157 | ; test whether it is our interrupt? |
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158 | in al, dx |
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159 | test al, 100b |
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160 | jz @f |
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161 | ; clear Bus Master IDE Status register |
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162 | ; clear Interrupt bit |
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163 | out dx, al |
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164 | @@: |
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165 | ; read status register and remove the interrupt request |
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166 | mov dx, [IDE_BAR0_val] ;0x1F0 |
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167 | add dx, 0x7 ;0x1F7 |
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168 | in al, dx |
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169 | mov dx, [IDE_BAR2_val] ;0x170 |
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170 | add dx, 0x7 ;0x177 |
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171 | in al, dx |
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172 | ;----------------------------------------------------------------------------- |
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173 | push eax edx |
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174 | mov dx, [IDEContrRegsBaseAddr] |
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175 | xor eax, eax |
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176 | add dx, 2 |
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177 | in al, dx |
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178 | DEBUGF 1, "K : Primary Bus Master IDE Status Register %x\n", eax |
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179 | |||
180 | add dx, 8 |
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181 | in al, dx |
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182 | DEBUGF 1, "K : Secondary Bus Master IDE Status Register %x\n", eax |
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183 | pop edx eax |
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184 | |||
185 | cmp [IDEContrRegsBaseAddr], 0 |
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186 | setnz [dma_hdd] |
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187 | ;----------------------------------------------------------------------------- |
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188 | ; set interrupts for IDE Controller |
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189 | ;----------------------------------------------------------------------------- |
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190 | mov esi, boot_set_int_IDE |
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191 | call boot_log |
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192 | set_interrupts_for_IDE_controllers: |
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193 | mov eax, [IDEContrProgrammingInterface] |
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194 | cmp ax, 0x0180 |
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195 | je .pata_ide |
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196 | |||
197 | cmp ax, 0x018a |
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198 | jne .sata_ide |
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199 | ;-------------------------------------- |
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200 | .pata_ide: |
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201 | cmp [IDEContrRegsBaseAddr], 0 |
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202 | je .end_set_interrupts |
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203 | |||
204 | stdcall attach_int_handler, 14, IDE_irq_14_handler, 0 |
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205 | DEBUGF 1, "K : Set IDE IRQ14 return code %x\n", eax |
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206 | stdcall attach_int_handler, 15, IDE_irq_15_handler, 0 |
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207 | DEBUGF 1, "K : Set IDE IRQ15 return code %x\n", eax |
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208 | jmp .enable_IDE_interrupt |
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209 | ;-------------------------------------- |
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210 | .sata_ide: |
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211 | cmp ax, 0x0185 |
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212 | je .sata_ide_1 |
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213 | |||
214 | cmp ax, 0x018f |
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215 | jne .end_set_interrupts |
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216 | ;-------------------------------------- |
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217 | .sata_ide_1: |
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218 | cmp [IDEContrRegsBaseAddr], 0 |
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219 | je .end_set_interrupts |
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220 | |||
221 | mov ax, [IDE_Interrupt] |
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222 | movzx eax, al |
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223 | stdcall attach_int_handler, eax, IDE_common_irq_handler, 0 |
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224 | DEBUGF 1, "K : Set IDE IRQ%d return code %x\n", [IDE_Interrupt]:1, eax |
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225 | ;-------------------------------------- |
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226 | .enable_IDE_interrupt: |
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227 | mov esi, boot_enabling_ide |
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228 | call boot_log |
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229 | ; Enable interrupts in IDE controller for DMA |
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230 | mov al, 0 |
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231 | mov ah, [DRIVE_DATA+1] |
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232 | test ah, 10100000b |
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233 | jz @f |
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234 | |||
235 | DEBUGF 1, "K : IDE CH1 PIO, because ATAPI drive present\n" |
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236 | jmp .ch2_check |
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237 | @@: |
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238 | mov dx, [IDE_BAR1_val] ;0x3F4 |
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239 | add dx, 2 ;0x3F6 |
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240 | out dx, al |
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241 | DEBUGF 1, "K : IDE CH1 DMA enabled\n" |
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242 | .ch2_check: |
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243 | test ah, 1010b |
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244 | jz @f |
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245 | |||
246 | DEBUGF 1, "K : IDE CH2 PIO, because ATAPI drive present\n" |
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247 | jmp .end_set_interrupts |
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248 | @@: |
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249 | mov dx, [IDE_BAR3_val] ;0x374 |
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250 | add dx, 2 ;0x376 |
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251 | out dx, al |
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252 | DEBUGF 1, "K : IDE CH2 DMA enabled\n" |
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253 | ;-------------------------------------- |
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254 | .end_set_interrupts: |
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255 | ;----------------------------------------------------------------------------- |
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256 | cmp [dma_hdd], 0 |
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257 | je .print_pio |
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258 | .print_dma: |
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259 | DEBUGF 1, "K : IDE DMA mode\n" |
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260 | jmp .continue |
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261 | |||
262 | .print_pio: |
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263 | DEBUGF 1, "K : IDE PIO mode\n" |
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264 | .continue: |
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265 | ;----------------------------------------------------------------------------- |
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266 | ; END of initialisation IDE ATA code |
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267 | ;----------------------------------------------------------------------------- |