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425 | victor | 1 | $Revision: 431 $ |
431 | serge | 2 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
3 | ;; ;; |
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4 | ;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;; |
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5 | ;; Distributed under terms of the GNU General Public License ;; |
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6 | ;; ;; |
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7 | ;; ;; |
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8 | ;; PCI32.INC ;; |
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9 | ;; ;; |
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10 | ;; 32 bit PCI driver code ;; |
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11 | ;; ;; |
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12 | ;; Version 0.2 December 21st, 2002 ;; |
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13 | ;; ;; |
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14 | ;; Author: Victor Prodan, victorprodan@yahoo.com ;; |
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15 | ;; Credits: ;; |
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16 | ;; Ralf Brown ;; |
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17 | ;; Mike Hibbett, mikeh@oceanfree.net ;; |
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18 | ;; ;; |
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19 | ;; See file COPYING for details ;; |
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20 | ;; ;; |
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21 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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1 | ha | 22 | |
23 | |||
24 | ;*************************************************************************** |
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25 | ; Function |
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26 | ; pci_api: |
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27 | ; |
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28 | ; Description |
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29 | ; entry point for system PCI calls |
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30 | ;*************************************************************************** |
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31 | |||
32 | align 4 |
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33 | |||
34 | pci_api: |
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35 | |||
36 | cmp [pci_access_enabled],1 |
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37 | jne no_pci_access_for_applications |
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38 | |||
39 | or al,al |
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40 | jnz pci_fn_1 |
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41 | ; PCI function 0: get pci version (AH.AL) |
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42 | movzx eax,word [0x2F0000+0x9022] |
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43 | ret |
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44 | |||
45 | pci_fn_1: |
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46 | cmp al,1 |
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47 | jnz pci_fn_2 |
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48 | |||
49 | ; PCI function 1: get last bus in AL |
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50 | mov al,[0x2F0000+0x9021] |
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51 | ret |
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52 | |||
53 | pci_fn_2: |
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54 | cmp al,2 |
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55 | jne pci_fn_3 |
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56 | ; PCI function 2: get pci access mechanism |
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57 | mov al,[0x2F0000+0x9020] |
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58 | ret |
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59 | pci_fn_3: |
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60 | |||
61 | cmp al,4 |
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62 | jz pci_read_reg ;byte |
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63 | cmp al,5 |
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64 | jz pci_read_reg ;word |
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65 | cmp al,6 |
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66 | jz pci_read_reg ;dword |
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67 | |||
68 | cmp al,8 |
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69 | jz pci_write_reg ;byte |
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70 | cmp al,9 |
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71 | jz pci_write_reg ;word |
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72 | cmp al,10 |
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73 | jz pci_write_reg ;dword |
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74 | |||
75 | no_pci_access_for_applications: |
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76 | |||
77 | mov eax,-1 |
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78 | |||
79 | ret |
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80 | |||
81 | ;*************************************************************************** |
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82 | ; Function |
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83 | ; pci_make_config_cmd |
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84 | ; |
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85 | ; Description |
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86 | ; creates a command dword for use with the PCI bus |
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87 | ; bus # in ah |
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88 | ; device+func in bh (dddddfff) |
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89 | ; register in bl |
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90 | ; |
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91 | ; command dword returned in eax ( 10000000 bbbbbbbb dddddfff rrrrrr00 ) |
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92 | ;*************************************************************************** |
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93 | |||
94 | align 4 |
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95 | |||
96 | pci_make_config_cmd: |
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97 | shl eax,8 ; move bus to bits 16-23 |
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98 | mov ax,bx ; combine all |
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99 | and eax,0xffffff |
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100 | or eax,0x80000000 |
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101 | ret |
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102 | |||
103 | ;*************************************************************************** |
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104 | ; Function |
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105 | ; pci_read_reg: |
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106 | ; |
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107 | ; Description |
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108 | ; read a register from the PCI config space into EAX/AX/AL |
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109 | ; IN: ah=bus,device+func=bh,register address=bl |
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110 | ; number of bytes to read (1,2,4) coded into AL, bits 0-1 |
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111 | ;*************************************************************************** |
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112 | |||
113 | align 4 |
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114 | |||
115 | pci_read_reg: |
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116 | cmp byte [0x2F0000+0x9020],2 ;what mechanism will we use? |
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117 | je pci_read_reg_2 |
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118 | |||
119 | ; mechanism 1 |
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120 | push esi ; save register size into ESI |
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121 | mov esi,eax |
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122 | and esi,3 |
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123 | |||
124 | call pci_make_config_cmd |
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125 | mov ebx,eax |
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126 | ; get current state |
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127 | mov dx,0xcf8 |
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128 | in eax, dx |
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129 | push eax |
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130 | ; set up addressing to config data |
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131 | mov eax,ebx |
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132 | and al,0xfc ; make address dword-aligned |
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133 | out dx,eax |
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134 | ; get requested DWORD of config data |
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135 | mov dl,0xfc |
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136 | and bl,3 |
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137 | or dl,bl ; add to port address first 2 bits of register address |
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138 | |||
139 | or esi,esi |
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140 | jz pci_read_byte1 |
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141 | cmp esi,1 |
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142 | jz pci_read_word1 |
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143 | cmp esi,2 |
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144 | jz pci_read_dword1 |
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145 | jmp pci_fin_read1 |
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146 | |||
147 | pci_read_byte1: |
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148 | in al,dx |
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149 | jmp pci_fin_read1 |
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150 | pci_read_word1: |
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151 | in ax,dx |
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152 | jmp pci_fin_read1 |
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153 | pci_read_dword1: |
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154 | in eax,dx |
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155 | jmp pci_fin_read1 |
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156 | pci_fin_read1: |
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157 | ; restore configuration control |
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158 | xchg eax,[esp] |
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159 | mov dx,0xcf8 |
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160 | out dx,eax |
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161 | |||
162 | pop eax |
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163 | pop esi |
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164 | ret |
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165 | pci_read_reg_2: |
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166 | |||
167 | test bh,128 ;mech#2 only supports 16 devices per bus |
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168 | jnz pci_read_reg_err |
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169 | |||
170 | push esi ; save register size into ESI |
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171 | mov esi,eax |
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172 | and esi,3 |
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173 | |||
174 | push eax |
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175 | ;store current state of config space |
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176 | mov dx,0xcf8 |
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177 | in al,dx |
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178 | mov ah,al |
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179 | mov dl,0xfa |
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180 | in al,dx |
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181 | |||
182 | xchg eax,[esp] |
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183 | ; out 0xcfa,bus |
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184 | mov al,ah |
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185 | out dx,al |
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186 | ; out 0xcf8,0x80 |
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187 | mov dl,0xf8 |
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188 | mov al,0x80 |
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189 | out dx,al |
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190 | ; compute addr |
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191 | shr bh,3 ; func is ignored in mechanism 2 |
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192 | or bh,0xc0 |
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193 | mov dx,bx |
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194 | |||
195 | or esi,esi |
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196 | jz pci_read_byte2 |
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197 | cmp esi,1 |
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198 | jz pci_read_word2 |
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199 | cmp esi,2 |
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200 | jz pci_read_dword2 |
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201 | jmp pci_fin_read2 |
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202 | |||
203 | pci_read_byte2: |
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204 | in al,dx |
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205 | jmp pci_fin_read2 |
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206 | pci_read_word2: |
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207 | in ax,dx |
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208 | jmp pci_fin_read2 |
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209 | pci_read_dword2: |
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210 | in eax,dx |
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211 | ; jmp pci_fin_read2 |
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212 | pci_fin_read2: |
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213 | |||
214 | ; restore configuration space |
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215 | xchg eax,[esp] |
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216 | mov dx,0xcfa |
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217 | out dx,al |
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218 | mov dl,0xf8 |
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219 | mov al,ah |
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220 | out dx,al |
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221 | |||
222 | pop eax |
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223 | pop esi |
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224 | ret |
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225 | |||
226 | pci_read_reg_err: |
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227 | xor eax,eax |
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228 | dec eax |
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229 | ret |
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230 | |||
231 | |||
232 | ;*************************************************************************** |
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233 | ; Function |
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234 | ; pci_write_reg: |
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235 | ; |
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236 | ; Description |
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237 | ; write a register from ECX/CX/CL into the PCI config space |
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238 | ; IN: ah=bus,device+func=bh,register address (dword aligned)=bl, |
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239 | ; value to write in ecx |
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240 | ; number of bytes to write (1,2,4) coded into AL, bits 0-1 |
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241 | ;*************************************************************************** |
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242 | |||
243 | align 4 |
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244 | |||
245 | pci_write_reg: |
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246 | cmp byte [0x2F0000+0x9020],2 ;what mechanism will we use? |
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247 | je pci_write_reg_2 |
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248 | |||
249 | ; mechanism 1 |
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250 | push esi ; save register size into ESI |
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251 | mov esi,eax |
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252 | and esi,3 |
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253 | |||
254 | call pci_make_config_cmd |
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255 | mov ebx,eax |
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256 | ; get current state into ecx |
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257 | mov dx,0xcf8 |
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258 | in eax, dx |
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259 | push eax |
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260 | ; set up addressing to config data |
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261 | mov eax,ebx |
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262 | and al,0xfc ; make address dword-aligned |
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263 | out dx,eax |
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264 | ; write DWORD of config data |
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265 | mov dl,0xfc |
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266 | and bl,3 |
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267 | or dl,bl |
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268 | mov eax,ecx |
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269 | |||
270 | or esi,esi |
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271 | jz pci_write_byte1 |
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272 | cmp esi,1 |
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273 | jz pci_write_word1 |
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274 | cmp esi,2 |
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275 | jz pci_write_dword1 |
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276 | jmp pci_fin_write1 |
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277 | |||
278 | pci_write_byte1: |
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279 | out dx,al |
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280 | jmp pci_fin_write1 |
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281 | pci_write_word1: |
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282 | out dx,ax |
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283 | jmp pci_fin_write1 |
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284 | pci_write_dword1: |
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285 | out dx,eax |
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286 | jmp pci_fin_write1 |
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287 | pci_fin_write1: |
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288 | |||
289 | ; restore configuration control |
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290 | pop eax |
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291 | mov dl,0xf8 |
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292 | out dx,eax |
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293 | |||
294 | xor eax,eax |
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295 | pop esi |
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296 | |||
297 | ret |
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298 | pci_write_reg_2: |
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299 | |||
300 | test bh,128 ;mech#2 only supports 16 devices per bus |
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301 | jnz pci_write_reg_err |
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302 | |||
303 | |||
304 | push esi ; save register size into ESI |
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305 | mov esi,eax |
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306 | and esi,3 |
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307 | |||
308 | push eax |
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309 | ;store current state of config space |
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310 | mov dx,0xcf8 |
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311 | in al,dx |
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312 | mov ah,al |
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313 | mov dl,0xfa |
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314 | in al,dx |
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315 | xchg eax,[esp] |
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316 | ; out 0xcfa,bus |
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317 | mov al,ah |
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318 | out dx,al |
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319 | ; out 0xcf8,0x80 |
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320 | mov dl,0xf8 |
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321 | mov al,0x80 |
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322 | out dx,al |
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323 | ; compute addr |
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324 | shr bh,3 ; func is ignored in mechanism 2 |
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325 | or bh,0xc0 |
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326 | mov dx,bx |
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327 | ; write register |
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328 | mov eax,ecx |
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329 | |||
330 | or esi,esi |
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331 | jz pci_write_byte2 |
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332 | cmp esi,1 |
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333 | jz pci_write_word2 |
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334 | cmp esi,2 |
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335 | jz pci_write_dword2 |
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336 | jmp pci_fin_write2 |
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337 | |||
338 | pci_write_byte2: |
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339 | out dx,al |
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340 | jmp pci_fin_write2 |
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341 | pci_write_word2: |
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342 | out dx,ax |
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343 | jmp pci_fin_write2 |
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344 | pci_write_dword2: |
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345 | out dx,eax |
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346 | jmp pci_fin_write2 |
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347 | pci_fin_write2: |
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348 | ; restore configuration space |
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349 | pop eax |
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350 | mov dx,0xcfa |
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351 | out dx,al |
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352 | mov dl,0xf8 |
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353 | mov al,ah |
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354 | out dx,al |
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355 | |||
356 | xor eax,eax |
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357 | pop esi |
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358 | ret |
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359 | |||
360 | pci_write_reg_err: |
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361 | xor eax,eax |
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362 | dec eax |
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363 | ret |