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Rev | Author | Line No. | Line |
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431 | serge | 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
586 | serge | 2 | ;; ;; |
1591 | lrz | 3 | ;; Copyright (C) KolibriOS team 2004-2010. All rights reserved. ;; |
431 | serge | 4 | ;; Distributed under terms of the GNU General Public License ;; |
5 | ;; ;; |
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6 | ;; ;; |
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586 | serge | 7 | ;; PCI32.INC ;; |
8 | ;; ;; |
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9 | ;; 32 bit PCI driver code ;; |
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10 | ;; ;; |
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11 | ;; Version 0.3 April 9, 2007 ;; |
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12 | ;; Version 0.2 December 21st, 2002 ;; |
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13 | ;; ;; |
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14 | ;; Author: Victor Prodan, victorprodan@yahoo.com ;; |
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15 | ;; Mihailov Ilia, ghost.nsk@gmail.com ;; |
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16 | ;; Credits: ;; |
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17 | ;; Ralf Brown ;; |
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18 | ;; Mike Hibbett, mikeh@oceanfree.net ;; |
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19 | ;; ;; |
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20 | ;; See file COPYING for details ;; |
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21 | ;; ;; |
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431 | serge | 22 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
1 | ha | 23 | |
750 | victor | 24 | $Revision: 1591 $ |
1 | ha | 25 | |
26 | ;*************************************************************************** |
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27 | ; Function |
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28 | ; pci_api: |
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29 | ; |
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30 | ; Description |
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31 | ; entry point for system PCI calls |
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32 | ;*************************************************************************** |
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1370 | art_zh | 33 | ;mmio_pci_addr equ 0x400 ; set actual PCI address here to activate user-MMIO |
1 | ha | 34 | |
1591 | lrz | 35 | iglobal |
36 | align 4 |
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37 | f62call: |
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38 | dd pci_api.0 |
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39 | dd pci_api.1 |
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40 | dd pci_api.2 |
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41 | dd pci_api.not_support ;3 |
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42 | dd pci_read_reg ;4 byte |
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43 | dd pci_read_reg ;5 word |
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44 | dd pci_read_reg ;6 dword |
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45 | dd pci_api.not_support ;7 |
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46 | dd pci_write_reg ;8 byte |
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47 | dd pci_write_reg ;9 word |
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48 | dd pci_write_reg ;10 dword |
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49 | if defined mmio_pci_addr |
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50 | dd pci_mmio_init ;11 |
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51 | dd pci_mmio_map ;12 |
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52 | dd pci_mmio_unmap ;13 |
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53 | end if |
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54 | f62_rcall: |
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55 | dd pci_read_reg.0 ;4 byte |
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56 | dd pci_read_reg.1 ;5 word |
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57 | dd pci_read_reg.2 ;6 dword |
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58 | f62_rcall2: |
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59 | dd pci_read_reg_2.0 ;4 byte |
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60 | dd pci_read_reg_2.1 ;5 word |
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61 | dd pci_read_reg_2.2 ;6 dword |
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62 | f62_wcall: |
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63 | dd pci_write_reg.0 ;4 byte |
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64 | dd pci_write_reg.1 ;5 word |
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65 | dd pci_write_reg.2 ;6 dword |
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66 | f62_wcall2: |
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67 | dd pci_write_reg_2.0 ;4 byte |
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68 | dd pci_write_reg_2.1 ;5 word |
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69 | dd pci_write_reg_2.2 ;6 dword |
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70 | endg |
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1370 | art_zh | 71 | |
1591 | lrz | 72 | |
1 | ha | 73 | align 4 |
74 | pci_api: |
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1591 | lrz | 75 | movzx eax,bl |
1348 | art_zh | 76 | cmp [pci_access_enabled],1 |
1591 | lrz | 77 | jne .no_pci_access_for_applications |
1 | ha | 78 | |
1591 | lrz | 79 | if defined mmio_pci_addr |
80 | cmp eax, 13 |
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81 | jb .not_support |
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82 | else |
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83 | cmp eax, 10 |
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84 | jb .not_support |
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85 | end if |
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86 | call dword [f62call+eax*4] |
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87 | mov dword [esp+32],eax |
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88 | ret |
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89 | |||
90 | |||
91 | |||
92 | ; or al,al |
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93 | ; jnz pci_fn_1 |
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1348 | art_zh | 94 | ; PCI function 0: get pci version (AH.AL) |
1591 | lrz | 95 | .0: |
96 | movzx eax, word [BOOT_VAR+0x9022] |
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1348 | art_zh | 97 | ret |
1 | ha | 98 | |
1591 | lrz | 99 | ;pci_fn_1: |
100 | ; cmp al,1 |
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101 | ; jnz pci_fn_2 |
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1 | ha | 102 | |
1348 | art_zh | 103 | ; PCI function 1: get last bus in AL |
1591 | lrz | 104 | .1: |
105 | movzx eax, byte [BOOT_VAR+0x9021] |
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1348 | art_zh | 106 | ret |
1 | ha | 107 | |
1591 | lrz | 108 | ;pci_fn_2: |
109 | ; cmp al,2 |
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110 | ; jne pci_fn_3 |
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1348 | art_zh | 111 | ; PCI function 2: get pci access mechanism |
1591 | lrz | 112 | .2: |
113 | movzx eax, byte [BOOT_VAR+0x9020] |
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1348 | art_zh | 114 | ret |
1591 | lrz | 115 | ;pci_fn_3: |
1 | ha | 116 | |
1591 | lrz | 117 | ; cmp al,4 |
118 | ; jz pci_read_reg ;byte |
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119 | ; cmp al,5 |
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120 | ; jz pci_read_reg ;word |
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121 | ; cmp al,6 |
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122 | ; jz pci_read_reg ;dword |
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1 | ha | 123 | |
1591 | lrz | 124 | ; cmp al,8 |
125 | ; jz pci_write_reg ;byte |
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126 | ; cmp al,9 |
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127 | ; jz pci_write_reg ;word |
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128 | ; cmp al,10 |
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129 | ; jz pci_write_reg ;dword |
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1 | ha | 130 | |
1591 | lrz | 131 | ;if defined mmio_pci_addr |
132 | ; cmp al,11 ; user-level MMIO functions |
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133 | ; jz pci_mmio_init |
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134 | ; cmp al,12 |
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135 | ; jz pci_mmio_map |
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136 | ; cmp al,13 |
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137 | ; jz pci_mmio_unmap |
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138 | ;end if |
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1348 | art_zh | 139 | |
1591 | lrz | 140 | .not_support: |
141 | .no_pci_access_for_applications: |
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142 | or eax,-1 |
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1348 | art_zh | 143 | ret |
1 | ha | 144 | |
145 | ;*************************************************************************** |
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146 | ; Function |
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147 | ; pci_make_config_cmd |
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148 | ; |
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149 | ; Description |
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150 | ; creates a command dword for use with the PCI bus |
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1591 | lrz | 151 | ; bus # in bh;ah |
152 | ; device+func in ch;bh (dddddfff) |
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153 | ; register in cl;bl |
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1 | ha | 154 | ; |
1591 | lrz | 155 | ; command dword returned in ebx;eax ( 10000000 bbbbbbbb dddddfff rrrrrr00 ) |
1 | ha | 156 | ;*************************************************************************** |
157 | |||
158 | align 4 |
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159 | |||
160 | pci_make_config_cmd: |
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1591 | lrz | 161 | shl ebx,8;eax,8 ; move bus to bits 16-23 |
162 | mov bx,cx;ax,bx ; combine all |
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163 | and ebx,0xffffff;eax,0xffffff |
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164 | or ebx,0x80000000;eax,0x80000000 |
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1 | ha | 165 | ret |
166 | |||
167 | ;*************************************************************************** |
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168 | ; Function |
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169 | ; pci_read_reg: |
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170 | ; |
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171 | ; Description |
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172 | ; read a register from the PCI config space into EAX/AX/AL |
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173 | ; IN: ah=bus,device+func=bh,register address=bl |
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174 | ; number of bytes to read (1,2,4) coded into AL, bits 0-1 |
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586 | serge | 175 | ; (0 - byte, 1 - word, 2 - dword) |
1 | ha | 176 | ;*************************************************************************** |
177 | |||
178 | align 4 |
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179 | |||
180 | pci_read_reg: |
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1348 | art_zh | 181 | cmp byte [BOOT_VAR+0x9020],2 ;what mechanism will we use? |
182 | je pci_read_reg_2 |
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1 | ha | 183 | |
1348 | art_zh | 184 | ; mechanism 1 |
1591 | lrz | 185 | ; push esi ; save register size into ESI |
186 | mov esi,ebx;eax |
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1348 | art_zh | 187 | and esi,3 |
1 | ha | 188 | |
1348 | art_zh | 189 | call pci_make_config_cmd |
1591 | lrz | 190 | mov eax,ebx;ebx,eax |
1348 | art_zh | 191 | ; get current state |
192 | mov dx,0xcf8 |
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193 | in eax, dx |
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194 | push eax |
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195 | ; set up addressing to config data |
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196 | mov eax,ebx |
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197 | and al,0xfc ; make address dword-aligned |
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198 | out dx,eax |
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199 | ; get requested DWORD of config data |
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200 | mov dl,0xfc |
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201 | and bl,3 |
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202 | or dl,bl ; add to port address first 2 bits of register address |
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1 | ha | 203 | |
1591 | lrz | 204 | ; or esi,esi |
205 | ; jz pci_read_byte1 |
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206 | ; cmp esi,1 |
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207 | ; jz pci_read_word1 |
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208 | ; cmp esi,2 |
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209 | ; jz pci_read_dword1 |
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210 | ; jmp pci_fin_read1 |
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211 | jmp dword [f62_rcall+esi*4] |
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1 | ha | 212 | |
1591 | lrz | 213 | .0: |
1348 | art_zh | 214 | in al,dx |
1591 | lrz | 215 | jmp .pci_fin_read1 |
216 | .1: |
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1348 | art_zh | 217 | in ax,dx |
1591 | lrz | 218 | jmp .pci_fin_read1 |
219 | .2: |
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1348 | art_zh | 220 | in eax,dx |
1591 | lrz | 221 | ; jmp pci_fin_read1 |
222 | .pci_fin_read1: |
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1348 | art_zh | 223 | ; restore configuration control |
224 | xchg eax,[esp] |
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225 | mov dx,0xcf8 |
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226 | out dx,eax |
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1 | ha | 227 | |
1348 | art_zh | 228 | pop eax |
1591 | lrz | 229 | ;pop esi |
1348 | art_zh | 230 | ret |
1 | ha | 231 | pci_read_reg_2: |
232 | |||
1591 | lrz | 233 | test ch,128;bh,128 ;mech#2 only supports 16 devices per bus |
234 | jnz pci_api.not_support |
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1 | ha | 235 | |
1591 | lrz | 236 | ; push esi ; save register size into ESI |
237 | mov esi,ebx;eax |
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1348 | art_zh | 238 | and esi,3 |
1 | ha | 239 | |
1591 | lrz | 240 | push ebx;eax |
241 | mov eax,ebx |
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1348 | art_zh | 242 | ;store current state of config space |
243 | mov dx,0xcf8 |
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244 | in al,dx |
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245 | mov ah,al |
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246 | mov dl,0xfa |
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247 | in al,dx |
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1 | ha | 248 | |
1348 | art_zh | 249 | xchg eax,[esp] |
250 | ; out 0xcfa,bus |
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251 | mov al,ah |
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252 | out dx,al |
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253 | ; out 0xcf8,0x80 |
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254 | mov dl,0xf8 |
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255 | mov al,0x80 |
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256 | out dx,al |
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257 | ; compute addr |
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1591 | lrz | 258 | shr ch,3;bh,3 ; func is ignored in mechanism 2 |
259 | or ch,0xc0;bh,0xc0 |
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260 | mov dx,cx;bx |
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1 | ha | 261 | |
1591 | lrz | 262 | ; or esi,esi |
263 | ; jz pci_read_byte2 |
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264 | ; cmp esi,1 |
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265 | ; jz pci_read_word2 |
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266 | ; cmp esi,2 |
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267 | ; jz pci_read_dword2 |
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268 | ; jmp pci_fin_read2 |
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269 | jmp dword [f62_rcall2+esi*4] |
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1 | ha | 270 | |
1591 | lrz | 271 | .0: |
1348 | art_zh | 272 | in al,dx |
1591 | lrz | 273 | jmp .pci_fin_read2 |
274 | .1: |
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1348 | art_zh | 275 | in ax,dx |
1591 | lrz | 276 | jmp .pci_fin_read2 |
277 | .2: |
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1348 | art_zh | 278 | in eax,dx |
1 | ha | 279 | ; jmp pci_fin_read2 |
280 | |||
1591 | lrz | 281 | .pci_fin_read2: |
282 | |||
1348 | art_zh | 283 | ; restore configuration space |
284 | xchg eax,[esp] |
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285 | mov dx,0xcfa |
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286 | out dx,al |
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287 | mov dl,0xf8 |
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288 | mov al,ah |
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289 | out dx,al |
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1 | ha | 290 | |
1348 | art_zh | 291 | pop eax |
1591 | lrz | 292 | ; pop esi |
1348 | art_zh | 293 | ret |
1 | ha | 294 | |
1591 | lrz | 295 | ;pci_read_reg_err: |
296 | ; or dword [esp+32],-1 |
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297 | ; ret |
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1 | ha | 298 | |
299 | |||
300 | ;*************************************************************************** |
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301 | ; Function |
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302 | ; pci_write_reg: |
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303 | ; |
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304 | ; Description |
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305 | ; write a register from ECX/CX/CL into the PCI config space |
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306 | ; IN: ah=bus,device+func=bh,register address (dword aligned)=bl, |
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307 | ; value to write in ecx |
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308 | ; number of bytes to write (1,2,4) coded into AL, bits 0-1 |
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586 | serge | 309 | ; (0 - byte, 1 - word, 2 - dword) |
1 | ha | 310 | ;*************************************************************************** |
311 | |||
312 | align 4 |
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313 | |||
314 | pci_write_reg: |
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1348 | art_zh | 315 | cmp byte [BOOT_VAR+0x9020],2 ;what mechanism will we use? |
316 | je pci_write_reg_2 |
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1 | ha | 317 | |
1348 | art_zh | 318 | ; mechanism 1 |
1591 | lrz | 319 | ; push esi ; save register size into ESI |
320 | mov esi,ebx;eax |
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321 | and esi,3 ;not need |
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1 | ha | 322 | |
1348 | art_zh | 323 | call pci_make_config_cmd |
1591 | lrz | 324 | mov eax,ebx;ebx,eax |
325 | mov ecx,edx ;cross registers |
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1348 | art_zh | 326 | ; get current state into ecx |
327 | mov dx,0xcf8 |
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328 | in eax, dx |
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329 | push eax |
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330 | ; set up addressing to config data |
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331 | mov eax,ebx |
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332 | and al,0xfc ; make address dword-aligned |
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333 | out dx,eax |
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334 | ; write DWORD of config data |
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335 | mov dl,0xfc |
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336 | and bl,3 |
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337 | or dl,bl |
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338 | mov eax,ecx |
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1 | ha | 339 | |
1591 | lrz | 340 | ; or esi,esi |
341 | ; jz pci_write_byte1 |
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342 | ; cmp esi,1 |
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343 | ; jz pci_write_word1 |
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344 | ; cmp esi,2 |
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345 | ; jz pci_write_dword1 |
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346 | ; jmp pci_fin_write1 |
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347 | jmp dword [f62_wcall+esi*4] |
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348 | .0: |
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1348 | art_zh | 349 | out dx,al |
1591 | lrz | 350 | jmp .pci_fin_write1 |
351 | .1: |
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1348 | art_zh | 352 | out dx,ax |
1591 | lrz | 353 | jmp .pci_fin_write1 |
354 | .2: |
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1348 | art_zh | 355 | out dx,eax |
1591 | lrz | 356 | .pci_fin_write1: |
1 | ha | 357 | |
1348 | art_zh | 358 | ; restore configuration control |
359 | pop eax |
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360 | mov dl,0xf8 |
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361 | out dx,eax |
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1 | ha | 362 | |
1348 | art_zh | 363 | xor eax,eax |
1591 | lrz | 364 | ;pop esi |
1348 | art_zh | 365 | ret |
1 | ha | 366 | pci_write_reg_2: |
367 | |||
1591 | lrz | 368 | test ch,128;bh,128 ;mech#2 only supports 16 devices per bus |
369 | jnz pci_api.not_support |
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1 | ha | 370 | |
371 | |||
1591 | lrz | 372 | ; push esi ; save register size into ESI |
1348 | art_zh | 373 | mov esi,eax |
1591 | lrz | 374 | and esi,3 ;not need |
1 | ha | 375 | |
1348 | art_zh | 376 | push eax |
1591 | lrz | 377 | mov ecx,edx ;cross registers |
1348 | art_zh | 378 | ;store current state of config space |
379 | mov dx,0xcf8 |
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380 | in al,dx |
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381 | mov ah,al |
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382 | mov dl,0xfa |
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383 | in al,dx |
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384 | xchg eax,[esp] |
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385 | ; out 0xcfa,bus |
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386 | mov al,ah |
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387 | out dx,al |
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388 | ; out 0xcf8,0x80 |
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389 | mov dl,0xf8 |
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390 | mov al,0x80 |
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391 | out dx,al |
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392 | ; compute addr |
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393 | shr bh,3 ; func is ignored in mechanism 2 |
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394 | or bh,0xc0 |
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395 | mov dx,bx |
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396 | ; write register |
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397 | mov eax,ecx |
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1 | ha | 398 | |
1591 | lrz | 399 | ; or esi,esi |
400 | ; jz pci_write_byte2 |
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401 | ; cmp esi,1 |
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402 | ; jz pci_write_word2 |
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403 | ; cmp esi,2 |
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404 | ; jz pci_write_dword2 |
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405 | ; jmp pci_fin_write2 |
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406 | jmp dword [f62_wcall2+esi*4] |
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407 | .0: |
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1348 | art_zh | 408 | out dx,al |
1591 | lrz | 409 | jmp .pci_fin_write2 |
410 | .1: |
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1348 | art_zh | 411 | out dx,ax |
1591 | lrz | 412 | jmp .pci_fin_write2 |
413 | .2: |
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1348 | art_zh | 414 | out dx,eax |
1591 | lrz | 415 | .pci_fin_write2: |
1348 | art_zh | 416 | ; restore configuration space |
417 | pop eax |
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418 | mov dx,0xcfa |
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419 | out dx,al |
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420 | mov dl,0xf8 |
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421 | mov al,ah |
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422 | out dx,al |
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1 | ha | 423 | |
1348 | art_zh | 424 | xor eax,eax |
1591 | lrz | 425 | ;pop esi |
1348 | art_zh | 426 | ret |
1 | ha | 427 | |
1591 | lrz | 428 | ;pci_write_reg_err: |
429 | ; xor eax,eax |
||
430 | ; dec eax |
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431 | ; ret |
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586 | serge | 432 | |
1370 | art_zh | 433 | if defined mmio_pci_addr ; must be set above |
1348 | art_zh | 434 | ;*************************************************************************** |
435 | ; Function |
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1370 | art_zh | 436 | ; pci_mmio_init |
1348 | art_zh | 437 | ; |
438 | ; Description |
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1591 | lrz | 439 | ; IN: cx = device's PCI bus address (bbbbbbbbdddddfff) |
1358 | art_zh | 440 | ; Returns eax = user heap space available (bytes) |
1348 | art_zh | 441 | ; Error codes |
442 | ; eax = -1 : PCI user access blocked, |
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443 | ; eax = -2 : device not registered for uMMIO service |
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444 | ; eax = -3 : user heap initialization failure |
||
445 | ;*************************************************************************** |
||
446 | pci_mmio_init: |
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1591 | lrz | 447 | cmp cx, mmio_pci_addr |
1348 | art_zh | 448 | jz @f |
449 | mov eax,-2 |
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450 | ret |
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451 | @@: |
||
452 | call init_heap ; (if not initialized yet) |
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453 | or eax,eax |
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454 | jz @f |
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455 | ret |
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456 | @@: |
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457 | mov eax,-3 |
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458 | ret |
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459 | |||
460 | |||
461 | ;*************************************************************************** |
||
462 | ; Function |
||
1370 | art_zh | 463 | ; pci_mmio_map |
1348 | art_zh | 464 | ; |
465 | ; Description |
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466 | ; maps a block of PCI memory to user-accessible linear address |
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467 | ; |
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468 | ; WARNING! This VERY EXPERIMENTAL service is for one chosen PCI device only! |
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469 | ; The target device address should be set in kernel var mmio_pci_addr |
||
470 | ; |
||
471 | ; IN: ah = BAR#; |
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472 | ; IN: ebx = block size (bytes); |
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473 | ; IN: ecx = offset in MMIO block (in 4K-pages, to avoid misaligned pages); |
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474 | ; |
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475 | ; Returns eax = MMIO block's linear address in the userspace (if no error) |
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476 | ; |
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477 | ; |
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478 | ; Error codes |
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479 | ; eax = -1 : user access to PCI blocked, |
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480 | ; eax = -2 : an invalid BAR register referred |
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481 | ; eax = -3 : no i/o space on that BAR |
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482 | ; eax = -4 : a port i/o BAR register referred |
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483 | ; eax = -5 : dynamic userspace allocation problem |
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484 | ;*************************************************************************** |
||
485 | |||
486 | pci_mmio_map: |
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1591 | lrz | 487 | ;cross |
488 | mov eax,ebx |
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489 | mov ebx,ecx |
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490 | mov ecx,edx |
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491 | ;;;;;;;;;;;;;;;;;;; |
||
1348 | art_zh | 492 | and edx,0x0ffff |
493 | cmp ah,6 |
||
1353 | art_zh | 494 | jc .bar_0_5 |
495 | jz .bar_rom |
||
1348 | art_zh | 496 | mov eax,-2 |
497 | ret |
||
1353 | art_zh | 498 | .bar_rom: |
499 | mov ah, 8 ; bar6 = Expansion ROM base address |
||
500 | .bar_0_5: |
||
1348 | art_zh | 501 | push ecx |
502 | add ebx, 4095 |
||
503 | and ebx,-4096 |
||
504 | push ebx |
||
1353 | art_zh | 505 | mov bl, ah ; bl = BAR# (0..5), however bl=8 for BAR6 |
1348 | art_zh | 506 | shl bl, 1 |
507 | shl bl, 1 |
||
1353 | art_zh | 508 | add bl, 0x10 ; now bl = BAR offset in PCI config. space |
1354 | diamond | 509 | mov ax, mmio_pci_addr |
1348 | art_zh | 510 | mov bh, al ; bh = dddddfff |
511 | mov al, 2 ; al : DW to read |
||
512 | call pci_read_reg |
||
513 | or eax, eax |
||
514 | jnz @f |
||
515 | mov eax,-3 ; empty I/O space |
||
516 | jmp mmio_ret_fail |
||
517 | @@: |
||
518 | test eax, 1 |
||
519 | jz @f |
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520 | mov eax,-4 ; damned ports (not MMIO space) |
||
521 | jmp mmio_ret_fail |
||
522 | @@: |
||
523 | pop ecx ; ecx = block size, bytes (expanded to whole page) |
||
524 | mov ebx, ecx ; user_alloc destroys eax, ecx, edx, but saves ebx |
||
1462 | art_zh | 525 | and eax, 0xFFFFFFF0 |
526 | push eax ; store MMIO physical address + keep 2DWords in the stack |
||
1348 | art_zh | 527 | stdcall user_alloc, ecx |
528 | or eax, eax |
||
529 | jnz mmio_map_over |
||
530 | mov eax,-5 ; problem with page allocation |
||
531 | |||
532 | mmio_ret_fail: |
||
533 | pop ecx |
||
534 | pop edx |
||
535 | ret |
||
536 | |||
537 | mmio_map_over: |
||
538 | mov ecx, ebx ; ecx = size (bytes, expanded to whole page) |
||
539 | shr ecx, 12 ; ecx = number of pages |
||
540 | mov ebx, eax ; ebx = linear address |
||
541 | pop eax ; eax = MMIO start |
||
542 | pop edx ; edx = MMIO shift (pages) |
||
543 | shl edx, 12 ; edx = MMIO shift (bytes) |
||
544 | add eax, edx ; eax = uMMIO physical address |
||
545 | or eax, PG_SHARED |
||
546 | or eax, PG_UW |
||
547 | or eax, PG_NOCACHE |
||
548 | mov edi, ebx |
||
549 | call commit_pages |
||
550 | mov eax, edi |
||
551 | ret |
||
552 | |||
553 | ;*************************************************************************** |
||
554 | ; Function |
||
1370 | art_zh | 555 | ; pci_mmio_unmap_page |
1348 | art_zh | 556 | ; |
557 | ; Description |
||
558 | ; unmaps the linear space previously tied to a PCI memory block |
||
559 | ; |
||
560 | ; IN: ebx = linear address of space previously allocated by pci_mmio_map |
||
561 | ; returns eax = 1 if successfully unmapped |
||
562 | ; |
||
563 | ; Error codes |
||
564 | ; eax = -1 if no user PCI access allowed, |
||
565 | ; eax = 0 if unmapping failed |
||
566 | ;*************************************************************************** |
||
567 | |||
568 | pci_mmio_unmap: |
||
1591 | lrz | 569 | stdcall user_free, ecx;ebx |
1348 | art_zh | 570 | ret |
571 | |||
1354 | diamond | 572 | end if |
1348 | art_zh | 573 | |
586 | serge | 574 | ;-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= |
1375 | Lrz | 575 | uglobal |
576 | align 4 |
||
586 | serge | 577 | ; VendID (2), DevID (2), Revision = 0 (1), Class Code (3), FNum (1), Bus (1) |
578 | pci_emu_dat: times 30*10 db 0 |
||
1375 | Lrz | 579 | endg |
586 | serge | 580 | ;-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= |
581 | align 4 |
||
582 | sys_pcibios: |
||
594 | diamond | 583 | cmp [pci_access_enabled], 1 |
1348 | art_zh | 584 | jne .unsupported_func |
585 | cmp [pci_bios_entry], 0 |
||
594 | diamond | 586 | jz .emulate_bios |
586 | serge | 587 | |
1348 | art_zh | 588 | push ds |
589 | mov ax, pci_data_sel |
||
590 | mov ds, ax |
||
591 | mov eax, ebp |
||
592 | mov ah, 0B1h |
||
593 | call pword [cs:pci_bios_entry] |
||
594 | pop ds |
||
586 | serge | 595 | |
596 | jmp .return |
||
597 | ;-=-=-=-=-=-=-=-= |
||
598 | .emulate_bios: |
||
599 | cmp ebp, 1 ; PCI_FUNCTION_ID |
||
600 | jnz .not_PCI_BIOS_PRESENT |
||
601 | mov edx, 'PCI ' |
||
1348 | art_zh | 602 | mov al, [OS_BASE+0x2F0000 + 0x9020] |
603 | mov bx, [OS_BASE+0x2F0000 + 0x9022] |
||
604 | mov cl, [OS_BASE+0x2F0000 + 0x9021] |
||
605 | xor ah, ah |
||
594 | diamond | 606 | jmp .return_abcd |
586 | serge | 607 | |
608 | .not_PCI_BIOS_PRESENT: |
||
609 | cmp ebp, 2 ; FIND_PCI_DEVICE |
||
610 | jne .not_FIND_PCI_DEVICE |
||
594 | diamond | 611 | mov ebx, pci_emu_dat |
612 | ..nxt: cmp [ebx], dx |
||
586 | serge | 613 | jne ..no |
594 | diamond | 614 | cmp [ebx + 2], cx |
586 | serge | 615 | jne ..no |
594 | diamond | 616 | dec si |
586 | serge | 617 | jns ..no |
594 | diamond | 618 | mov bx, [ebx + 4] |
1348 | art_zh | 619 | xor ah, ah |
594 | diamond | 620 | jmp .return_ab |
621 | ..no: cmp word[ebx], 0 |
||
586 | serge | 622 | je ..dev_not_found |
594 | diamond | 623 | add ebx, 10 |
586 | serge | 624 | jmp ..nxt |
625 | ..dev_not_found: |
||
626 | mov ah, 0x86 ; DEVICE_NOT_FOUND |
||
594 | diamond | 627 | jmp .return_a |
586 | serge | 628 | |
629 | .not_FIND_PCI_DEVICE: |
||
630 | cmp ebp, 3 ; FIND_PCI_CLASS_CODE |
||
631 | jne .not_FIND_PCI_CLASS_CODE |
||
632 | mov esi, pci_emu_dat |
||
594 | diamond | 633 | shl ecx, 8 |
1348 | art_zh | 634 | ..nxt2: cmp [esi], ecx |
586 | serge | 635 | jne ..no2 |
636 | mov bx, [esi] |
||
1348 | art_zh | 637 | xor ah, ah |
594 | diamond | 638 | jmp .return_ab |
586 | serge | 639 | ..no2: cmp dword[esi], 0 |
594 | diamond | 640 | je ..dev_not_found |
586 | serge | 641 | add esi, 10 |
642 | jmp ..nxt2 |
||
643 | |||
644 | .not_FIND_PCI_CLASS_CODE: |
||
645 | cmp ebp, 8 ; READ_CONFIG_* |
||
646 | jb .not_READ_CONFIG |
||
647 | cmp ebp, 0x0A |
||
648 | ja .not_READ_CONFIG |
||
1348 | art_zh | 649 | mov eax, ebp |
650 | mov ah, bh |
||
651 | mov edx, edi |
||
652 | mov bh, bl |
||
653 | mov bl, dl |
||
586 | serge | 654 | call pci_read_reg |
655 | mov ecx, eax |
||
656 | xor ah, ah ; SUCCESSFUL |
||
594 | diamond | 657 | jmp .return_abc |
586 | serge | 658 | .not_READ_CONFIG: |
659 | cmp ebp, 0x0B ; WRITE_CONFIG_* |
||
660 | jb .not_WRITE_CONFIG |
||
661 | cmp ebp, 0x0D |
||
662 | ja .not_WRITE_CONFIG |
||
1348 | art_zh | 663 | lea eax, [ebp+1] |
664 | mov ah, bh |
||
665 | mov edx, edi |
||
666 | mov bh, bl |
||
667 | mov bl, dl |
||
586 | serge | 668 | call pci_write_reg |
669 | xor ah, ah ; SUCCESSFUL |
||
594 | diamond | 670 | jmp .return_abc |
586 | serge | 671 | .not_WRITE_CONFIG: |
672 | .unsupported_func: |
||
673 | mov ah, 0x81 ; FUNC_NOT_SUPPORTED |
||
1375 | Lrz | 674 | .return:mov dword[esp + 4 ], edi |
675 | mov dword[esp + 8], esi |
||
594 | diamond | 676 | .return_abcd: |
1375 | Lrz | 677 | mov dword[esp + 24], edx |
594 | diamond | 678 | .return_abc: |
1375 | Lrz | 679 | mov dword[esp + 28], ecx |
594 | diamond | 680 | .return_ab: |
1375 | Lrz | 681 | mov dword[esp + 20], ebx |
594 | diamond | 682 | .return_a: |
1375 | Lrz | 683 | mov dword[esp + 32], eax |
586 | serge | 684 | ret |