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1 | ha | 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
2 | ;; ;; |
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3 | ;; PCI32.INC ;; |
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4 | ;; ;; |
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5 | ;; 32 bit PCI driver code ;; |
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6 | ;; ;; |
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7 | ;; Version 0.2 December 21st, 2002 ;; |
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8 | ;; ;; |
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9 | ;; Author: Victor Prodan, victorprodan@yahoo.com ;; |
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10 | ;; Credits: ;; |
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11 | ;; Ralf Brown ;; |
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12 | ;; Mike Hibbett, mikeh@oceanfree.net ;; |
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13 | ;; ;; |
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14 | ;; See file COPYING for details ;; |
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15 | ;; ;; |
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16 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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17 | |||
18 | |||
19 | ;*************************************************************************** |
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20 | ; Function |
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21 | ; pci_api: |
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22 | ; |
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23 | ; Description |
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24 | ; entry point for system PCI calls |
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25 | ;*************************************************************************** |
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26 | |||
27 | align 4 |
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28 | |||
29 | pci_api: |
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30 | |||
31 | cmp [pci_access_enabled],1 |
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32 | jne no_pci_access_for_applications |
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33 | |||
34 | or al,al |
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35 | jnz pci_fn_1 |
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36 | ; PCI function 0: get pci version (AH.AL) |
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37 | movzx eax,word [0x2F0000+0x9022] |
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38 | ret |
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39 | |||
40 | pci_fn_1: |
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41 | cmp al,1 |
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42 | jnz pci_fn_2 |
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43 | |||
44 | ; PCI function 1: get last bus in AL |
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45 | mov al,[0x2F0000+0x9021] |
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46 | ret |
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47 | |||
48 | pci_fn_2: |
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49 | cmp al,2 |
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50 | jne pci_fn_3 |
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51 | ; PCI function 2: get pci access mechanism |
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52 | mov al,[0x2F0000+0x9020] |
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53 | ret |
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54 | pci_fn_3: |
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55 | |||
56 | cmp al,4 |
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57 | jz pci_read_reg ;byte |
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58 | cmp al,5 |
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59 | jz pci_read_reg ;word |
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60 | cmp al,6 |
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61 | jz pci_read_reg ;dword |
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62 | |||
63 | cmp al,8 |
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64 | jz pci_write_reg ;byte |
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65 | cmp al,9 |
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66 | jz pci_write_reg ;word |
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67 | cmp al,10 |
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68 | jz pci_write_reg ;dword |
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69 | |||
70 | no_pci_access_for_applications: |
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71 | |||
72 | mov eax,-1 |
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73 | |||
74 | ret |
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75 | |||
76 | ;*************************************************************************** |
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77 | ; Function |
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78 | ; pci_make_config_cmd |
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79 | ; |
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80 | ; Description |
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81 | ; creates a command dword for use with the PCI bus |
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82 | ; bus # in ah |
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83 | ; device+func in bh (dddddfff) |
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84 | ; register in bl |
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85 | ; |
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86 | ; command dword returned in eax ( 10000000 bbbbbbbb dddddfff rrrrrr00 ) |
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87 | ;*************************************************************************** |
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88 | |||
89 | align 4 |
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90 | |||
91 | pci_make_config_cmd: |
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92 | shl eax,8 ; move bus to bits 16-23 |
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93 | mov ax,bx ; combine all |
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94 | and eax,0xffffff |
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95 | or eax,0x80000000 |
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96 | ret |
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97 | |||
98 | ;*************************************************************************** |
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99 | ; Function |
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100 | ; pci_read_reg: |
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101 | ; |
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102 | ; Description |
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103 | ; read a register from the PCI config space into EAX/AX/AL |
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104 | ; IN: ah=bus,device+func=bh,register address=bl |
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105 | ; number of bytes to read (1,2,4) coded into AL, bits 0-1 |
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106 | ;*************************************************************************** |
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107 | |||
108 | align 4 |
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109 | |||
110 | pci_read_reg: |
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111 | cmp byte [0x2F0000+0x9020],2 ;what mechanism will we use? |
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112 | je pci_read_reg_2 |
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113 | |||
114 | ; mechanism 1 |
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115 | push esi ; save register size into ESI |
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116 | mov esi,eax |
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117 | and esi,3 |
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118 | |||
119 | call pci_make_config_cmd |
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120 | mov ebx,eax |
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121 | ; get current state |
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122 | mov dx,0xcf8 |
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123 | in eax, dx |
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124 | push eax |
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125 | ; set up addressing to config data |
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126 | mov eax,ebx |
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127 | and al,0xfc ; make address dword-aligned |
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128 | out dx,eax |
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129 | ; get requested DWORD of config data |
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130 | mov dl,0xfc |
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131 | and bl,3 |
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132 | or dl,bl ; add to port address first 2 bits of register address |
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133 | |||
134 | or esi,esi |
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135 | jz pci_read_byte1 |
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136 | cmp esi,1 |
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137 | jz pci_read_word1 |
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138 | cmp esi,2 |
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139 | jz pci_read_dword1 |
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140 | jmp pci_fin_read1 |
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141 | |||
142 | pci_read_byte1: |
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143 | in al,dx |
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144 | jmp pci_fin_read1 |
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145 | pci_read_word1: |
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146 | in ax,dx |
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147 | jmp pci_fin_read1 |
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148 | pci_read_dword1: |
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149 | in eax,dx |
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150 | jmp pci_fin_read1 |
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151 | pci_fin_read1: |
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152 | ; restore configuration control |
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153 | xchg eax,[esp] |
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154 | mov dx,0xcf8 |
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155 | out dx,eax |
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156 | |||
157 | pop eax |
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158 | pop esi |
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159 | ret |
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160 | pci_read_reg_2: |
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161 | |||
162 | test bh,128 ;mech#2 only supports 16 devices per bus |
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163 | jnz pci_read_reg_err |
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164 | |||
165 | push esi ; save register size into ESI |
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166 | mov esi,eax |
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167 | and esi,3 |
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168 | |||
169 | push eax |
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170 | ;store current state of config space |
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171 | mov dx,0xcf8 |
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172 | in al,dx |
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173 | mov ah,al |
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174 | mov dl,0xfa |
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175 | in al,dx |
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176 | |||
177 | xchg eax,[esp] |
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178 | ; out 0xcfa,bus |
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179 | mov al,ah |
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180 | out dx,al |
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181 | ; out 0xcf8,0x80 |
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182 | mov dl,0xf8 |
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183 | mov al,0x80 |
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184 | out dx,al |
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185 | ; compute addr |
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186 | shr bh,3 ; func is ignored in mechanism 2 |
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187 | or bh,0xc0 |
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188 | mov dx,bx |
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189 | |||
190 | or esi,esi |
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191 | jz pci_read_byte2 |
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192 | cmp esi,1 |
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193 | jz pci_read_word2 |
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194 | cmp esi,2 |
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195 | jz pci_read_dword2 |
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196 | jmp pci_fin_read2 |
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197 | |||
198 | pci_read_byte2: |
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199 | in al,dx |
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200 | jmp pci_fin_read2 |
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201 | pci_read_word2: |
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202 | in ax,dx |
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203 | jmp pci_fin_read2 |
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204 | pci_read_dword2: |
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205 | in eax,dx |
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206 | ; jmp pci_fin_read2 |
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207 | pci_fin_read2: |
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208 | |||
209 | ; restore configuration space |
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210 | xchg eax,[esp] |
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211 | mov dx,0xcfa |
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212 | out dx,al |
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213 | mov dl,0xf8 |
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214 | mov al,ah |
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215 | out dx,al |
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216 | |||
217 | pop eax |
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218 | pop esi |
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219 | ret |
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220 | |||
221 | pci_read_reg_err: |
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222 | xor eax,eax |
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223 | dec eax |
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224 | ret |
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225 | |||
226 | |||
227 | ;*************************************************************************** |
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228 | ; Function |
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229 | ; pci_write_reg: |
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230 | ; |
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231 | ; Description |
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232 | ; write a register from ECX/CX/CL into the PCI config space |
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233 | ; IN: ah=bus,device+func=bh,register address (dword aligned)=bl, |
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234 | ; value to write in ecx |
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235 | ; number of bytes to write (1,2,4) coded into AL, bits 0-1 |
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236 | ;*************************************************************************** |
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237 | |||
238 | align 4 |
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239 | |||
240 | pci_write_reg: |
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241 | cmp byte [0x2F0000+0x9020],2 ;what mechanism will we use? |
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242 | je pci_write_reg_2 |
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243 | |||
244 | ; mechanism 1 |
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245 | push esi ; save register size into ESI |
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246 | mov esi,eax |
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247 | and esi,3 |
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248 | |||
249 | call pci_make_config_cmd |
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250 | mov ebx,eax |
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251 | ; get current state into ecx |
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252 | mov dx,0xcf8 |
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253 | in eax, dx |
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254 | push eax |
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255 | ; set up addressing to config data |
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256 | mov eax,ebx |
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257 | and al,0xfc ; make address dword-aligned |
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258 | out dx,eax |
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259 | ; write DWORD of config data |
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260 | mov dl,0xfc |
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261 | and bl,3 |
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262 | or dl,bl |
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263 | mov eax,ecx |
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264 | |||
265 | or esi,esi |
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266 | jz pci_write_byte1 |
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267 | cmp esi,1 |
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268 | jz pci_write_word1 |
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269 | cmp esi,2 |
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270 | jz pci_write_dword1 |
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271 | jmp pci_fin_write1 |
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272 | |||
273 | pci_write_byte1: |
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274 | out dx,al |
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275 | jmp pci_fin_write1 |
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276 | pci_write_word1: |
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277 | out dx,ax |
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278 | jmp pci_fin_write1 |
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279 | pci_write_dword1: |
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280 | out dx,eax |
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281 | jmp pci_fin_write1 |
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282 | pci_fin_write1: |
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283 | |||
284 | ; restore configuration control |
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285 | pop eax |
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286 | mov dl,0xf8 |
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287 | out dx,eax |
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288 | |||
289 | xor eax,eax |
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290 | pop esi |
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291 | |||
292 | ret |
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293 | pci_write_reg_2: |
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294 | |||
295 | test bh,128 ;mech#2 only supports 16 devices per bus |
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296 | jnz pci_write_reg_err |
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297 | |||
298 | |||
299 | push esi ; save register size into ESI |
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300 | mov esi,eax |
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301 | and esi,3 |
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302 | |||
303 | push eax |
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304 | ;store current state of config space |
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305 | mov dx,0xcf8 |
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306 | in al,dx |
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307 | mov ah,al |
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308 | mov dl,0xfa |
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309 | in al,dx |
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310 | xchg eax,[esp] |
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311 | ; out 0xcfa,bus |
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312 | mov al,ah |
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313 | out dx,al |
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314 | ; out 0xcf8,0x80 |
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315 | mov dl,0xf8 |
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316 | mov al,0x80 |
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317 | out dx,al |
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318 | ; compute addr |
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319 | shr bh,3 ; func is ignored in mechanism 2 |
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320 | or bh,0xc0 |
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321 | mov dx,bx |
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322 | ; write register |
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323 | mov eax,ecx |
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324 | |||
325 | or esi,esi |
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326 | jz pci_write_byte2 |
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327 | cmp esi,1 |
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328 | jz pci_write_word2 |
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329 | cmp esi,2 |
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330 | jz pci_write_dword2 |
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331 | jmp pci_fin_write2 |
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332 | |||
333 | pci_write_byte2: |
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334 | out dx,al |
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335 | jmp pci_fin_write2 |
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336 | pci_write_word2: |
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337 | out dx,ax |
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338 | jmp pci_fin_write2 |
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339 | pci_write_dword2: |
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340 | out dx,eax |
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341 | jmp pci_fin_write2 |
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342 | pci_fin_write2: |
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343 | ; restore configuration space |
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344 | pop eax |
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345 | mov dx,0xcfa |
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346 | out dx,al |
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347 | mov dl,0xf8 |
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348 | mov al,ah |
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349 | out dx,al |
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350 | |||
351 | xor eax,eax |
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352 | pop esi |
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353 | ret |
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354 | |||
355 | pci_write_reg_err: |
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356 | xor eax,eax |
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357 | dec eax |
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358 | ret |