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Rev | Author | Line No. | Line |
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1472 | hidnplayr | 1 | ; PCI Bus defines |
2 | PCI_HEADER_TYPE equ 0x0e ;8 bit |
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3 | PCI_BASE_ADDRESS_0 equ 0x10 ;32 bit |
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4 | PCI_BASE_ADDRESS_5 equ 0x24 ;32 bits |
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5 | PCI_BASE_ADDRESS_SPACE_IO equ 0x01 |
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6 | PCI_VENDOR_ID equ 0x00 ;16 bit |
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7 | PCI_BASE_ADDRESS_IO_MASK equ 0xFFFFFFFC |
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8 | |||
9 | |||
10 | ; PCI programming |
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11 | PCI_REG_COMMAND equ 0x4 ; command register |
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12 | PCI_REG_STATUS equ 0x6 ; status register |
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13 | PCI_REG_LATENCY equ 0xd ; latency timer register |
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14 | PCI_REG_CAP_PTR equ 0x34 ; capabilities pointer |
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15 | PCI_REG_CAPABILITY_ID equ 0x0 ; capapility ID in pm register block |
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16 | PCI_REG_PM_STATUS equ 0x4 ; power management status register |
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17 | PCI_REG_PM_CTRL equ 0x4 ; power management control register |
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18 | PCI_BIT_PIO equ 0 ; bit0: io space control |
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19 | PCI_BIT_MMIO equ 1 ; bit1: memory space control |
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20 | PCI_BIT_MASTER equ 2 ; bit2: device acts as a PCI master |
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21 | |||
22 | |||
23 | PAGESIZE equ 4096 |
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24 | |||
25 | |||
26 | |||
27 | LAST_IO = 0 |
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28 | |||
29 | macro set_io addr { |
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30 | |||
31 | if addr = 0 |
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32 | |||
33 | mov edx, [device.io_addr] |
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34 | |||
35 | else if addr = LAST_IO |
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36 | |||
37 | else |
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38 | |||
39 | add edx, addr - LAST_IO |
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40 | |||
41 | end if |
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42 | |||
43 | LAST_IO = addr |
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44 | } |
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45 | |||
46 | |||
47 | |||
48 | macro allocate_and_clear dest, size, err { |
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49 | |||
50 | ; We need to allocate at least 8 pages, if we want a continuous memory in ram |
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51 | if (size < 8*4096) & (size > 4096) |
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52 | stdcall KernelAlloc, 8*4096 |
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53 | else |
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54 | stdcall KernelAlloc, size |
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55 | end if |
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56 | test eax, eax |
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57 | jz err |
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58 | mov dest, eax ; Save the address to it into the device struct |
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59 | mov edi, eax ; look at last part of code! |
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60 | |||
61 | ; Release the unused pages (if any) |
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62 | if (size < 8*4096) & (size > 4096) |
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63 | add eax, (size/4096+1)*4096 |
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64 | mov ecx, 8-(size/4096+1) |
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65 | call ReleasePages |
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66 | end if |
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67 | |||
68 | ; Clear the allocated buffer |
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69 | ;mov edi, eax |
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70 | mov ecx, size/4 ; divide by 4 because of DWORD |
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71 | xor eax, eax |
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72 | rep stosd |
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73 | |||
74 | } |
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75 | |||
76 | |||
77 | |||
78 | macro find_io bus, dev, io { |
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79 | |||
80 | |||
81 | local .check, .inc, .got |
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82 | |||
83 | |||
84 | xor eax, eax |
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85 | mov esi, PCI_BASE_ADDRESS_0 |
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86 | movzx ecx, bus |
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87 | movzx edx, dev |
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88 | .check: |
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89 | stdcall PciRead16, ecx ,edx ,esi |
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90 | |||
91 | mov io , eax |
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92 | and eax, PCI_BASE_ADDRESS_IO_MASK |
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93 | test eax, eax |
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94 | jz .inc |
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95 | |||
96 | mov eax, io |
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97 | and eax, PCI_BASE_ADDRESS_SPACE_IO |
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98 | test eax, eax |
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99 | jz .inc |
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100 | |||
101 | mov eax, io |
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102 | and eax, PCI_BASE_ADDRESS_IO_MASK |
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103 | mov io , eax |
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104 | jmp .got |
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105 | |||
106 | .inc: |
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107 | add esi, 4 |
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108 | cmp esi, PCI_BASE_ADDRESS_5 |
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109 | jbe .check |
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110 | |||
111 | .got: |
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112 | |||
113 | } |
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114 | |||
1492 | hidnplayr | 115 | macro find_irq bus, dev, irq { |
1472 | hidnplayr | 116 | |
1492 | hidnplayr | 117 | push eax edx ecx |
118 | movzx ecx, bus |
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119 | movzx edx, dev |
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120 | stdcall PciRead8, ecx ,edx ,0x3c ; 0x3c is the offset where irq can be found |
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121 | mov irq, al |
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122 | pop ecx edx eax |
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1472 | hidnplayr | 123 | |
1492 | hidnplayr | 124 | } |
125 | |||
126 | |||
127 | |||
1472 | hidnplayr | 128 | macro make_bus_master bus, dev { |
129 | |||
130 | movzx ecx, bus |
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131 | movzx edx, dev |
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1492 | hidnplayr | 132 | stdcall PciRead32, ecx ,edx, PCI_REG_COMMAND |
1472 | hidnplayr | 133 | |
134 | or al, (1 shl PCI_BIT_MASTER) or (1 shl PCI_BIT_PIO) |
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135 | and al, not (1 shl PCI_BIT_MMIO) |
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136 | stdcall PciWrite32, ecx, edx, PCI_REG_COMMAND, eax |
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137 | |||
138 | } |
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139 | |||
140 | |||
141 | |||
142 | struc IOCTL { |
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143 | .handle dd ? |
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144 | .io_code dd ? |
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145 | .input dd ? |
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146 | .inp_size dd ? |
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147 | .output dd ? |
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148 | .out_size dd ? |
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149 | } |
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150 | |||
151 | virtual at edx |
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152 | IOCTL IOCTL |
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153 | end virtual |
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154 | |||
155 | |||
156 | |||
157 | |||
158 | if used null_op |
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159 | |||
160 | align 4 |
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161 | null_op: |
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162 | or eax, -1 |
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163 | ret |
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164 | |||
165 | end if |
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166 | |||
167 | |||
168 | macro virt_to_dma { ; input is eax |
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169 | |||
170 | push ax |
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171 | and word[esp], PAGESIZE - 1 |
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172 | call GetPgAddr |
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173 | or ax, word[esp] |
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174 | inc esp |
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175 | inc esp |
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176 | |||
1492 | hidnplayr | 177 | } |
178 | |||
179 | |||
180 | ;struc ETH_DEVICE { |
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181 | macro ETH_DEVICE { |
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182 | ; pointers to procedures |
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183 | .unload dd ? |
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184 | .reset dd ? |
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185 | .transmit dd ? |
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186 | .set_MAC dd ? |
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187 | .get_MAC dd ? |
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188 | .set_mode dd ? |
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189 | .get_mode dd ? |
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190 | ; status |
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191 | .bytes_tx dq ? |
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192 | .bytes_rx dq ? |
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193 | .packets_tx dd ? |
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194 | .packets_rx dd ? |
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195 | .mode dd ? |
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196 | .name dd ? |
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197 | .mac dp ? |
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198 | }>> |
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199 |