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Rev | Author | Line No. | Line |
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1554 | hidnplayr | 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
2 | ;; ;; |
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3155 | hidnplayr | 3 | ;; Copyright (C) KolibriOS team 2004-2013. All rights reserved. ;; |
1554 | hidnplayr | 4 | ;; Distributed under terms of the GNU General Public License ;; |
5 | ;; ;; |
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6 | ;; RTL8169 driver for KolibriOS ;; |
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7 | ;; ;; |
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8 | ;; Copyright 2007 mike.dld, ;; |
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9 | ;; mike.dld@gmail.com ;; |
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10 | ;; ;; |
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3155 | hidnplayr | 11 | ;; port to net branch by hidnplayr ;; |
1554 | hidnplayr | 12 | ;; ;; |
13 | ;; References: ;; |
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14 | ;; r8169.c - linux driver (etherboot project) ;; |
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15 | ;; ;; |
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16 | ;; GNU GENERAL PUBLIC LICENSE ;; |
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17 | ;; Version 2, June 1991 ;; |
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18 | ;; ;; |
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19 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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20 | |||
21 | format MS COFF |
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22 | |||
2916 | hidnplayr | 23 | API_VERSION = 0x01000100 |
24 | DRIVER_VERSION = 5 |
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1554 | hidnplayr | 25 | |
2916 | hidnplayr | 26 | MAX_DEVICES = 16 |
1554 | hidnplayr | 27 | |
2916 | hidnplayr | 28 | DEBUG = 1 |
29 | __DEBUG__ = 1 |
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30 | __DEBUG_LEVEL__ = 1 |
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1554 | hidnplayr | 31 | |
2916 | hidnplayr | 32 | NUM_TX_DESC = 4 |
33 | NUM_RX_DESC = 4 |
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1554 | hidnplayr | 34 | |
35 | include 'proc32.inc' |
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36 | include 'imports.inc' |
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37 | include 'fdo.inc' |
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38 | include 'netdrv.inc' |
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39 | |||
40 | public START |
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41 | public service_proc |
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42 | public version |
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43 | |||
44 | |||
2916 | hidnplayr | 45 | REG_MAC0 = 0x0 ; Ethernet hardware address |
46 | REG_MAR0 = 0x8 ; Multicast filter |
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47 | REG_TxDescStartAddr = 0x20 |
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48 | REG_TxHDescStartAddr = 0x28 |
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49 | REG_FLASH = 0x30 |
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50 | REG_ERSR = 0x36 |
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51 | REG_ChipCmd = 0x37 |
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52 | REG_TxPoll = 0x38 |
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53 | REG_IntrMask = 0x3C |
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54 | REG_IntrStatus = 0x3E |
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55 | REG_TxConfig = 0x40 |
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56 | REG_RxConfig = 0x44 |
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57 | REG_RxMissed = 0x4C |
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58 | REG_Cfg9346 = 0x50 |
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59 | REG_Config0 = 0x51 |
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60 | REG_Config1 = 0x52 |
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61 | REG_Config2 = 0x53 |
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62 | REG_Config3 = 0x54 |
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63 | REG_Config4 = 0x55 |
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64 | REG_Config5 = 0x56 |
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65 | REG_MultiIntr = 0x5C |
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66 | REG_PHYAR = 0x60 |
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67 | REG_TBICSR = 0x64 |
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68 | REG_TBI_ANAR = 0x68 |
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69 | REG_TBI_LPAR = 0x6A |
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70 | REG_PHYstatus = 0x6C |
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71 | REG_RxMaxSize = 0xDA |
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72 | REG_CPlusCmd = 0xE0 |
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73 | REG_RxDescStartAddr = 0xE4 |
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74 | REG_ETThReg = 0xEC |
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75 | REG_FuncEvent = 0xF0 |
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76 | REG_FuncEventMask = 0xF4 |
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77 | REG_FuncPresetState = 0xF8 |
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78 | REG_FuncForceEvent = 0xFC |
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1554 | hidnplayr | 79 | |
2387 | hidnplayr | 80 | ; InterruptStatusBits |
2916 | hidnplayr | 81 | ISB_SYSErr = 0x8000 |
82 | ISB_PCSTimeout = 0x4000 |
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83 | ISB_SWInt = 0x0100 |
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84 | ISB_TxDescUnavail = 0x80 |
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85 | ISB_RxFIFOOver = 0x40 |
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86 | ISB_LinkChg = 0x20 |
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87 | ISB_RxOverflow = 0x10 |
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88 | ISB_TxErr = 0x08 |
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89 | ISB_TxOK = 0x04 |
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90 | ISB_RxErr = 0x02 |
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91 | ISB_RxOK = 0x01 |
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1554 | hidnplayr | 92 | |
2387 | hidnplayr | 93 | ; RxStatusDesc |
2916 | hidnplayr | 94 | SD_RxRES = 0x00200000 |
95 | SD_RxCRC = 0x00080000 |
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96 | SD_RxRUNT = 0x00100000 |
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97 | SD_RxRWT = 0x00400000 |
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1554 | hidnplayr | 98 | |
2387 | hidnplayr | 99 | ; ChipCmdBits |
2916 | hidnplayr | 100 | CMD_Reset = 0x10 |
101 | CMD_RxEnb = 0x08 |
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102 | CMD_TxEnb = 0x04 |
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103 | CMD_RxBufEmpty = 0x01 |
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1554 | hidnplayr | 104 | |
2387 | hidnplayr | 105 | ; Cfg9346Bits |
2916 | hidnplayr | 106 | CFG_9346_Lock = 0x00 |
107 | CFG_9346_Unlock = 0xC0 |
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1554 | hidnplayr | 108 | |
2387 | hidnplayr | 109 | ; rx_mode_bits |
2916 | hidnplayr | 110 | RXM_AcceptErr = 0x20 |
111 | RXM_AcceptRunt = 0x10 |
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112 | RXM_AcceptBroadcast = 0x08 |
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113 | RXM_AcceptMulticast = 0x04 |
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114 | RXM_AcceptMyPhys = 0x02 |
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115 | RXM_AcceptAllPhys = 0x01 |
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1554 | hidnplayr | 116 | |
2387 | hidnplayr | 117 | ; RxConfigBits |
2916 | hidnplayr | 118 | RXC_FIFOShift = 13 |
119 | RXC_DMAShift = 8 |
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1554 | hidnplayr | 120 | |
2387 | hidnplayr | 121 | ; TxConfigBits |
2916 | hidnplayr | 122 | TXC_InterFrameGapShift = 24 |
123 | TXC_DMAShift = 8 ; DMA burst value (0-7) is shift this many bits |
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1554 | hidnplayr | 124 | |
2387 | hidnplayr | 125 | ; PHYstatus |
2916 | hidnplayr | 126 | PHYS_TBI_Enable = 0x80 |
127 | PHYS_TxFlowCtrl = 0x40 |
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128 | PHYS_RxFlowCtrl = 0x20 |
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129 | PHYS_1000bpsF = 0x10 |
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130 | PHYS_100bps = 0x08 |
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131 | PHYS_10bps = 0x04 |
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132 | PHYS_LinkStatus = 0x02 |
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133 | PHYS_FullDup = 0x01 |
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1554 | hidnplayr | 134 | |
2387 | hidnplayr | 135 | ; GIGABIT_PHY_registers |
2916 | hidnplayr | 136 | PHY_CTRL_REG = 0 |
137 | PHY_STAT_REG = 1 |
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138 | PHY_AUTO_NEGO_REG = 4 |
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139 | PHY_1000_CTRL_REG = 9 |
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1554 | hidnplayr | 140 | |
2387 | hidnplayr | 141 | ; GIGABIT_PHY_REG_BIT |
2916 | hidnplayr | 142 | PHY_Restart_Auto_Nego = 0x0200 |
143 | PHY_Enable_Auto_Nego = 0x1000 |
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1554 | hidnplayr | 144 | |
2916 | hidnplayr | 145 | ; PHY_STAT_REG = 1 |
146 | PHY_Auto_Neco_Comp = 0x0020 |
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1554 | hidnplayr | 147 | |
2916 | hidnplayr | 148 | ; PHY_AUTO_NEGO_REG = 4 |
149 | PHY_Cap_10_Half = 0x0020 |
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150 | PHY_Cap_10_Full = 0x0040 |
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151 | PHY_Cap_100_Half = 0x0080 |
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152 | PHY_Cap_100_Full = 0x0100 |
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1554 | hidnplayr | 153 | |
2916 | hidnplayr | 154 | ; PHY_1000_CTRL_REG = 9 |
155 | PHY_Cap_1000_Full = 0x0200 |
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156 | PHY_Cap_1000_Half = 0x0100 |
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1554 | hidnplayr | 157 | |
2916 | hidnplayr | 158 | PHY_Cap_PAUSE = 0x0400 |
159 | PHY_Cap_ASYM_PAUSE = 0x0800 |
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1554 | hidnplayr | 160 | |
2916 | hidnplayr | 161 | PHY_Cap_Null = 0x0 |
1554 | hidnplayr | 162 | |
2387 | hidnplayr | 163 | ; _MediaType |
2916 | hidnplayr | 164 | MT_10_Half = 0x01 |
165 | MT_10_Full = 0x02 |
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166 | MT_100_Half = 0x04 |
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167 | MT_100_Full = 0x08 |
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168 | MT_1000_Full = 0x10 |
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1554 | hidnplayr | 169 | |
2387 | hidnplayr | 170 | ; _TBICSRBit |
2916 | hidnplayr | 171 | TBI_LinkOK = 0x02000000 |
1554 | hidnplayr | 172 | |
2387 | hidnplayr | 173 | ; _DescStatusBit |
2916 | hidnplayr | 174 | DSB_OWNbit = 0x80000000 |
175 | DSB_EORbit = 0x40000000 |
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176 | DSB_FSbit = 0x20000000 |
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177 | DSB_LSbit = 0x10000000 |
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1554 | hidnplayr | 178 | |
2916 | hidnplayr | 179 | RX_BUF_SIZE = 1536 ; Rx Buffer size |
1554 | hidnplayr | 180 | |
181 | ; max supported gigabit ethernet frame size -- must be at least (dev->mtu+14+4) |
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2916 | hidnplayr | 182 | MAX_ETH_FRAME_SIZE = 1536 |
1554 | hidnplayr | 183 | |
2916 | hidnplayr | 184 | TX_FIFO_THRESH = 256 ; In bytes |
1554 | hidnplayr | 185 | |
2916 | hidnplayr | 186 | RX_FIFO_THRESH = 7 ; 7 means NO threshold, Rx buffer level before first PCI xfer |
187 | RX_DMA_BURST = 7 ; Maximum PCI burst, '6' is 1024 |
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188 | TX_DMA_BURST = 7 ; Maximum PCI burst, '6' is 1024 |
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189 | ETTh = 0x3F ; 0x3F means NO threshold |
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1554 | hidnplayr | 190 | |
2916 | hidnplayr | 191 | EarlyTxThld = 0x3F ; 0x3F means NO early transmit |
192 | RxPacketMaxSize = 0x0800 ; Maximum size supported is 16K-1 |
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193 | InterFrameGap = 0x03 ; 3 means InterFrameGap = the shortest one |
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1554 | hidnplayr | 194 | |
2916 | hidnplayr | 195 | HZ = 1000 |
1554 | hidnplayr | 196 | |
2916 | hidnplayr | 197 | RTL_MIN_IO_SIZE = 0x80 |
198 | TX_TIMEOUT = (6*HZ) |
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1554 | hidnplayr | 199 | |
2916 | hidnplayr | 200 | TIMER_EXPIRE_TIME = 100 |
1554 | hidnplayr | 201 | |
2916 | hidnplayr | 202 | ETH_HDR_LEN = 14 |
203 | DEFAULT_MTU = 1500 |
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204 | DEFAULT_RX_BUF_LEN = 1536 |
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1554 | hidnplayr | 205 | |
206 | |||
2916 | hidnplayr | 207 | ;ifdef JUMBO_FRAME_SUPPORT |
208 | ; MAX_JUMBO_FRAME_MTU = 10000 |
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209 | ; MAX_RX_SKBDATA_SIZE = (MAX_JUMBO_FRAME_MTU + ETH_HDR_LEN ) |
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210 | ;else |
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211 | MAX_RX_SKBDATA_SIZE = 1600 |
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212 | ;end if |
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1554 | hidnplayr | 213 | |
2916 | hidnplayr | 214 | MCFG_METHOD_01 = 0x01 |
215 | MCFG_METHOD_02 = 0x02 |
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216 | MCFG_METHOD_03 = 0x03 |
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217 | MCFG_METHOD_04 = 0x04 |
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218 | MCFG_METHOD_05 = 0x05 |
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219 | MCFG_METHOD_11 = 0x0b |
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220 | MCFG_METHOD_12 = 0x0c |
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221 | MCFG_METHOD_13 = 0x0d |
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222 | MCFG_METHOD_14 = 0x0e |
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223 | MCFG_METHOD_15 = 0x0f |
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1554 | hidnplayr | 224 | |
2916 | hidnplayr | 225 | PCFG_METHOD_1 = 0x01 ; PHY Reg 0x03 bit0-3 == 0x0000 |
226 | PCFG_METHOD_2 = 0x02 ; PHY Reg 0x03 bit0-3 == 0x0001 |
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227 | PCFG_METHOD_3 = 0x03 ; PHY Reg 0x03 bit0-3 == 0x0002 |
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1554 | hidnplayr | 228 | |
229 | virtual at 0 |
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230 | tx_desc: |
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231 | .status dd ? |
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232 | .vlan_tag dd ? |
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1557 | hidnplayr | 233 | .buf_addr dq ? |
1554 | hidnplayr | 234 | .size = $ |
2387 | hidnplayr | 235 | rb (NUM_TX_DESC-1)*tx_desc.size |
236 | .buf_soft_addr dd ? |
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1554 | hidnplayr | 237 | end virtual |
238 | |||
239 | virtual at 0 |
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240 | rx_desc: |
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241 | .status dd ? |
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242 | .vlan_tag dd ? |
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1557 | hidnplayr | 243 | .buf_addr dq ? |
1554 | hidnplayr | 244 | .size = $ |
2387 | hidnplayr | 245 | rb (NUM_RX_DESC-1)*rx_desc.size |
246 | .buf_soft_addr dd ? |
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1554 | hidnplayr | 247 | end virtual |
248 | |||
249 | virtual at ebx |
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250 | |||
2387 | hidnplayr | 251 | device: |
1554 | hidnplayr | 252 | |
2387 | hidnplayr | 253 | ETH_DEVICE |
1554 | hidnplayr | 254 | |
2387 | hidnplayr | 255 | .io_addr dd ? |
3205 | hidnplayr | 256 | .pci_bus dd ? |
257 | .pci_dev dd ? |
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2387 | hidnplayr | 258 | .irq_line db ? |
1554 | hidnplayr | 259 | |
2916 | hidnplayr | 260 | rb 256-(($ - device) and 255) ; align 256 |
261 | .tx_ring rb NUM_TX_DESC * tx_desc.size * 2 |
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262 | |||
263 | rb 256-(($ - device) and 255) ; align 256 |
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264 | .rx_ring rb NUM_RX_DESC * rx_desc.size * 2 |
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265 | |||
2387 | hidnplayr | 266 | tpc: |
267 | .mmio_addr dd ? ; memory map physical address |
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268 | .chipset dd ? |
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269 | .pcfg dd ? |
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270 | .mcfg dd ? |
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271 | .cur_rx dd ? ; Index into the Rx descriptor buffer of next Rx pkt |
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272 | .cur_tx dd ? ; Index into the Tx descriptor buffer of next Rx pkt |
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273 | .TxDescArrays dd ? ; Index of Tx Descriptor buffer |
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274 | .RxDescArrays dd ? ; Index of Rx Descriptor buffer |
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275 | .TxDescArray dd ? ; Index of 256-alignment Tx Descriptor buffer |
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276 | .RxDescArray dd ? ; Index of 256-alignment Rx Descriptor buffer |
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1554 | hidnplayr | 277 | |
2387 | hidnplayr | 278 | device_size = $ - device |
1554 | hidnplayr | 279 | |
280 | end virtual |
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281 | |||
2916 | hidnplayr | 282 | intr_mask = ISB_LinkChg or ISB_RxOverflow or ISB_RxFIFOOver or ISB_TxErr or ISB_TxOK or ISB_RxErr or ISB_RxOK |
283 | rx_config = (RX_FIFO_THRESH shl RXC_FIFOShift) or (RX_DMA_BURST shl RXC_DMAShift) or 0x0000000E |
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1554 | hidnplayr | 284 | |
285 | |||
2387 | hidnplayr | 286 | macro udelay msec { |
1554 | hidnplayr | 287 | |
2387 | hidnplayr | 288 | push esi |
289 | mov esi, msec |
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290 | call Sleep |
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291 | pop esi |
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1554 | hidnplayr | 292 | |
293 | } |
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294 | |||
2387 | hidnplayr | 295 | macro WRITE_GMII_REG RegAddr, value { |
1554 | hidnplayr | 296 | |
2387 | hidnplayr | 297 | set_io REG_PHYAR |
298 | if value eq ax |
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299 | and eax, 0x0000ffff |
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300 | or eax, 0x80000000 + (RegAddr shl 16) |
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301 | else |
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302 | mov eax, 0x80000000 + (RegAddr shl 16) + value |
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303 | end if |
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304 | out dx, eax |
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1554 | hidnplayr | 305 | |
2918 | hidnplayr | 306 | call PHY_WAIT_WRITE |
1554 | hidnplayr | 307 | } |
308 | |||
2387 | hidnplayr | 309 | macro READ_GMII_REG RegAddr { |
1554 | hidnplayr | 310 | |
2387 | hidnplayr | 311 | local .error, .done |
1554 | hidnplayr | 312 | |
2387 | hidnplayr | 313 | set_io REG_PHYAR |
314 | mov eax, RegAddr shl 16 |
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315 | out dx, eax |
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1554 | hidnplayr | 316 | |
2918 | hidnplayr | 317 | call PHY_WAIT_READ |
2387 | hidnplayr | 318 | jz .error |
1554 | hidnplayr | 319 | |
2387 | hidnplayr | 320 | in eax, dx |
321 | and eax, 0xFFFF |
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322 | jmp .done |
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1554 | hidnplayr | 323 | |
324 | .error: |
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2387 | hidnplayr | 325 | or eax, -1 |
1554 | hidnplayr | 326 | .done: |
327 | } |
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328 | |||
329 | align 4 |
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2918 | hidnplayr | 330 | PHY_WAIT_READ: ; io addr must already be set to REG_PHYAR |
1554 | hidnplayr | 331 | |
2387 | hidnplayr | 332 | udelay 1 ;;;1000 |
1554 | hidnplayr | 333 | |
2387 | hidnplayr | 334 | push ecx |
335 | mov ecx, 2000 |
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336 | ; Check if the RTL8169 has completed writing/reading to the specified MII register |
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1554 | hidnplayr | 337 | @@: |
2387 | hidnplayr | 338 | in eax, dx |
339 | test eax, 0x80000000 |
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2918 | hidnplayr | 340 | jnz .exit |
341 | udelay 1 ;;;100 |
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342 | loop @b |
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343 | .exit: |
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344 | pop ecx |
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345 | ret |
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346 | |||
347 | align 4 |
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348 | PHY_WAIT_WRITE: ; io addr must already be set to REG_PHYAR |
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349 | |||
350 | udelay 1 ;;;1000 |
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351 | |||
352 | push ecx |
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353 | mov ecx, 2000 |
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354 | ; Check if the RTL8169 has completed writing/reading to the specified MII register |
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355 | @@: |
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356 | in eax, dx |
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357 | test eax, 0x80000000 |
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2387 | hidnplayr | 358 | jz .exit |
359 | udelay 1 ;;;100 |
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360 | loop @b |
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1554 | hidnplayr | 361 | .exit: |
2387 | hidnplayr | 362 | pop ecx |
363 | ret |
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1554 | hidnplayr | 364 | |
365 | |||
366 | |||
367 | section '.flat' code readable align 16 |
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368 | |||
369 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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370 | ;; ;; |
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371 | ;; proc START ;; |
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372 | ;; ;; |
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373 | ;; (standard driver proc) ;; |
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374 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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375 | |||
376 | align 4 |
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377 | proc START stdcall, state:dword |
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378 | |||
2387 | hidnplayr | 379 | cmp [state], 1 |
380 | jne .exit |
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1554 | hidnplayr | 381 | |
382 | .entry: |
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383 | |||
2916 | hidnplayr | 384 | DEBUGF 2,"Loading %s driver\n", my_service |
2387 | hidnplayr | 385 | stdcall RegService, my_service, service_proc |
386 | ret |
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1554 | hidnplayr | 387 | |
388 | .fail: |
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389 | .exit: |
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2387 | hidnplayr | 390 | xor eax, eax |
391 | ret |
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1554 | hidnplayr | 392 | |
393 | endp |
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394 | |||
395 | |||
396 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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397 | ;; ;; |
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398 | ;; proc SERVICE_PROC ;; |
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399 | ;; ;; |
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400 | ;; (standard driver proc) ;; |
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401 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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402 | |||
403 | align 4 |
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404 | proc service_proc stdcall, ioctl:dword |
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405 | |||
2387 | hidnplayr | 406 | mov edx, [ioctl] |
407 | mov eax, [IOCTL.io_code] |
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1554 | hidnplayr | 408 | |
409 | ;------------------------------------------------------ |
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410 | |||
2387 | hidnplayr | 411 | cmp eax, 0 ;SRV_GETVERSION |
412 | jne @F |
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1554 | hidnplayr | 413 | |
2387 | hidnplayr | 414 | cmp [IOCTL.out_size], 4 |
3155 | hidnplayr | 415 | jb .fail |
2387 | hidnplayr | 416 | mov eax, [IOCTL.output] |
417 | mov [eax], dword API_VERSION |
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1554 | hidnplayr | 418 | |
2387 | hidnplayr | 419 | xor eax, eax |
420 | ret |
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1554 | hidnplayr | 421 | |
422 | ;------------------------------------------------------ |
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423 | @@: |
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2387 | hidnplayr | 424 | cmp eax, 1 ;SRV_HOOK |
425 | jne .fail |
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1554 | hidnplayr | 426 | |
2387 | hidnplayr | 427 | cmp [IOCTL.inp_size], 3 ; Data input must be at least 3 bytes |
3155 | hidnplayr | 428 | jb .fail |
1554 | hidnplayr | 429 | |
2387 | hidnplayr | 430 | mov eax, [IOCTL.input] |
431 | cmp byte [eax], 1 ; 1 means device number and bus number (pci) are given |
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432 | jne .fail ; other types arent supported for this card yet |
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1554 | hidnplayr | 433 | |
434 | ; check if the device is already listed |
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435 | |||
2387 | hidnplayr | 436 | mov esi, device_list |
437 | mov ecx, [devices] |
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438 | test ecx, ecx |
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439 | jz .firstdevice |
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1554 | hidnplayr | 440 | |
441 | ; mov eax, [IOCTL.input] ; get the pci bus and device numbers |
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2387 | hidnplayr | 442 | mov ax , [eax+1] ; |
1554 | hidnplayr | 443 | .nextdevice: |
2387 | hidnplayr | 444 | mov ebx, [esi] |
3205 | hidnplayr | 445 | cmp al, byte[device.pci_bus] |
446 | jne @f |
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447 | cmp ah, byte[device.pci_dev] |
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2387 | hidnplayr | 448 | je .find_devicenum ; Device is already loaded, let's find it's device number |
3205 | hidnplayr | 449 | @@: |
2387 | hidnplayr | 450 | add esi, 4 |
451 | loop .nextdevice |
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1554 | hidnplayr | 452 | |
453 | |||
454 | ; This device doesnt have its own eth_device structure yet, lets create one |
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455 | .firstdevice: |
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2387 | hidnplayr | 456 | cmp [devices], MAX_DEVICES ; First check if the driver can handle one more card |
3155 | hidnplayr | 457 | jae .fail |
1554 | hidnplayr | 458 | |
2387 | hidnplayr | 459 | allocate_and_clear ebx, device_size, .fail ; Allocate memory to put the device structure in |
1554 | hidnplayr | 460 | |
461 | ; Fill in the direct call addresses into the struct |
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462 | |||
2387 | hidnplayr | 463 | mov [device.reset], reset |
464 | mov [device.transmit], transmit |
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465 | mov [device.unload], unload |
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466 | mov [device.name], my_service |
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1554 | hidnplayr | 467 | |
468 | ; save the pci bus and device numbers |
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469 | |||
2387 | hidnplayr | 470 | mov eax, [IOCTL.input] |
3205 | hidnplayr | 471 | movzx ecx, byte[eax+1] |
472 | mov [device.pci_bus], ecx |
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473 | movzx ecx, byte[eax+2] |
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474 | mov [device.pci_dev], ecx |
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1554 | hidnplayr | 475 | |
476 | ; Now, it's time to find the base io addres of the PCI device |
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477 | |||
3205 | hidnplayr | 478 | PCI_find_io |
479 | mov [tpc.mmio_addr], eax ; CHECKME |
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1554 | hidnplayr | 480 | |
481 | ; We've found the io address, find IRQ now |
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482 | |||
3205 | hidnplayr | 483 | PCI_find_irq |
1554 | hidnplayr | 484 | |
2387 | hidnplayr | 485 | DEBUGF 2,"Hooking into device, dev:%x, bus:%x, irq:%x, addr:%x\n",\ |
486 | [device.pci_dev]:1,[device.pci_bus]:1,[device.irq_line]:1,[device.io_addr]:8 |
||
1554 | hidnplayr | 487 | |
488 | ; Ok, the eth_device structure is ready, let's probe the device |
||
489 | ; Because initialization fires IRQ, IRQ handler must be aware of this device |
||
2387 | hidnplayr | 490 | mov eax, [devices] ; Add the device structure to our device list |
2916 | hidnplayr | 491 | mov [device_list + 4*eax], ebx ; (IRQ handler uses this list to find device) |
2387 | hidnplayr | 492 | inc [devices] ; |
1554 | hidnplayr | 493 | |
2387 | hidnplayr | 494 | call probe ; this function will output in eax |
495 | test eax, eax |
||
496 | jnz .err2 ; If an error occured, exit |
||
1554 | hidnplayr | 497 | |
2387 | hidnplayr | 498 | mov [device.type], NET_TYPE_ETH |
499 | call NetRegDev |
||
1554 | hidnplayr | 500 | |
2387 | hidnplayr | 501 | cmp eax, -1 |
502 | je .destroy |
||
1554 | hidnplayr | 503 | |
2387 | hidnplayr | 504 | ret |
1554 | hidnplayr | 505 | |
506 | ; If the device was already loaded, find the device number and return it in eax |
||
507 | |||
508 | .find_devicenum: |
||
2387 | hidnplayr | 509 | DEBUGF 2,"Trying to find device number of already registered device\n" |
510 | call NetPtrToNum ; This kernel procedure converts a pointer to device struct in ebx |
||
511 | ; into a device number in edi |
||
512 | mov eax, edi ; Application wants it in eax instead |
||
513 | DEBUGF 2,"Kernel says: %u\n", eax |
||
514 | ret |
||
1554 | hidnplayr | 515 | |
516 | ; If an error occured, remove all allocated data and exit (returning -1 in eax) |
||
517 | |||
518 | .destroy: |
||
2387 | hidnplayr | 519 | ; todo: reset device into virgin state |
1554 | hidnplayr | 520 | |
521 | .err2: |
||
2387 | hidnplayr | 522 | dec [devices] |
1554 | hidnplayr | 523 | .err: |
2387 | hidnplayr | 524 | DEBUGF 2,"removing device structure\n" |
525 | stdcall KernelFree, ebx |
||
1554 | hidnplayr | 526 | .fail: |
2387 | hidnplayr | 527 | or eax, -1 |
528 | ret |
||
1554 | hidnplayr | 529 | |
530 | ;------------------------------------------------------ |
||
531 | endp |
||
532 | |||
533 | |||
534 | align 4 |
||
535 | unload: |
||
536 | |||
2387 | hidnplayr | 537 | ret |
1554 | hidnplayr | 538 | |
539 | |||
540 | align 4 |
||
541 | init_board: |
||
542 | |||
2387 | hidnplayr | 543 | DEBUGF 1,"init_board\n" |
1554 | hidnplayr | 544 | |
3205 | hidnplayr | 545 | PCI_make_bus_master |
1554 | hidnplayr | 546 | |
2387 | hidnplayr | 547 | ; Soft reset the chip |
548 | set_io 0 |
||
549 | set_io REG_ChipCmd |
||
550 | mov al, CMD_Reset |
||
551 | out dx, al |
||
1554 | hidnplayr | 552 | |
2387 | hidnplayr | 553 | ; Check that the chip has finished the reset |
554 | mov ecx, 1000 |
||
555 | set_io REG_ChipCmd |
||
556 | @@: in al, dx |
||
557 | test al, CMD_Reset |
||
558 | jz @f |
||
559 | udelay 10 |
||
560 | loop @b |
||
1554 | hidnplayr | 561 | @@: |
2387 | hidnplayr | 562 | ; identify config method |
563 | set_io REG_TxConfig |
||
564 | in eax, dx |
||
565 | and eax, 0x7c800000 |
||
566 | DEBUGF 1,"init_board: TxConfig & 0x7c800000 = 0x%x\n", eax |
||
567 | mov esi, mac_info-8 |
||
568 | @@: add esi, 8 |
||
569 | mov ecx, eax |
||
570 | and ecx, [esi] |
||
571 | cmp ecx, [esi] |
||
572 | jne @b |
||
573 | mov eax, [esi+4] |
||
574 | mov [tpc.mcfg], eax |
||
1554 | hidnplayr | 575 | |
2387 | hidnplayr | 576 | mov [tpc.pcfg], PCFG_METHOD_3 |
577 | READ_GMII_REG 3 |
||
578 | and al, 0x0f |
||
579 | or al, al |
||
580 | jnz @f |
||
581 | mov [tpc.pcfg], PCFG_METHOD_1 |
||
582 | jmp .pconf |
||
583 | @@: dec al |
||
584 | jnz .pconf |
||
585 | mov [tpc.pcfg], PCFG_METHOD_2 |
||
1554 | hidnplayr | 586 | .pconf: |
587 | |||
2387 | hidnplayr | 588 | ; identify chip attached to board |
589 | mov ecx, 10 |
||
590 | mov eax, [tpc.mcfg] |
||
591 | @@: dec ecx |
||
592 | js @f |
||
2916 | hidnplayr | 593 | cmp eax, [rtl_chip_info + ecx*8] |
2387 | hidnplayr | 594 | jne @b |
595 | mov [tpc.chipset], ecx |
||
596 | jmp .match |
||
1554 | hidnplayr | 597 | @@: |
2387 | hidnplayr | 598 | ; if unknown chip, assume array element #0, original RTL-8169 in this case |
599 | DEBUGF 1,"init_board: PCI device: unknown chip version, assuming RTL-8169\n" |
||
600 | set_io REG_TxConfig |
||
601 | in eax, dx |
||
602 | DEBUGF 1,"init_board: PCI device: TxConfig = 0x%x\n", eax |
||
1554 | hidnplayr | 603 | |
2387 | hidnplayr | 604 | mov [tpc.chipset], 0 |
1554 | hidnplayr | 605 | |
2387 | hidnplayr | 606 | xor eax, eax |
607 | inc eax |
||
608 | ret |
||
1554 | hidnplayr | 609 | |
610 | .match: |
||
2387 | hidnplayr | 611 | DEBUGF 1,"init_board: chipset=%u\n", ecx |
612 | xor eax,eax |
||
613 | ret |
||
1554 | hidnplayr | 614 | |
615 | |||
616 | |||
617 | ;*************************************************************************** |
||
618 | ; Function |
||
619 | ; probe |
||
620 | ; Description |
||
621 | ; Searches for an ethernet card, enables it and clears the rx buffer |
||
622 | ; If a card was found, it enables the ethernet -> TCPIP link |
||
623 | ; Destroyed registers |
||
624 | ; eax, ebx, ecx, edx |
||
625 | ; |
||
626 | ;*************************************************************************** |
||
627 | align 4 |
||
628 | probe: |
||
629 | |||
2387 | hidnplayr | 630 | DEBUGF 1,"probe\n" |
1554 | hidnplayr | 631 | |
2387 | hidnplayr | 632 | call init_board |
633 | call read_mac |
||
634 | call PHY_config |
||
1554 | hidnplayr | 635 | |
636 | ; DEBUGF 1,"K : Set MAC Reg C+CR Offset 0x82h = 0x01h\n" |
||
2387 | hidnplayr | 637 | set_io 0 |
638 | set_io 0x82 |
||
639 | mov al, 0x01 |
||
640 | out dx, al |
||
641 | cmp [tpc.mcfg], MCFG_METHOD_03 |
||
642 | jae @f |
||
1554 | hidnplayr | 643 | ; DEBUGF 1,"K : Set PCI Latency=0x40\n" |
644 | ; stdcall pci_write_config_byte,PCI_LATENCY_TIMER,0x40 |
||
645 | @@: |
||
2387 | hidnplayr | 646 | cmp [tpc.mcfg], MCFG_METHOD_02 |
647 | jne @f |
||
1554 | hidnplayr | 648 | ; DEBUGF 1,"K : Set MAC Reg C+CR Offset 0x82h = 0x01h\n" |
2387 | hidnplayr | 649 | set_io 0x82 |
650 | mov al, 0x01 |
||
651 | out dx, al |
||
1554 | hidnplayr | 652 | ; DEBUGF 1,"K : Set PHY Reg 0x0bh = 0x00h\n" |
2387 | hidnplayr | 653 | WRITE_GMII_REG 0x0b, 0x0000 ; w 0x0b 15 0 0 |
1554 | hidnplayr | 654 | @@: |
2387 | hidnplayr | 655 | ; if TBI is not enabled |
656 | set_io 0 |
||
657 | set_io REG_PHYstatus |
||
658 | in al, dx |
||
659 | test al, PHYS_TBI_Enable |
||
660 | jz .tbi_dis |
||
661 | READ_GMII_REG PHY_AUTO_NEGO_REG |
||
1554 | hidnplayr | 662 | |
2387 | hidnplayr | 663 | ; enable 10/100 Full/Half Mode, leave PHY_AUTO_NEGO_REG bit4:0 unchanged |
664 | and eax, 0x0C1F |
||
665 | or eax, PHY_Cap_10_Half or PHY_Cap_10_Full or PHY_Cap_100_Half or PHY_Cap_100_Full |
||
666 | WRITE_GMII_REG PHY_AUTO_NEGO_REG, ax |
||
1554 | hidnplayr | 667 | |
2387 | hidnplayr | 668 | ; enable 1000 Full Mode |
669 | WRITE_GMII_REG PHY_1000_CTRL_REG, PHY_Cap_1000_Full or PHY_Cap_1000_Half ; rtl8168 |
||
1554 | hidnplayr | 670 | |
2387 | hidnplayr | 671 | ; Enable auto-negotiation and restart auto-nigotiation |
672 | WRITE_GMII_REG PHY_CTRL_REG, PHY_Enable_Auto_Nego or PHY_Restart_Auto_Nego |
||
1554 | hidnplayr | 673 | |
2387 | hidnplayr | 674 | udelay 100 |
675 | mov ecx, 10000 |
||
676 | ; wait for auto-negotiation process |
||
677 | @@: dec ecx |
||
678 | jz @f |
||
679 | set_io 0 |
||
680 | READ_GMII_REG PHY_STAT_REG |
||
681 | udelay 100 |
||
682 | test eax, PHY_Auto_Neco_Comp |
||
683 | jz @b |
||
684 | set_io REG_PHYstatus |
||
685 | in al, dx |
||
686 | jmp @f |
||
1554 | hidnplayr | 687 | .tbi_dis: |
2387 | hidnplayr | 688 | udelay 100 |
1554 | hidnplayr | 689 | @@: |
690 | |||
691 | |||
692 | ;*************************************************************************** |
||
693 | ; Function |
||
694 | ; rt8169_reset |
||
695 | ; Description |
||
696 | ; Place the chip (ie, the ethernet card) into a virgin state |
||
697 | ; Destroyed registers |
||
698 | ; eax, ebx, ecx, edx |
||
699 | ; |
||
700 | ;*************************************************************************** |
||
701 | align 4 |
||
702 | reset: |
||
703 | |||
2387 | hidnplayr | 704 | DEBUGF 1,"reset\n" |
1554 | hidnplayr | 705 | |
2916 | hidnplayr | 706 | lea eax, [device.tx_ring] |
2387 | hidnplayr | 707 | mov [tpc.TxDescArrays], eax |
708 | mov [tpc.TxDescArray], eax |
||
1554 | hidnplayr | 709 | |
2916 | hidnplayr | 710 | lea eax, [device.rx_ring] |
2387 | hidnplayr | 711 | mov [tpc.RxDescArrays], eax |
712 | mov [tpc.RxDescArray], eax |
||
1554 | hidnplayr | 713 | |
2387 | hidnplayr | 714 | call init_ring |
715 | call hw_start |
||
1554 | hidnplayr | 716 | |
1558 | hidnplayr | 717 | ; clear packet/byte counters |
718 | |||
2387 | hidnplayr | 719 | xor eax, eax |
720 | lea edi, [device.bytes_tx] |
||
721 | mov ecx, 6 |
||
722 | rep stosd |
||
1558 | hidnplayr | 723 | |
2387 | hidnplayr | 724 | mov [device.mtu], 1500 |
1554 | hidnplayr | 725 | |
3346 | hidnplayr | 726 | ; Set link state to unknown |
727 | mov [device.state], ETH_LINK_UNKOWN |
||
728 | |||
2387 | hidnplayr | 729 | xor eax, eax |
730 | ret |
||
1554 | hidnplayr | 731 | |
732 | |||
733 | |||
734 | |||
735 | |||
736 | align 4 |
||
737 | PHY_config: |
||
738 | |||
2387 | hidnplayr | 739 | DEBUGF 1,"hw_PHY_config: priv.mcfg=%d, priv.pcfg=%d\n",[tpc.mcfg],[tpc.pcfg] |
1554 | hidnplayr | 740 | |
2387 | hidnplayr | 741 | cmp [tpc.mcfg], MCFG_METHOD_04 |
742 | jne .not_4 |
||
743 | set_io 0 |
||
1554 | hidnplayr | 744 | ; WRITE_GMII_REG 0x1F, 0x0001 |
745 | ; WRITE_GMII_REG 0x1b, 0x841e |
||
746 | ; WRITE_GMII_REG 0x0e, 0x7bfb |
||
747 | ; WRITE_GMII_REG 0x09, 0x273a |
||
2387 | hidnplayr | 748 | WRITE_GMII_REG 0x1F, 0x0002 |
749 | WRITE_GMII_REG 0x01, 0x90D0 |
||
750 | WRITE_GMII_REG 0x1F, 0x0000 |
||
751 | jmp .exit |
||
1554 | hidnplayr | 752 | .not_4: |
2387 | hidnplayr | 753 | cmp [tpc.mcfg], MCFG_METHOD_02 |
754 | je @f |
||
755 | cmp [tpc.mcfg], MCFG_METHOD_03 |
||
756 | jne .not_2_or_3 |
||
1557 | hidnplayr | 757 | @@: |
2387 | hidnplayr | 758 | set_io 0 |
759 | WRITE_GMII_REG 0x1F, 0x0001 |
||
760 | WRITE_GMII_REG 0x15, 0x1000 |
||
761 | WRITE_GMII_REG 0x18, 0x65C7 |
||
762 | WRITE_GMII_REG 0x04, 0x0000 |
||
763 | WRITE_GMII_REG 0x03, 0x00A1 |
||
764 | WRITE_GMII_REG 0x02, 0x0008 |
||
765 | WRITE_GMII_REG 0x01, 0x1020 |
||
766 | WRITE_GMII_REG 0x00, 0x1000 |
||
767 | WRITE_GMII_REG 0x04, 0x0800 |
||
768 | WRITE_GMII_REG 0x04, 0x0000 |
||
769 | WRITE_GMII_REG 0x04, 0x7000 |
||
770 | WRITE_GMII_REG 0x03, 0xFF41 |
||
771 | WRITE_GMII_REG 0x02, 0xDE60 |
||
772 | WRITE_GMII_REG 0x01, 0x0140 |
||
773 | WRITE_GMII_REG 0x00, 0x0077 |
||
774 | WRITE_GMII_REG 0x04, 0x7800 |
||
775 | WRITE_GMII_REG 0x04, 0x7000 |
||
776 | WRITE_GMII_REG 0x04, 0xA000 |
||
777 | WRITE_GMII_REG 0x03, 0xDF01 |
||
778 | WRITE_GMII_REG 0x02, 0xDF20 |
||
779 | WRITE_GMII_REG 0x01, 0xFF95 |
||
780 | WRITE_GMII_REG 0x00, 0xFA00 |
||
781 | WRITE_GMII_REG 0x04, 0xA800 |
||
782 | WRITE_GMII_REG 0x04, 0xA000 |
||
783 | WRITE_GMII_REG 0x04, 0xB000 |
||
784 | WRITE_GMII_REG 0x03, 0xFF41 |
||
785 | WRITE_GMII_REG 0x02, 0xDE20 |
||
786 | WRITE_GMII_REG 0x01, 0x0140 |
||
787 | WRITE_GMII_REG 0x00, 0x00BB |
||
788 | WRITE_GMII_REG 0x04, 0xB800 |
||
789 | WRITE_GMII_REG 0x04, 0xB000 |
||
790 | WRITE_GMII_REG 0x04, 0xF000 |
||
791 | WRITE_GMII_REG 0x03, 0xDF01 |
||
792 | WRITE_GMII_REG 0x02, 0xDF20 |
||
793 | WRITE_GMII_REG 0x01, 0xFF95 |
||
794 | WRITE_GMII_REG 0x00, 0xBF00 |
||
795 | WRITE_GMII_REG 0x04, 0xF800 |
||
796 | WRITE_GMII_REG 0x04, 0xF000 |
||
797 | WRITE_GMII_REG 0x04, 0x0000 |
||
798 | WRITE_GMII_REG 0x1F, 0x0000 |
||
799 | WRITE_GMII_REG 0x0B, 0x0000 |
||
800 | jmp .exit |
||
1554 | hidnplayr | 801 | .not_2_or_3: |
2387 | hidnplayr | 802 | DEBUGF 1,"tpc.mcfg=%d, discard hw PHY config\n", [tpc.mcfg] |
1554 | hidnplayr | 803 | .exit: |
2387 | hidnplayr | 804 | ret |
1554 | hidnplayr | 805 | |
806 | |||
807 | |||
808 | align 4 |
||
809 | set_rx_mode: |
||
810 | |||
2387 | hidnplayr | 811 | DEBUGF 1,"set_rx_mode\n" |
1554 | hidnplayr | 812 | |
2387 | hidnplayr | 813 | ; IFF_ALLMULTI |
814 | ; Too many to filter perfectly -- accept all multicasts |
||
815 | set_io 0 |
||
816 | set_io REG_RxConfig |
||
817 | in eax, dx |
||
818 | mov ecx, [tpc.chipset] |
||
819 | and eax, [rtl_chip_info + ecx * 8 + 4] ; RxConfigMask |
||
820 | or eax, rx_config or (RXM_AcceptBroadcast or RXM_AcceptMulticast or RXM_AcceptMyPhys) |
||
821 | out dx, eax |
||
1554 | hidnplayr | 822 | |
2387 | hidnplayr | 823 | ; Multicast hash filter |
824 | set_io REG_MAR0 + 0 |
||
825 | or eax, -1 |
||
826 | out dx, eax |
||
827 | set_io REG_MAR0 + 4 |
||
828 | out dx, eax |
||
1554 | hidnplayr | 829 | |
2387 | hidnplayr | 830 | ret |
1554 | hidnplayr | 831 | |
832 | |||
833 | align 4 |
||
834 | init_ring: |
||
835 | |||
2387 | hidnplayr | 836 | DEBUGF 1,"init_ring\n" |
1554 | hidnplayr | 837 | |
2387 | hidnplayr | 838 | xor eax, eax |
839 | mov [tpc.cur_rx], eax |
||
840 | mov [tpc.cur_tx], eax |
||
1554 | hidnplayr | 841 | |
2916 | hidnplayr | 842 | lea edi, [device.tx_ring] |
2387 | hidnplayr | 843 | mov ecx, (NUM_TX_DESC * tx_desc.size) / 4 |
844 | rep stosd |
||
1554 | hidnplayr | 845 | |
2916 | hidnplayr | 846 | lea edi, [device.rx_ring] |
2387 | hidnplayr | 847 | mov ecx, (NUM_RX_DESC * rx_desc.size) / 4 |
848 | rep stosd |
||
1554 | hidnplayr | 849 | |
2387 | hidnplayr | 850 | mov edi, [tpc.RxDescArray] |
851 | mov ecx, NUM_RX_DESC |
||
1557 | hidnplayr | 852 | .loop: |
2387 | hidnplayr | 853 | push ecx |
854 | stdcall KernelAlloc, RX_BUF_SIZE |
||
855 | mov [edi + rx_desc.buf_soft_addr], eax |
||
856 | call GetPgAddr |
||
857 | mov dword [edi + rx_desc.buf_addr], eax |
||
858 | mov [edi + rx_desc.status], DSB_OWNbit or RX_BUF_SIZE |
||
859 | add edi, rx_desc.size |
||
860 | pop ecx |
||
861 | loop .loop |
||
862 | or [edi - rx_desc.size + rx_desc.status], DSB_EORbit |
||
1554 | hidnplayr | 863 | |
2387 | hidnplayr | 864 | ret |
1554 | hidnplayr | 865 | |
866 | |||
867 | align 4 |
||
868 | hw_start: |
||
869 | |||
2387 | hidnplayr | 870 | DEBUGF 1,"hw_start\n" |
1554 | hidnplayr | 871 | |
1556 | hidnplayr | 872 | ; attach int handler |
2387 | hidnplayr | 873 | movzx eax, [device.irq_line] |
874 | DEBUGF 1,"Attaching int handler to irq %x\n", eax:1 |
||
875 | stdcall AttachIntHandler, eax, int_handler, dword 0 |
||
1556 | hidnplayr | 876 | |
2387 | hidnplayr | 877 | ; Soft reset the chip |
878 | set_io 0 |
||
879 | set_io REG_ChipCmd |
||
880 | mov al, CMD_Reset |
||
881 | out dx, al |
||
1554 | hidnplayr | 882 | |
2916 | hidnplayr | 883 | DEBUGF 1,"Waiting for chip to reset... " |
2387 | hidnplayr | 884 | ; Check that the chip has finished the reset |
885 | mov ecx, 1000 |
||
886 | set_io REG_ChipCmd |
||
887 | @@: in al, dx |
||
888 | test al, CMD_Reset |
||
889 | jz @f |
||
890 | udelay 10 |
||
891 | loop @b |
||
1554 | hidnplayr | 892 | @@: |
2916 | hidnplayr | 893 | DEBUGF 1,"done!\n" |
1554 | hidnplayr | 894 | |
2387 | hidnplayr | 895 | set_io REG_Cfg9346 |
896 | mov al, CFG_9346_Unlock |
||
897 | out dx, al |
||
1554 | hidnplayr | 898 | |
2387 | hidnplayr | 899 | set_io REG_ChipCmd |
900 | mov al, CMD_TxEnb or CMD_RxEnb |
||
901 | out dx, al |
||
1554 | hidnplayr | 902 | |
2387 | hidnplayr | 903 | set_io REG_ETThReg |
904 | mov al, ETTh |
||
905 | out dx, al |
||
1554 | hidnplayr | 906 | |
2387 | hidnplayr | 907 | ; For gigabit rtl8169 |
908 | set_io REG_RxMaxSize |
||
909 | mov ax, RxPacketMaxSize |
||
910 | out dx, ax |
||
1554 | hidnplayr | 911 | |
2387 | hidnplayr | 912 | ; Set Rx Config register |
913 | set_io REG_RxConfig |
||
914 | in ax, dx |
||
915 | mov ecx, [tpc.chipset] |
||
916 | and eax, [rtl_chip_info + ecx * 8 + 4] ; RxConfigMask |
||
917 | or eax, rx_config |
||
918 | out dx, eax |
||
1554 | hidnplayr | 919 | |
2387 | hidnplayr | 920 | ; Set DMA burst size and Interframe Gap Time |
921 | set_io REG_TxConfig |
||
922 | mov eax, (TX_DMA_BURST shl TXC_DMAShift) or (InterFrameGap shl TXC_InterFrameGapShift) |
||
923 | out dx, eax |
||
1554 | hidnplayr | 924 | |
2387 | hidnplayr | 925 | set_io REG_CPlusCmd |
926 | in ax, dx |
||
927 | out dx, ax |
||
1554 | hidnplayr | 928 | |
2387 | hidnplayr | 929 | in ax, dx |
930 | or ax, 1 shl 3 |
||
931 | cmp [tpc.mcfg], MCFG_METHOD_02 |
||
932 | jne @f |
||
933 | cmp [tpc.mcfg], MCFG_METHOD_03 |
||
934 | jne @f |
||
935 | or ax,1 shl 14 |
||
936 | DEBUGF 1,"Set MAC Reg C+CR Offset 0xE0: bit-3 and bit-14\n" |
||
937 | jmp .set |
||
1554 | hidnplayr | 938 | @@: |
2387 | hidnplayr | 939 | DEBUGF 1,"Set MAC Reg C+CR Offset 0xE0: bit-3\n" |
1554 | hidnplayr | 940 | .set: |
2387 | hidnplayr | 941 | set_io REG_CPlusCmd |
942 | out dx, ax |
||
1554 | hidnplayr | 943 | |
2387 | hidnplayr | 944 | set_io 0xE2 |
1554 | hidnplayr | 945 | ; mov ax, 0x1517 |
946 | ; out dx, ax |
||
947 | ; mov ax, 0x152a |
||
948 | ; out dx, ax |
||
949 | ; mov ax, 0x282a |
||
950 | ; out dx, ax |
||
2387 | hidnplayr | 951 | xor ax, ax |
952 | out dx, ax |
||
1554 | hidnplayr | 953 | |
2387 | hidnplayr | 954 | xor eax, eax |
955 | mov [tpc.cur_rx], eax |
||
2916 | hidnplayr | 956 | lea eax, [device.tx_ring] |
2387 | hidnplayr | 957 | GetRealAddr |
958 | set_io REG_TxDescStartAddr |
||
959 | out dx, eax |
||
1554 | hidnplayr | 960 | |
2916 | hidnplayr | 961 | lea eax, [device.rx_ring] |
2387 | hidnplayr | 962 | GetRealAddr |
963 | set_io REG_RxDescStartAddr |
||
964 | out dx, eax |
||
1554 | hidnplayr | 965 | |
2387 | hidnplayr | 966 | set_io REG_Cfg9346 |
967 | mov al, CFG_9346_Lock |
||
968 | out dx, al |
||
1554 | hidnplayr | 969 | |
2387 | hidnplayr | 970 | udelay 10 |
1554 | hidnplayr | 971 | |
2387 | hidnplayr | 972 | xor eax, eax |
973 | set_io REG_RxMissed |
||
974 | out dx, eax |
||
1554 | hidnplayr | 975 | |
2387 | hidnplayr | 976 | call set_rx_mode |
1554 | hidnplayr | 977 | |
2387 | hidnplayr | 978 | set_io 0 |
979 | ; no early-rx interrupts |
||
980 | set_io REG_MultiIntr |
||
981 | in ax, dx |
||
982 | and ax, 0xF000 |
||
983 | out dx, ax |
||
1554 | hidnplayr | 984 | |
2387 | hidnplayr | 985 | ; set interrupt mask |
986 | set_io REG_IntrMask |
||
987 | mov ax, intr_mask |
||
988 | out dx, ax |
||
1554 | hidnplayr | 989 | |
2387 | hidnplayr | 990 | xor eax, eax |
991 | ret |
||
1554 | hidnplayr | 992 | |
993 | |||
994 | align 4 |
||
995 | read_mac: |
||
996 | |||
2387 | hidnplayr | 997 | set_io 0 |
998 | set_io REG_MAC0 |
||
999 | xor ecx, ecx |
||
1000 | lea edi, [device.mac] |
||
2916 | hidnplayr | 1001 | mov ecx, 6 |
1554 | hidnplayr | 1002 | |
2387 | hidnplayr | 1003 | ; Get MAC address. FIXME: read EEPROM |
1004 | @@: in al, dx |
||
1005 | stosb |
||
1006 | inc edx |
||
1007 | loop @r |
||
1554 | hidnplayr | 1008 | |
2916 | hidnplayr | 1009 | DEBUGF 1,"MAC = %x-%x-%x-%x-%x-%x\n",\ |
1010 | [device.mac+0]:2,[device.mac+1]:2,[device.mac+2]:2,[device.mac+3]:2,[device.mac+4]:2,[device.mac+5]:2 |
||
1554 | hidnplayr | 1011 | |
2387 | hidnplayr | 1012 | ret |
1554 | hidnplayr | 1013 | |
1014 | align 4 |
||
1015 | write_mac: |
||
1016 | |||
2387 | hidnplayr | 1017 | ret 6 |
1554 | hidnplayr | 1018 | |
1019 | |||
1020 | |||
1021 | |||
1022 | |||
1023 | ;*************************************************************************** |
||
1024 | ; Function |
||
1025 | ; transmit |
||
1026 | ; Description |
||
1027 | ; Transmits a packet of data via the ethernet card |
||
1028 | ; |
||
1029 | ; Destroyed registers |
||
1030 | ; eax, edx, esi, edi |
||
1031 | ; |
||
1032 | ;*************************************************************************** |
||
1033 | align 4 |
||
1034 | transmit: |
||
1035 | |||
2387 | hidnplayr | 1036 | DEBUGF 1,"Transmitting packet, buffer:%x, size:%u\n", [esp+4], [esp+8] |
1037 | mov eax, [esp+4] |
||
1038 | DEBUGF 1,"To: %x-%x-%x-%x-%x-%x From: %x-%x-%x-%x-%x-%x Type:%x%x\n",\ |
||
1039 | [eax+00]:2,[eax+01]:2,[eax+02]:2,[eax+03]:2,[eax+04]:2,[eax+05]:2,\ |
||
1040 | [eax+06]:2,[eax+07]:2,[eax+08]:2,[eax+09]:2,[eax+10]:2,[eax+11]:2,\ |
||
1041 | [eax+13]:2,[eax+12]:2 |
||
1554 | hidnplayr | 1042 | |
2387 | hidnplayr | 1043 | cmp dword [esp+8], MAX_ETH_FRAME_SIZE |
1044 | ja .fail |
||
1554 | hidnplayr | 1045 | |
1046 | ;---------------------------------- |
||
1047 | ; Find currentTX descriptor address |
||
1048 | |||
2387 | hidnplayr | 1049 | mov eax, tx_desc.size |
1050 | mul [tpc.cur_tx] |
||
2916 | hidnplayr | 1051 | lea esi, [eax + device.tx_ring] |
1554 | hidnplayr | 1052 | |
2387 | hidnplayr | 1053 | DEBUGF 1,"Using TX desc: %x\n", esi |
1823 | hidnplayr | 1054 | |
1554 | hidnplayr | 1055 | ;--------------------------- |
1056 | ; Program the packet pointer |
||
1057 | |||
2387 | hidnplayr | 1058 | mov eax, [esp + 4] |
1059 | mov [esi + tx_desc.buf_soft_addr], eax |
||
1060 | GetRealAddr |
||
1061 | mov dword [esi + tx_desc.buf_addr], eax |
||
1554 | hidnplayr | 1062 | |
1063 | ;------------------------ |
||
1064 | ; Program the packet size |
||
1065 | |||
2387 | hidnplayr | 1066 | mov eax, [esp + 8] |
1067 | @@: or eax, DSB_OWNbit or DSB_FSbit or DSB_LSbit |
||
1068 | cmp [tpc.cur_tx], NUM_TX_DESC - 1 |
||
1069 | jne @f |
||
1070 | or eax, DSB_EORbit |
||
1071 | @@: mov [esi + tx_desc.status], eax |
||
1554 | hidnplayr | 1072 | |
1558 | hidnplayr | 1073 | ;----------------------------------------- |
1074 | ; Set the polling bit (start transmission) |
||
1554 | hidnplayr | 1075 | |
2387 | hidnplayr | 1076 | set_io 0 |
1077 | set_io REG_TxPoll |
||
1078 | mov al, 0x40 ; set polling bit |
||
1079 | out dx, al |
||
1554 | hidnplayr | 1080 | |
1081 | ;----------------------- |
||
1082 | ; Update TX descriptor |
||
1083 | |||
2387 | hidnplayr | 1084 | inc [tpc.cur_tx] |
1085 | and [tpc.cur_tx], NUM_TX_DESC - 1 |
||
1558 | hidnplayr | 1086 | |
1087 | ;------------- |
||
1088 | ; Update stats |
||
1089 | |||
2387 | hidnplayr | 1090 | inc [device.packets_tx] |
2916 | hidnplayr | 1091 | mov eax, [esp + 8] |
2387 | hidnplayr | 1092 | add dword [device.bytes_tx], eax |
1093 | adc dword [device.bytes_tx + 4], 0 |
||
1558 | hidnplayr | 1094 | |
2387 | hidnplayr | 1095 | xor eax, eax |
1096 | ret 8 |
||
1554 | hidnplayr | 1097 | |
1098 | .fail: |
||
2387 | hidnplayr | 1099 | DEBUGF 1,"transmit failed\n" |
1100 | or eax, -1 |
||
1101 | stdcall KernelFree, [esp+4] |
||
1102 | ret 8 |
||
1554 | hidnplayr | 1103 | |
1104 | |||
1105 | ;;;DSB_OWNbit |
||
1106 | |||
1107 | |||
1108 | ;;;;;;;;;;;;;;;;;;;;;;; |
||
1109 | ;; ;; |
||
1110 | ;; Interrupt handler ;; |
||
1111 | ;; ;; |
||
1112 | ;;;;;;;;;;;;;;;;;;;;;;; |
||
1113 | |||
1114 | align 4 |
||
1115 | int_handler: |
||
1116 | |||
2935 | hidnplayr | 1117 | DEBUGF 1,"\n%s int\n", my_service |
1554 | hidnplayr | 1118 | |
1119 | ; find pointer of device wich made IRQ occur |
||
1120 | |||
2387 | hidnplayr | 1121 | mov ecx, [devices] |
1122 | test ecx, ecx |
||
2935 | hidnplayr | 1123 | jz .nothing |
2387 | hidnplayr | 1124 | mov esi, device_list |
1554 | hidnplayr | 1125 | .nextdevice: |
2935 | hidnplayr | 1126 | mov ebx, [esi] |
1554 | hidnplayr | 1127 | |
2387 | hidnplayr | 1128 | set_io 0 |
1129 | set_io REG_IntrStatus |
||
1130 | in ax, dx |
||
1131 | test ax, ax |
||
1132 | jnz .got_it |
||
1554 | hidnplayr | 1133 | .continue: |
2387 | hidnplayr | 1134 | add esi, 4 |
1135 | dec ecx |
||
1136 | jnz .nextdevice |
||
2935 | hidnplayr | 1137 | .nothing: |
2387 | hidnplayr | 1138 | ret ; If no device was found, abort (The irq was probably for a device, not registered to this driver) |
1554 | hidnplayr | 1139 | |
1140 | .got_it: |
||
1141 | |||
2935 | hidnplayr | 1142 | DEBUGF 1,"Device: %x Status: %x ", ebx, ax |
1143 | |||
2387 | hidnplayr | 1144 | cmp ax, 0xFFFF ; if so, hardware is no longer present |
1145 | je .fail |
||
1554 | hidnplayr | 1146 | |
1147 | ;-------- |
||
1148 | ; Receive |
||
1149 | |||
2387 | hidnplayr | 1150 | test ax, ISB_RxOK |
1151 | jz .no_rx |
||
1554 | hidnplayr | 1152 | |
2387 | hidnplayr | 1153 | push ax |
1154 | push ebx |
||
1554 | hidnplayr | 1155 | |
1559 | hidnplayr | 1156 | .check_more: |
2387 | hidnplayr | 1157 | pop ebx |
1158 | DEBUGF 1,"ebx = 0x%x\n", ebx |
||
1159 | mov eax, rx_desc.size |
||
1160 | mul [tpc.cur_rx] |
||
2916 | hidnplayr | 1161 | lea esi, [eax + device.rx_ring] |
1554 | hidnplayr | 1162 | |
2387 | hidnplayr | 1163 | DEBUGF 1,"RxDesc.status = 0x%x\n", [esi + rx_desc.status] |
1554 | hidnplayr | 1164 | |
2387 | hidnplayr | 1165 | mov eax, [esi + rx_desc.status] |
1166 | test eax, DSB_OWNbit ;;; |
||
1167 | jnz .rx_return |
||
1554 | hidnplayr | 1168 | |
2387 | hidnplayr | 1169 | DEBUGF 1,"tpc.cur_rx = %u\n", [tpc.cur_rx] |
1554 | hidnplayr | 1170 | |
2387 | hidnplayr | 1171 | test eax, SD_RxRES |
1172 | jnz .rx_return ;;;;; RX error! |
||
1554 | hidnplayr | 1173 | |
2387 | hidnplayr | 1174 | push ebx |
1175 | push .check_more |
||
1176 | and eax, 0x00001FFF |
||
1177 | add eax, -4 ; we dont need CRC |
||
1178 | push eax |
||
1179 | DEBUGF 1,"data length = %u\n", ax |
||
1554 | hidnplayr | 1180 | |
1558 | hidnplayr | 1181 | ;------------- |
1182 | ; Update stats |
||
1559 | hidnplayr | 1183 | |
2387 | hidnplayr | 1184 | add dword [device.bytes_rx], eax |
1185 | adc dword [device.bytes_rx + 4], 0 |
||
1186 | inc dword [device.packets_rx] |
||
1558 | hidnplayr | 1187 | |
2387 | hidnplayr | 1188 | push [esi + rx_desc.buf_soft_addr] |
1554 | hidnplayr | 1189 | |
1557 | hidnplayr | 1190 | ;---------------------- |
1191 | ; Allocate a new buffer |
||
1192 | |||
2387 | hidnplayr | 1193 | stdcall KernelAlloc, RX_BUF_SIZE |
1194 | mov [esi + rx_desc.buf_soft_addr], eax |
||
1195 | GetRealAddr |
||
1196 | mov dword [esi + rx_desc.buf_addr], eax |
||
1557 | hidnplayr | 1197 | |
1554 | hidnplayr | 1198 | ;--------------- |
1199 | ; re set OWN bit |
||
1200 | |||
2387 | hidnplayr | 1201 | mov eax, DSB_OWNbit or RX_BUF_SIZE |
1202 | cmp [tpc.cur_rx], NUM_RX_DESC - 1 |
||
1203 | jne @f |
||
1204 | or eax, DSB_EORbit |
||
1205 | @@: mov [esi + rx_desc.status], eax |
||
1554 | hidnplayr | 1206 | |
1207 | ;-------------- |
||
1208 | ; Update rx ptr |
||
1209 | |||
2387 | hidnplayr | 1210 | inc [tpc.cur_rx] |
1211 | and [tpc.cur_rx], NUM_RX_DESC - 1 |
||
1554 | hidnplayr | 1212 | |
2981 | hidnplayr | 1213 | jmp Eth_input |
1554 | hidnplayr | 1214 | .rx_return: |
1215 | |||
2387 | hidnplayr | 1216 | pop ax |
1554 | hidnplayr | 1217 | .no_rx: |
1218 | |||
1219 | ;--------- |
||
1220 | ; Transmit |
||
1221 | |||
2387 | hidnplayr | 1222 | test ax, ISB_TxOK |
1223 | jz .no_tx |
||
1224 | push ax |
||
1554 | hidnplayr | 1225 | |
2387 | hidnplayr | 1226 | DEBUGF 1,"TX ok!\n" |
1554 | hidnplayr | 1227 | |
2387 | hidnplayr | 1228 | mov ecx, NUM_TX_DESC |
2916 | hidnplayr | 1229 | lea esi, [device.tx_ring] |
1558 | hidnplayr | 1230 | .txloop: |
2916 | hidnplayr | 1231 | cmp [esi + tx_desc.buf_soft_addr], 0 |
2387 | hidnplayr | 1232 | jz .maybenext |
1558 | hidnplayr | 1233 | |
2916 | hidnplayr | 1234 | test [esi + tx_desc.status], DSB_OWNbit |
2387 | hidnplayr | 1235 | jnz .maybenext |
1558 | hidnplayr | 1236 | |
2387 | hidnplayr | 1237 | push ecx |
1238 | DEBUGF 1,"Freeing up TX desc: %x\n", esi |
||
2916 | hidnplayr | 1239 | stdcall KernelFree, [esi + tx_desc.buf_soft_addr] |
2387 | hidnplayr | 1240 | pop ecx |
2916 | hidnplayr | 1241 | and [esi + tx_desc.buf_soft_addr], 0 |
1558 | hidnplayr | 1242 | |
1243 | .maybenext: |
||
2387 | hidnplayr | 1244 | add esi, tx_desc.size |
1245 | dec ecx |
||
1246 | jnz .txloop |
||
1558 | hidnplayr | 1247 | |
2387 | hidnplayr | 1248 | pop ax |
1554 | hidnplayr | 1249 | .no_tx: |
1250 | |||
1251 | ;------- |
||
1252 | ; Finish |
||
1253 | |||
2387 | hidnplayr | 1254 | set_io 0 |
1255 | set_io REG_IntrStatus |
||
1256 | out dx, ax ; ACK all interrupts |
||
1554 | hidnplayr | 1257 | |
1258 | .fail: |
||
2387 | hidnplayr | 1259 | ret |
1554 | hidnplayr | 1260 | |
1261 | |||
1262 | |||
1263 | |||
1264 | |||
1265 | |||
1266 | |||
1267 | |||
1268 | |||
1269 | ; End of code |
||
2387 | hidnplayr | 1270 | align 4 ; Place all initialised data here |
1554 | hidnplayr | 1271 | |
1272 | devices dd 0 |
||
1273 | version dd (DRIVER_VERSION shl 16) or (API_VERSION and 0xFFFF) |
||
2387 | hidnplayr | 1274 | my_service db 'RTL8169',0 ; max 16 chars include zero |
1554 | hidnplayr | 1275 | |
2387 | hidnplayr | 1276 | include_debug_strings ; All data wich FDO uses will be included here |
1554 | hidnplayr | 1277 | |
1278 | rtl_chip_info dd \ |
||
1279 | MCFG_METHOD_01, 0xff7e1880, \ ; RTL8169 |
||
1280 | MCFG_METHOD_02, 0xff7e1880, \ ; RTL8169s/8110s |
||
1281 | MCFG_METHOD_03, 0xff7e1880, \ ; RTL8169s/8110s |
||
1282 | MCFG_METHOD_04, 0xff7e1880, \ ; RTL8169sb/8110sb |
||
1283 | MCFG_METHOD_05, 0xff7e1880, \ ; RTL8169sc/8110sc |
||
1284 | MCFG_METHOD_11, 0xff7e1880, \ ; RTL8168b/8111b // PCI-E |
||
1285 | MCFG_METHOD_12, 0xff7e1880, \ ; RTL8168b/8111b // PCI-E |
||
1286 | MCFG_METHOD_13, 0xff7e1880, \ ; RTL8101e // PCI-E 8139 |
||
1287 | MCFG_METHOD_14, 0xff7e1880, \ ; RTL8100e // PCI-E 8139 |
||
2387 | hidnplayr | 1288 | MCFG_METHOD_15, 0xff7e1880 ; RTL8100e // PCI-E 8139 |
1554 | hidnplayr | 1289 | |
1290 | mac_info dd \ |
||
1291 | 0x38800000, MCFG_METHOD_15, \ |
||
1292 | 0x38000000, MCFG_METHOD_12, \ |
||
1293 | 0x34000000, MCFG_METHOD_13, \ |
||
1294 | 0x30800000, MCFG_METHOD_14, \ |
||
1295 | 0x30000000, MCFG_METHOD_11, \ |
||
1296 | 0x18000000, MCFG_METHOD_05, \ |
||
1297 | 0x10000000, MCFG_METHOD_04, \ |
||
1298 | 0x04000000, MCFG_METHOD_03, \ |
||
1299 | 0x00800000, MCFG_METHOD_02, \ |
||
2387 | hidnplayr | 1300 | 0x00000000, MCFG_METHOD_01 ; catch-all |
1554 | hidnplayr | 1301 | |
2387 | hidnplayr | 1302 | name_01 db "RTL8169", 0 |
1303 | name_02_03 db "RTL8169s/8110s", 0 |
||
1304 | name_04 db "RTL8169sb/8110sb", 0 |
||
1305 | name_05 db "RTL8169sc/8110sc", 0 |
||
1306 | name_11_12 db "RTL8168b/8111b", 0 ; PCI-E |
||
1307 | name_13 db "RTL8101e", 0 ; PCI-E 8139 |
||
1308 | name_14_15 db "RTL8100e", 0 ; PCI-E 8139 |
||
1558 | hidnplayr | 1309 | |
1310 | |||
1554 | hidnplayr | 1311 | section '.data' data readable writable align 16 ; place all uninitialized data place here |
1312 | |||
2387 | hidnplayr | 1313 | device_list rd MAX_DEVICES ; This list contains all pointers to device structures the driver is handling |
1554 | hidnplayr | 1314 |