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Rev | Author | Line No. | Line |
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1554 | hidnplayr | 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
2 | ;; ;; |
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3 | ;; Copyright (C) KolibriOS team 2004-2010. All rights reserved. ;; |
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4 | ;; Distributed under terms of the GNU General Public License ;; |
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5 | ;; ;; |
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6 | ;; RTL8169 driver for KolibriOS ;; |
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7 | ;; ;; |
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8 | ;; Copyright 2007 mike.dld, ;; |
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9 | ;; mike.dld@gmail.com ;; |
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10 | ;; ;; |
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11 | ;; Version 0.1 11 February 2007 ;; |
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12 | ;; Version 0.2 3 August 2010 - port to net branch by hidnplayr ;; |
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1823 | hidnplayr | 13 | ;; Version 0.3 31 Januari 2011 - bugfixes by hidnplayr ;; |
1554 | hidnplayr | 14 | ;; ;; |
15 | ;; References: ;; |
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16 | ;; r8169.c - linux driver (etherboot project) ;; |
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17 | ;; ;; |
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18 | ;; GNU GENERAL PUBLIC LICENSE ;; |
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19 | ;; Version 2, June 1991 ;; |
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20 | ;; ;; |
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21 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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22 | |||
23 | format MS COFF |
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24 | |||
25 | API_VERSION equ 0x01000100 |
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26 | DRIVER_VERSION equ 5 |
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27 | |||
28 | MAX_DEVICES equ 16 |
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29 | |||
30 | DEBUG equ 1 |
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31 | __DEBUG__ equ 1 |
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32 | __DEBUG_LEVEL__ equ 1 |
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33 | |||
34 | NUM_TX_DESC equ 4 |
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35 | NUM_RX_DESC equ 4 |
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36 | |||
37 | include 'proc32.inc' |
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38 | include 'imports.inc' |
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39 | include 'fdo.inc' |
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40 | include 'netdrv.inc' |
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41 | |||
42 | public START |
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43 | public service_proc |
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44 | public version |
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45 | |||
46 | |||
47 | REG_MAC0 equ 0x0 ; Ethernet hardware address |
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48 | REG_MAR0 equ 0x8 ; Multicast filter |
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49 | REG_TxDescStartAddr equ 0x20 |
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50 | REG_TxHDescStartAddr equ 0x28 |
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51 | REG_FLASH equ 0x30 |
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52 | REG_ERSR equ 0x36 |
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53 | REG_ChipCmd equ 0x37 |
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54 | REG_TxPoll equ 0x38 |
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55 | REG_IntrMask equ 0x3C |
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56 | REG_IntrStatus equ 0x3E |
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57 | REG_TxConfig equ 0x40 |
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58 | REG_RxConfig equ 0x44 |
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59 | REG_RxMissed equ 0x4C |
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60 | REG_Cfg9346 equ 0x50 |
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61 | REG_Config0 equ 0x51 |
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62 | REG_Config1 equ 0x52 |
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63 | REG_Config2 equ 0x53 |
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64 | REG_Config3 equ 0x54 |
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65 | REG_Config4 equ 0x55 |
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66 | REG_Config5 equ 0x56 |
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67 | REG_MultiIntr equ 0x5C |
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68 | REG_PHYAR equ 0x60 |
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69 | REG_TBICSR equ 0x64 |
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70 | REG_TBI_ANAR equ 0x68 |
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71 | REG_TBI_LPAR equ 0x6A |
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72 | REG_PHYstatus equ 0x6C |
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73 | REG_RxMaxSize equ 0xDA |
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74 | REG_CPlusCmd equ 0xE0 |
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75 | REG_RxDescStartAddr equ 0xE4 |
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76 | REG_ETThReg equ 0xEC |
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77 | REG_FuncEvent equ 0xF0 |
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78 | REG_FuncEventMask equ 0xF4 |
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79 | REG_FuncPresetState equ 0xF8 |
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80 | REG_FuncForceEvent equ 0xFC |
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81 | |||
82 | ; InterruptStatusBits |
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83 | ISB_SYSErr equ 0x8000 |
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84 | ISB_PCSTimeout equ 0x4000 |
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85 | ISB_SWInt equ 0x0100 |
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86 | ISB_TxDescUnavail equ 0x80 |
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87 | ISB_RxFIFOOver equ 0x40 |
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88 | ISB_LinkChg equ 0x20 |
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89 | ISB_RxOverflow equ 0x10 |
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90 | ISB_TxErr equ 0x08 |
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91 | ISB_TxOK equ 0x04 |
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92 | ISB_RxErr equ 0x02 |
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93 | ISB_RxOK equ 0x01 |
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94 | |||
95 | ; RxStatusDesc |
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96 | SD_RxRES equ 0x00200000 |
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97 | SD_RxCRC equ 0x00080000 |
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98 | SD_RxRUNT equ 0x00100000 |
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99 | SD_RxRWT equ 0x00400000 |
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100 | |||
101 | ; ChipCmdBits |
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102 | CMD_Reset equ 0x10 |
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103 | CMD_RxEnb equ 0x08 |
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104 | CMD_TxEnb equ 0x04 |
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105 | CMD_RxBufEmpty equ 0x01 |
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106 | |||
107 | ; Cfg9346Bits |
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108 | CFG_9346_Lock equ 0x00 |
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109 | CFG_9346_Unlock equ 0xC0 |
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110 | |||
111 | ; rx_mode_bits |
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112 | RXM_AcceptErr equ 0x20 |
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113 | RXM_AcceptRunt equ 0x10 |
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114 | RXM_AcceptBroadcast equ 0x08 |
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115 | RXM_AcceptMulticast equ 0x04 |
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116 | RXM_AcceptMyPhys equ 0x02 |
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117 | RXM_AcceptAllPhys equ 0x01 |
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118 | |||
119 | ; RxConfigBits |
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120 | RXC_FIFOShift equ 13 |
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121 | RXC_DMAShift equ 8 |
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122 | |||
123 | ; TxConfigBits |
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124 | TXC_InterFrameGapShift equ 24 |
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125 | TXC_DMAShift equ 8 ; DMA burst value (0-7) is shift this many bits |
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126 | |||
127 | ; PHYstatus |
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128 | PHYS_TBI_Enable equ 0x80 |
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129 | PHYS_TxFlowCtrl equ 0x40 |
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130 | PHYS_RxFlowCtrl equ 0x20 |
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131 | PHYS_1000bpsF equ 0x10 |
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132 | PHYS_100bps equ 0x08 |
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133 | PHYS_10bps equ 0x04 |
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134 | PHYS_LinkStatus equ 0x02 |
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135 | PHYS_FullDup equ 0x01 |
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136 | |||
137 | ; GIGABIT_PHY_registers |
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138 | PHY_CTRL_REG equ 0 |
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139 | PHY_STAT_REG equ 1 |
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140 | PHY_AUTO_NEGO_REG equ 4 |
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141 | PHY_1000_CTRL_REG equ 9 |
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142 | |||
143 | ; GIGABIT_PHY_REG_BIT |
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144 | PHY_Restart_Auto_Nego equ 0x0200 |
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145 | PHY_Enable_Auto_Nego equ 0x1000 |
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146 | |||
147 | ; PHY_STAT_REG = 1; |
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148 | PHY_Auto_Neco_Comp equ 0x0020 |
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149 | |||
150 | ; PHY_AUTO_NEGO_REG = 4; |
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151 | PHY_Cap_10_Half equ 0x0020 |
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152 | PHY_Cap_10_Full equ 0x0040 |
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153 | PHY_Cap_100_Half equ 0x0080 |
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154 | PHY_Cap_100_Full equ 0x0100 |
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155 | |||
156 | ; PHY_1000_CTRL_REG = 9; |
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157 | PHY_Cap_1000_Full equ 0x0200 |
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158 | PHY_Cap_1000_Half equ 0x0100 |
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159 | |||
160 | PHY_Cap_PAUSE equ 0x0400 |
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161 | PHY_Cap_ASYM_PAUSE equ 0x0800 |
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162 | |||
163 | PHY_Cap_Null equ 0x0 |
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164 | |||
165 | ; _MediaType |
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166 | MT_10_Half equ 0x01 |
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167 | MT_10_Full equ 0x02 |
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168 | MT_100_Half equ 0x04 |
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169 | MT_100_Full equ 0x08 |
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170 | MT_1000_Full equ 0x10 |
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171 | |||
172 | ; _TBICSRBit |
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173 | TBI_LinkOK equ 0x02000000 |
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174 | |||
175 | ; _DescStatusBit |
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176 | DSB_OWNbit equ 0x80000000 |
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177 | DSB_EORbit equ 0x40000000 |
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178 | DSB_FSbit equ 0x20000000 |
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179 | DSB_LSbit equ 0x10000000 |
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180 | |||
181 | RX_BUF_SIZE equ 1536 ; Rx Buffer size |
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182 | |||
183 | |||
184 | ETH_ALEN equ 6 |
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185 | ETH_HLEN equ (2 * ETH_ALEN + 2) |
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186 | ETH_ZLEN equ 60 ; 60 + 4bytes auto payload for |
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187 | ; mininmum 64bytes frame length |
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188 | |||
189 | ; MAC address length |
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190 | MAC_ADDR_LEN equ 6 |
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191 | |||
192 | ; max supported gigabit ethernet frame size -- must be at least (dev->mtu+14+4) |
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193 | MAX_ETH_FRAME_SIZE equ 1536 |
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194 | |||
195 | TX_FIFO_THRESH equ 256 ; In bytes |
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196 | |||
197 | RX_FIFO_THRESH equ 7 ; 7 means NO threshold, Rx buffer level before first PCI xfer |
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198 | RX_DMA_BURST equ 7 ; Maximum PCI burst, '6' is 1024 |
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199 | TX_DMA_BURST equ 7 ; Maximum PCI burst, '6' is 1024 |
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200 | ETTh equ 0x3F ; 0x3F means NO threshold |
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201 | |||
202 | EarlyTxThld equ 0x3F ; 0x3F means NO early transmit |
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203 | RxPacketMaxSize equ 0x0800 ; Maximum size supported is 16K-1 |
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204 | InterFrameGap equ 0x03 ; 3 means InterFrameGap = the shortest one |
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205 | |||
206 | HZ equ 1000 |
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207 | |||
208 | RTL_MIN_IO_SIZE equ 0x80 |
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209 | TX_TIMEOUT equ (6*HZ) |
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210 | |||
211 | TIMER_EXPIRE_TIME equ 100 |
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212 | |||
213 | ETH_HDR_LEN equ 14 |
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214 | DEFAULT_MTU equ 1500 |
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215 | DEFAULT_RX_BUF_LEN equ 1536 |
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216 | |||
217 | |||
218 | ;#ifdef JUMBO_FRAME_SUPPORT |
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219 | ;#define MAX_JUMBO_FRAME_MTU ( 10000 ) |
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220 | ;#define MAX_RX_SKBDATA_SIZE ( MAX_JUMBO_FRAME_MTU + ETH_HDR_LEN ) |
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221 | ;#else |
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222 | MAX_RX_SKBDATA_SIZE equ 1600 |
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223 | ;#endif //end #ifdef JUMBO_FRAME_SUPPORT |
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224 | |||
225 | MCFG_METHOD_01 equ 0x01 |
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226 | MCFG_METHOD_02 equ 0x02 |
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227 | MCFG_METHOD_03 equ 0x03 |
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228 | MCFG_METHOD_04 equ 0x04 |
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229 | MCFG_METHOD_05 equ 0x05 |
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230 | MCFG_METHOD_11 equ 0x0b |
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231 | MCFG_METHOD_12 equ 0x0c |
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232 | MCFG_METHOD_13 equ 0x0d |
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233 | MCFG_METHOD_14 equ 0x0e |
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234 | MCFG_METHOD_15 equ 0x0f |
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235 | |||
236 | PCFG_METHOD_1 equ 0x01 ; PHY Reg 0x03 bit0-3 == 0x0000 |
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237 | PCFG_METHOD_2 equ 0x02 ; PHY Reg 0x03 bit0-3 == 0x0001 |
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238 | PCFG_METHOD_3 equ 0x03 ; PHY Reg 0x03 bit0-3 == 0x0002 |
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239 | |||
240 | virtual at 0 |
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241 | tx_desc: |
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242 | .status dd ? |
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243 | .vlan_tag dd ? |
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1557 | hidnplayr | 244 | .buf_addr dq ? |
1554 | hidnplayr | 245 | .size = $ |
1557 | hidnplayr | 246 | rb (NUM_TX_DESC-1)*tx_desc.size |
247 | .buf_soft_addr dd ? |
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1554 | hidnplayr | 248 | end virtual |
249 | |||
250 | virtual at 0 |
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251 | rx_desc: |
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252 | .status dd ? |
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253 | .vlan_tag dd ? |
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1557 | hidnplayr | 254 | .buf_addr dq ? |
1554 | hidnplayr | 255 | .size = $ |
1557 | hidnplayr | 256 | rb (NUM_RX_DESC-1)*rx_desc.size |
257 | .buf_soft_addr dd ? |
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1554 | hidnplayr | 258 | end virtual |
259 | |||
260 | virtual at ebx |
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261 | |||
262 | device: |
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263 | |||
264 | ETH_DEVICE |
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265 | |||
266 | .io_addr dd ? |
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267 | .pci_bus db ? |
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268 | .pci_dev db ? |
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269 | .irq_line db ? |
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270 | |||
271 | tpc: |
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272 | .mmio_addr dd ? ; memory map physical address |
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273 | .chipset dd ? |
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274 | .pcfg dd ? |
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275 | .mcfg dd ? |
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276 | .cur_rx dd ? ; Index into the Rx descriptor buffer of next Rx pkt |
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277 | .cur_tx dd ? ; Index into the Tx descriptor buffer of next Rx pkt |
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278 | .TxDescArrays dd ? ; Index of Tx Descriptor buffer |
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279 | .RxDescArrays dd ? ; Index of Rx Descriptor buffer |
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280 | .TxDescArray dd ? ; Index of 256-alignment Tx Descriptor buffer |
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281 | .RxDescArray dd ? ; Index of 256-alignment Rx Descriptor buffer |
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282 | |||
1557 | hidnplayr | 283 | rb 256-(($ - device) and 255) ; align 256 |
284 | tx_ring rb NUM_TX_DESC * tx_desc.size * 2 |
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1554 | hidnplayr | 285 | |
1557 | hidnplayr | 286 | rb 256-(($ - device) and 255) ; align 256 |
287 | rx_ring rb NUM_RX_DESC * rx_desc.size * 2 |
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1554 | hidnplayr | 288 | |
289 | device_size = $ - device |
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290 | |||
291 | end virtual |
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292 | |||
293 | intr_mask = ISB_LinkChg or ISB_RxOverflow or ISB_RxFIFOOver or ISB_TxErr or ISB_TxOK or ISB_RxErr or ISB_RxOK |
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294 | rx_config = (RX_FIFO_THRESH shl RXC_FIFOShift) or (RX_DMA_BURST shl RXC_DMAShift) or 0x0000000E |
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295 | |||
296 | |||
297 | macro udelay msec { |
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298 | |||
299 | push esi |
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300 | mov esi, msec |
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301 | call Sleep |
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302 | pop esi |
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303 | |||
304 | } |
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305 | |||
306 | macro WRITE_GMII_REG RegAddr, value { |
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307 | |||
308 | set_io REG_PHYAR |
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309 | if value eq ax |
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310 | and eax, 0x0000ffff |
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311 | or eax, 0x80000000 + (RegAddr shl 16) |
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312 | else |
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313 | mov eax, 0x80000000 + (RegAddr shl 16) + value |
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314 | end if |
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315 | out dx, eax |
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316 | |||
317 | call PHY_WAIT |
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318 | } |
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319 | |||
320 | macro READ_GMII_REG RegAddr { |
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321 | |||
322 | local .error, .done |
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323 | |||
1557 | hidnplayr | 324 | set_io REG_PHYAR |
1554 | hidnplayr | 325 | mov eax, RegAddr shl 16 |
1557 | hidnplayr | 326 | out dx, eax |
1554 | hidnplayr | 327 | |
328 | call PHY_WAIT |
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329 | jz .error |
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330 | |||
331 | in eax, dx |
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332 | and eax, 0xFFFF |
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333 | jmp .done |
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334 | |||
335 | .error: |
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336 | or eax, -1 |
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337 | .done: |
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338 | } |
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339 | |||
340 | align 4 |
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341 | PHY_WAIT: ; io addr must already be set to REG_PHYAR |
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342 | |||
343 | udelay 1 ;;;1000 |
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344 | |||
345 | push ecx |
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346 | mov ecx, 2000 |
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1557 | hidnplayr | 347 | ; Check if the RTL8169 has completed writing/reading to the specified MII register |
1554 | hidnplayr | 348 | @@: |
349 | in eax, dx |
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350 | test eax, 0x80000000 |
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351 | jz .exit |
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352 | udelay 1 ;;;100 |
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353 | loop @b |
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354 | .exit: |
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355 | pop ecx |
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356 | ret |
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357 | |||
358 | |||
359 | |||
360 | section '.flat' code readable align 16 |
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361 | |||
362 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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363 | ;; ;; |
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364 | ;; proc START ;; |
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365 | ;; ;; |
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366 | ;; (standard driver proc) ;; |
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367 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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368 | |||
369 | align 4 |
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370 | proc START stdcall, state:dword |
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371 | |||
372 | cmp [state], 1 |
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373 | jne .exit |
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374 | |||
375 | .entry: |
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376 | |||
377 | DEBUGF 2,"Loading rtl8169 driver\n" |
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378 | stdcall RegService, my_service, service_proc |
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379 | ret |
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380 | |||
381 | .fail: |
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382 | .exit: |
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383 | xor eax, eax |
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384 | ret |
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385 | |||
386 | endp |
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387 | |||
388 | |||
389 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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390 | ;; ;; |
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391 | ;; proc SERVICE_PROC ;; |
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392 | ;; ;; |
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393 | ;; (standard driver proc) ;; |
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394 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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395 | |||
396 | align 4 |
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397 | proc service_proc stdcall, ioctl:dword |
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398 | |||
399 | mov edx, [ioctl] |
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400 | mov eax, [IOCTL.io_code] |
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401 | |||
402 | ;------------------------------------------------------ |
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403 | |||
404 | cmp eax, 0 ;SRV_GETVERSION |
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405 | jne @F |
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406 | |||
407 | cmp [IOCTL.out_size], 4 |
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408 | jl .fail |
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409 | mov eax, [IOCTL.output] |
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410 | mov [eax], dword API_VERSION |
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411 | |||
412 | xor eax, eax |
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413 | ret |
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414 | |||
415 | ;------------------------------------------------------ |
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416 | @@: |
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417 | cmp eax, 1 ;SRV_HOOK |
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418 | jne .fail |
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419 | |||
420 | cmp [IOCTL.inp_size], 3 ; Data input must be at least 3 bytes |
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421 | jl .fail |
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422 | |||
423 | mov eax, [IOCTL.input] |
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424 | cmp byte [eax], 1 ; 1 means device number and bus number (pci) are given |
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425 | jne .fail ; other types arent supported for this card yet |
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426 | |||
427 | ; check if the device is already listed |
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428 | |||
429 | mov esi, device_list |
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430 | mov ecx, [devices] |
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431 | test ecx, ecx |
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432 | jz .firstdevice |
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433 | |||
434 | ; mov eax, [IOCTL.input] ; get the pci bus and device numbers |
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435 | mov ax , [eax+1] ; |
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436 | .nextdevice: |
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437 | mov ebx, [esi] |
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438 | cmp ax , word [device.pci_bus] ; compare with pci and device num in device list (notice the usage of word instead of byte) |
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439 | je .find_devicenum ; Device is already loaded, let's find it's device number |
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440 | add esi, 4 |
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441 | loop .nextdevice |
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442 | |||
443 | |||
444 | ; This device doesnt have its own eth_device structure yet, lets create one |
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445 | .firstdevice: |
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446 | cmp [devices], MAX_DEVICES ; First check if the driver can handle one more card |
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447 | jge .fail |
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448 | |||
1557 | hidnplayr | 449 | allocate_and_clear ebx, device_size, .fail ; Allocate memory to put the device structure in |
1554 | hidnplayr | 450 | |
451 | ; Fill in the direct call addresses into the struct |
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452 | |||
453 | mov [device.reset], reset |
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454 | mov [device.transmit], transmit |
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455 | mov [device.get_MAC], read_mac |
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456 | mov [device.set_MAC], write_mac |
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457 | mov [device.unload], unload |
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458 | mov [device.name], my_service |
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459 | |||
460 | ; save the pci bus and device numbers |
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461 | |||
462 | mov eax, [IOCTL.input] |
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463 | mov cl , [eax+1] |
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464 | mov [device.pci_bus], cl |
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465 | mov cl , [eax+2] |
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466 | mov [device.pci_dev], cl |
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467 | |||
468 | ; Now, it's time to find the base io addres of the PCI device |
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469 | |||
470 | find_io [device.pci_bus], [device.pci_dev], [device.io_addr] |
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471 | mov eax, [device.io_addr] |
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472 | mov [tpc.mmio_addr], eax |
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473 | |||
474 | ; We've found the io address, find IRQ now |
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475 | |||
476 | find_irq [device.pci_bus], [device.pci_dev], [device.irq_line] |
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477 | |||
478 | DEBUGF 2,"Hooking into device, dev:%x, bus:%x, irq:%x, addr:%x\n",\ |
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479 | [device.pci_dev]:1,[device.pci_bus]:1,[device.irq_line]:1,[device.io_addr]:8 |
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480 | |||
481 | ; Ok, the eth_device structure is ready, let's probe the device |
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482 | ; Because initialization fires IRQ, IRQ handler must be aware of this device |
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483 | mov eax, [devices] ; Add the device structure to our device list |
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484 | mov [device_list+4*eax], ebx ; (IRQ handler uses this list to find device) |
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485 | inc [devices] ; |
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486 | |||
487 | call probe ; this function will output in eax |
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488 | test eax, eax |
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489 | jnz .err2 ; If an error occured, exit |
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490 | |||
491 | |||
492 | mov [device.type], NET_TYPE_ETH |
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493 | call NetRegDev |
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494 | |||
495 | cmp eax, -1 |
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496 | je .destroy |
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497 | |||
498 | ret |
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499 | |||
500 | ; If the device was already loaded, find the device number and return it in eax |
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501 | |||
502 | .find_devicenum: |
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503 | DEBUGF 2,"Trying to find device number of already registered device\n" |
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504 | mov ebx, eax |
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505 | call NetPtrToNum ; This kernel procedure converts a pointer to device struct in ebx |
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506 | ; into a device number in edi |
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507 | mov eax, edi ; Application wants it in eax instead |
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508 | DEBUGF 2,"Kernel says: %u\n", eax |
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509 | ret |
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510 | |||
511 | ; If an error occured, remove all allocated data and exit (returning -1 in eax) |
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512 | |||
513 | .destroy: |
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514 | ; todo: reset device into virgin state |
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515 | |||
516 | .err2: |
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517 | dec [devices] |
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518 | .err: |
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519 | DEBUGF 2,"removing device structure\n" |
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520 | stdcall KernelFree, ebx |
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521 | |||
522 | |||
523 | .fail: |
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524 | or eax, -1 |
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525 | ret |
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526 | |||
527 | ;------------------------------------------------------ |
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528 | endp |
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529 | |||
530 | |||
531 | align 4 |
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532 | unload: |
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533 | |||
534 | ret |
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535 | |||
536 | |||
537 | align 4 |
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538 | init_board: |
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539 | |||
540 | DEBUGF 1,"init_board\n" |
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541 | |||
542 | make_bus_master [device.pci_bus], [device.pci_dev] |
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543 | |||
544 | ; Soft reset the chip |
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545 | set_io 0 |
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546 | set_io REG_ChipCmd |
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547 | mov al, CMD_Reset |
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548 | out dx, al |
||
549 | |||
550 | ; Check that the chip has finished the reset |
||
551 | mov ecx, 1000 |
||
552 | set_io REG_ChipCmd |
||
553 | @@: in al, dx |
||
554 | test al, CMD_Reset |
||
555 | jz @f |
||
556 | udelay 10 |
||
557 | loop @b |
||
558 | @@: |
||
559 | ; identify config method |
||
560 | set_io REG_TxConfig |
||
561 | in eax, dx |
||
562 | and eax, 0x7c800000 |
||
563 | DEBUGF 1,"init_board: TxConfig & 0x7c800000 = 0x%x\n", eax |
||
564 | mov esi, mac_info-8 |
||
565 | @@: add esi, 8 |
||
566 | mov ecx, eax |
||
567 | and ecx, [esi] |
||
568 | cmp ecx, [esi] |
||
569 | jne @b |
||
570 | mov eax, [esi+4] |
||
571 | mov [tpc.mcfg], eax |
||
572 | |||
573 | mov [tpc.pcfg], PCFG_METHOD_3 |
||
574 | READ_GMII_REG 3 |
||
575 | and al, 0x0f |
||
576 | or al, al |
||
577 | jnz @f |
||
578 | mov [tpc.pcfg], PCFG_METHOD_1 |
||
579 | jmp .pconf |
||
580 | @@: dec al |
||
581 | jnz .pconf |
||
582 | mov [tpc.pcfg], PCFG_METHOD_2 |
||
583 | .pconf: |
||
584 | |||
585 | ; identify chip attached to board |
||
586 | mov ecx, 10 |
||
587 | mov eax, [tpc.mcfg] |
||
588 | @@: dec ecx |
||
589 | js @f |
||
590 | cmp eax, [rtl_chip_info+ecx*8] |
||
591 | jne @b |
||
592 | mov [tpc.chipset], ecx |
||
593 | jmp .match |
||
594 | @@: |
||
595 | ; if unknown chip, assume array element #0, original RTL-8169 in this case |
||
596 | DEBUGF 1,"init_board: PCI device: unknown chip version, assuming RTL-8169\n" |
||
597 | set_io REG_TxConfig |
||
598 | in eax, dx |
||
599 | DEBUGF 1,"init_board: PCI device: TxConfig = 0x%x\n", eax |
||
600 | |||
601 | mov [tpc.chipset], 0 |
||
602 | |||
603 | xor eax, eax |
||
604 | inc eax |
||
605 | ret |
||
606 | |||
607 | .match: |
||
1823 | hidnplayr | 608 | DEBUGF 1,"init_board: chipset=%u\n", ecx |
1554 | hidnplayr | 609 | xor eax,eax |
610 | ret |
||
611 | |||
612 | |||
613 | |||
614 | ;*************************************************************************** |
||
615 | ; Function |
||
616 | ; probe |
||
617 | ; Description |
||
618 | ; Searches for an ethernet card, enables it and clears the rx buffer |
||
619 | ; If a card was found, it enables the ethernet -> TCPIP link |
||
620 | ; Destroyed registers |
||
621 | ; eax, ebx, ecx, edx |
||
622 | ; |
||
623 | ;*************************************************************************** |
||
624 | align 4 |
||
625 | probe: |
||
626 | |||
627 | DEBUGF 1,"probe\n" |
||
628 | |||
629 | call init_board |
||
630 | |||
631 | call read_mac |
||
632 | |||
633 | call PHY_config |
||
634 | |||
635 | ; DEBUGF 1,"K : Set MAC Reg C+CR Offset 0x82h = 0x01h\n" |
||
636 | set_io 0 |
||
637 | set_io 0x82 |
||
638 | mov al, 0x01 |
||
639 | out dx, al |
||
640 | cmp [tpc.mcfg], MCFG_METHOD_03 |
||
641 | jae @f |
||
642 | ; DEBUGF 1,"K : Set PCI Latency=0x40\n" |
||
643 | ; stdcall pci_write_config_byte,PCI_LATENCY_TIMER,0x40 |
||
644 | @@: |
||
645 | cmp [tpc.mcfg], MCFG_METHOD_02 |
||
646 | jne @f |
||
647 | ; DEBUGF 1,"K : Set MAC Reg C+CR Offset 0x82h = 0x01h\n" |
||
648 | set_io 0x82 |
||
649 | mov al, 0x01 |
||
650 | out dx, al |
||
651 | ; DEBUGF 1,"K : Set PHY Reg 0x0bh = 0x00h\n" |
||
652 | WRITE_GMII_REG 0x0b, 0x0000 ; w 0x0b 15 0 0 |
||
653 | @@: |
||
654 | ; if TBI is not enabled |
||
655 | set_io 0 |
||
656 | set_io REG_PHYstatus |
||
657 | in al, dx |
||
658 | test al, PHYS_TBI_Enable |
||
659 | jz .tbi_dis |
||
660 | READ_GMII_REG PHY_AUTO_NEGO_REG |
||
661 | |||
662 | ; enable 10/100 Full/Half Mode, leave PHY_AUTO_NEGO_REG bit4:0 unchanged |
||
663 | and eax, 0x0C1F |
||
664 | or eax, PHY_Cap_10_Half or PHY_Cap_10_Full or PHY_Cap_100_Half or PHY_Cap_100_Full |
||
665 | WRITE_GMII_REG PHY_AUTO_NEGO_REG, ax |
||
666 | |||
667 | ; enable 1000 Full Mode |
||
668 | WRITE_GMII_REG PHY_1000_CTRL_REG, PHY_Cap_1000_Full or PHY_Cap_1000_Half ; rtl8168 |
||
669 | |||
670 | ; Enable auto-negotiation and restart auto-nigotiation |
||
671 | WRITE_GMII_REG PHY_CTRL_REG, PHY_Enable_Auto_Nego or PHY_Restart_Auto_Nego |
||
672 | |||
673 | udelay 100 |
||
674 | mov ecx, 10000 |
||
675 | ; wait for auto-negotiation process |
||
676 | @@: dec ecx |
||
677 | jz @f |
||
1557 | hidnplayr | 678 | set_io 0 |
1554 | hidnplayr | 679 | READ_GMII_REG PHY_STAT_REG |
680 | udelay 100 |
||
681 | test eax, PHY_Auto_Neco_Comp |
||
682 | jz @b |
||
683 | set_io REG_PHYstatus |
||
684 | in al, dx |
||
685 | jmp @f |
||
686 | .tbi_dis: |
||
687 | udelay 100 |
||
688 | @@: |
||
689 | |||
690 | |||
691 | ;*************************************************************************** |
||
692 | ; Function |
||
693 | ; rt8169_reset |
||
694 | ; Description |
||
695 | ; Place the chip (ie, the ethernet card) into a virgin state |
||
696 | ; Destroyed registers |
||
697 | ; eax, ebx, ecx, edx |
||
698 | ; |
||
699 | ;*************************************************************************** |
||
700 | align 4 |
||
701 | reset: |
||
702 | |||
703 | DEBUGF 1,"reset\n" |
||
704 | |||
705 | lea eax, [tx_ring] |
||
706 | mov [tpc.TxDescArrays], eax |
||
707 | mov [tpc.TxDescArray], eax |
||
708 | |||
709 | lea eax, [rx_ring] |
||
710 | mov [tpc.RxDescArrays], eax |
||
711 | mov [tpc.RxDescArray], eax |
||
712 | |||
713 | call init_ring |
||
714 | call hw_start |
||
715 | |||
1558 | hidnplayr | 716 | ; clear packet/byte counters |
717 | |||
718 | xor eax, eax |
||
719 | lea edi, [device.bytes_tx] |
||
720 | mov ecx, 6 |
||
721 | rep stosd |
||
722 | |||
1554 | hidnplayr | 723 | mov [device.mtu], 1500 |
724 | |||
725 | xor eax, eax |
||
726 | ret |
||
727 | |||
728 | |||
729 | |||
730 | |||
731 | |||
732 | align 4 |
||
733 | PHY_config: |
||
734 | |||
735 | DEBUGF 1,"hw_PHY_config: priv.mcfg=%d, priv.pcfg=%d\n",[tpc.mcfg],[tpc.pcfg] |
||
736 | |||
737 | cmp [tpc.mcfg], MCFG_METHOD_04 |
||
738 | jne .not_4 |
||
1557 | hidnplayr | 739 | set_io 0 |
1554 | hidnplayr | 740 | ; WRITE_GMII_REG 0x1F, 0x0001 |
741 | ; WRITE_GMII_REG 0x1b, 0x841e |
||
742 | ; WRITE_GMII_REG 0x0e, 0x7bfb |
||
743 | ; WRITE_GMII_REG 0x09, 0x273a |
||
744 | WRITE_GMII_REG 0x1F, 0x0002 |
||
745 | WRITE_GMII_REG 0x01, 0x90D0 |
||
746 | WRITE_GMII_REG 0x1F, 0x0000 |
||
747 | jmp .exit |
||
748 | .not_4: |
||
749 | cmp [tpc.mcfg], MCFG_METHOD_02 |
||
750 | je @f |
||
751 | cmp [tpc.mcfg], MCFG_METHOD_03 |
||
752 | jne .not_2_or_3 |
||
1557 | hidnplayr | 753 | @@: |
754 | set_io 0 |
||
755 | WRITE_GMII_REG 0x1F, 0x0001 |
||
1554 | hidnplayr | 756 | WRITE_GMII_REG 0x15, 0x1000 |
757 | WRITE_GMII_REG 0x18, 0x65C7 |
||
758 | WRITE_GMII_REG 0x04, 0x0000 |
||
759 | WRITE_GMII_REG 0x03, 0x00A1 |
||
760 | WRITE_GMII_REG 0x02, 0x0008 |
||
761 | WRITE_GMII_REG 0x01, 0x1020 |
||
762 | WRITE_GMII_REG 0x00, 0x1000 |
||
763 | WRITE_GMII_REG 0x04, 0x0800 |
||
764 | WRITE_GMII_REG 0x04, 0x0000 |
||
765 | WRITE_GMII_REG 0x04, 0x7000 |
||
766 | WRITE_GMII_REG 0x03, 0xFF41 |
||
767 | WRITE_GMII_REG 0x02, 0xDE60 |
||
768 | WRITE_GMII_REG 0x01, 0x0140 |
||
769 | WRITE_GMII_REG 0x00, 0x0077 |
||
770 | WRITE_GMII_REG 0x04, 0x7800 |
||
771 | WRITE_GMII_REG 0x04, 0x7000 |
||
772 | WRITE_GMII_REG 0x04, 0xA000 |
||
773 | WRITE_GMII_REG 0x03, 0xDF01 |
||
774 | WRITE_GMII_REG 0x02, 0xDF20 |
||
775 | WRITE_GMII_REG 0x01, 0xFF95 |
||
776 | WRITE_GMII_REG 0x00, 0xFA00 |
||
777 | WRITE_GMII_REG 0x04, 0xA800 |
||
778 | WRITE_GMII_REG 0x04, 0xA000 |
||
779 | WRITE_GMII_REG 0x04, 0xB000 |
||
780 | WRITE_GMII_REG 0x03, 0xFF41 |
||
781 | WRITE_GMII_REG 0x02, 0xDE20 |
||
782 | WRITE_GMII_REG 0x01, 0x0140 |
||
783 | WRITE_GMII_REG 0x00, 0x00BB |
||
784 | WRITE_GMII_REG 0x04, 0xB800 |
||
785 | WRITE_GMII_REG 0x04, 0xB000 |
||
786 | WRITE_GMII_REG 0x04, 0xF000 |
||
787 | WRITE_GMII_REG 0x03, 0xDF01 |
||
788 | WRITE_GMII_REG 0x02, 0xDF20 |
||
789 | WRITE_GMII_REG 0x01, 0xFF95 |
||
790 | WRITE_GMII_REG 0x00, 0xBF00 |
||
791 | WRITE_GMII_REG 0x04, 0xF800 |
||
792 | WRITE_GMII_REG 0x04, 0xF000 |
||
793 | WRITE_GMII_REG 0x04, 0x0000 |
||
794 | WRITE_GMII_REG 0x1F, 0x0000 |
||
795 | WRITE_GMII_REG 0x0B, 0x0000 |
||
796 | jmp .exit |
||
797 | .not_2_or_3: |
||
798 | DEBUGF 1,"tpc.mcfg=%d, discard hw PHY config\n", [tpc.mcfg] |
||
799 | .exit: |
||
800 | ret |
||
801 | |||
802 | |||
803 | |||
804 | align 4 |
||
805 | set_rx_mode: |
||
806 | |||
807 | DEBUGF 1,"set_rx_mode\n" |
||
808 | |||
809 | ; IFF_ALLMULTI |
||
810 | ; Too many to filter perfectly -- accept all multicasts |
||
811 | set_io 0 |
||
812 | set_io REG_RxConfig |
||
813 | in eax, dx |
||
814 | mov ecx, [tpc.chipset] |
||
815 | and eax, [rtl_chip_info + ecx * 8 + 4] ; RxConfigMask |
||
816 | or eax, rx_config or (RXM_AcceptBroadcast or RXM_AcceptMulticast or RXM_AcceptMyPhys) |
||
817 | out dx, eax |
||
818 | |||
819 | ; Multicast hash filter |
||
820 | set_io REG_MAR0 + 0 |
||
821 | or eax, -1 |
||
822 | out dx, eax |
||
823 | set_io REG_MAR0 + 4 |
||
824 | out dx, eax |
||
825 | |||
826 | ret |
||
827 | |||
828 | |||
829 | align 4 |
||
830 | init_ring: |
||
831 | |||
832 | DEBUGF 1,"init_ring\n" |
||
833 | |||
834 | xor eax, eax |
||
835 | mov [tpc.cur_rx], eax |
||
836 | mov [tpc.cur_tx], eax |
||
837 | |||
838 | lea edi, [tx_ring] |
||
839 | mov ecx, (NUM_TX_DESC * tx_desc.size) / 4 |
||
840 | rep stosd |
||
841 | |||
842 | lea edi, [rx_ring] |
||
843 | mov ecx, (NUM_RX_DESC * rx_desc.size) / 4 |
||
844 | rep stosd |
||
845 | |||
846 | mov edi, [tpc.RxDescArray] |
||
847 | mov ecx, NUM_RX_DESC |
||
1557 | hidnplayr | 848 | .loop: |
849 | push ecx |
||
850 | stdcall KernelAlloc, RX_BUF_SIZE |
||
851 | mov [edi + rx_desc.buf_soft_addr], eax |
||
852 | call GetPgAddr |
||
853 | mov dword [edi + rx_desc.buf_addr], eax |
||
1554 | hidnplayr | 854 | mov [edi + rx_desc.status], DSB_OWNbit or RX_BUF_SIZE |
855 | add edi, rx_desc.size |
||
1557 | hidnplayr | 856 | pop ecx |
857 | loop .loop |
||
1554 | hidnplayr | 858 | or [edi - rx_desc.size + rx_desc.status], DSB_EORbit |
859 | |||
860 | ret |
||
861 | |||
862 | |||
863 | align 4 |
||
864 | hw_start: |
||
865 | |||
866 | DEBUGF 1,"hw_start\n" |
||
867 | |||
1556 | hidnplayr | 868 | ; attach int handler |
869 | movzx eax, [device.irq_line] |
||
870 | DEBUGF 1,"Attaching int handler to irq %x\n", eax:1 |
||
871 | stdcall AttachIntHandler, eax, int_handler, dword 0 |
||
872 | |||
1554 | hidnplayr | 873 | ; Soft reset the chip |
874 | set_io 0 |
||
875 | set_io REG_ChipCmd |
||
876 | mov al, CMD_Reset |
||
877 | out dx, al |
||
878 | |||
879 | ; Check that the chip has finished the reset |
||
880 | mov ecx, 1000 |
||
881 | set_io REG_ChipCmd |
||
882 | @@: in al, dx |
||
883 | test al, CMD_Reset |
||
884 | jz @f |
||
885 | udelay 10 |
||
886 | loop @b |
||
887 | @@: |
||
888 | |||
889 | set_io REG_Cfg9346 |
||
890 | mov al, CFG_9346_Unlock |
||
891 | out dx, al |
||
892 | |||
893 | set_io REG_ChipCmd |
||
894 | mov al, CMD_TxEnb or CMD_RxEnb |
||
895 | out dx, al |
||
896 | |||
897 | set_io REG_ETThReg |
||
898 | mov al, ETTh |
||
899 | out dx, al |
||
900 | |||
901 | ; For gigabit rtl8169 |
||
902 | set_io REG_RxMaxSize |
||
903 | mov ax, RxPacketMaxSize |
||
904 | out dx, ax |
||
905 | |||
906 | ; Set Rx Config register |
||
907 | set_io REG_RxConfig |
||
908 | in ax, dx |
||
909 | mov ecx, [tpc.chipset] |
||
910 | and eax, [rtl_chip_info + ecx * 8 + 4] ; RxConfigMask |
||
911 | or eax, rx_config |
||
912 | out dx, eax |
||
913 | |||
914 | ; Set DMA burst size and Interframe Gap Time |
||
915 | set_io REG_TxConfig |
||
916 | mov eax, (TX_DMA_BURST shl TXC_DMAShift) or (InterFrameGap shl TXC_InterFrameGapShift) |
||
917 | out dx, eax |
||
918 | |||
919 | set_io REG_CPlusCmd |
||
920 | in ax, dx |
||
921 | out dx, ax |
||
922 | |||
923 | in ax, dx |
||
924 | or ax, 1 shl 3 |
||
925 | cmp [tpc.mcfg], MCFG_METHOD_02 |
||
926 | jne @f |
||
927 | cmp [tpc.mcfg], MCFG_METHOD_03 |
||
928 | jne @f |
||
929 | or ax,1 shl 14 |
||
930 | DEBUGF 1,"Set MAC Reg C+CR Offset 0xE0: bit-3 and bit-14\n" |
||
931 | jmp .set |
||
932 | @@: |
||
1823 | hidnplayr | 933 | DEBUGF 1,"Set MAC Reg C+CR Offset 0xE0: bit-3\n" |
1554 | hidnplayr | 934 | .set: |
935 | set_io REG_CPlusCmd |
||
936 | out dx, ax |
||
937 | |||
938 | set_io 0xE2 |
||
939 | ; mov ax, 0x1517 |
||
940 | ; out dx, ax |
||
941 | ; mov ax, 0x152a |
||
942 | ; out dx, ax |
||
943 | ; mov ax, 0x282a |
||
944 | ; out dx, ax |
||
945 | xor ax, ax |
||
946 | out dx, ax |
||
947 | |||
948 | xor eax, eax |
||
949 | mov [tpc.cur_rx], eax |
||
950 | lea eax, [tx_ring] |
||
951 | GetRealAddr |
||
952 | set_io REG_TxDescStartAddr |
||
953 | out dx, eax |
||
954 | |||
955 | lea eax, [rx_ring] |
||
956 | GetRealAddr |
||
957 | set_io REG_RxDescStartAddr |
||
958 | out dx, eax |
||
959 | |||
960 | set_io REG_Cfg9346 |
||
961 | mov al, CFG_9346_Lock |
||
962 | out dx, al |
||
963 | |||
964 | udelay 10 |
||
965 | |||
966 | xor eax, eax |
||
967 | set_io REG_RxMissed |
||
968 | out dx, eax |
||
969 | |||
970 | call set_rx_mode |
||
971 | |||
1557 | hidnplayr | 972 | set_io 0 |
1554 | hidnplayr | 973 | ; no early-rx interrupts |
974 | set_io REG_MultiIntr |
||
975 | in ax, dx |
||
976 | and ax, 0xF000 |
||
977 | out dx, ax |
||
978 | |||
979 | ; set interrupt mask |
||
980 | set_io REG_IntrMask |
||
981 | mov ax, intr_mask |
||
982 | out dx, ax |
||
983 | |||
984 | xor eax, eax |
||
985 | ret |
||
986 | |||
987 | |||
988 | align 4 |
||
989 | read_mac: |
||
990 | |||
991 | set_io 0 |
||
992 | set_io REG_MAC0 |
||
993 | xor ecx, ecx |
||
1557 | hidnplayr | 994 | lea edi, [device.mac] |
1554 | hidnplayr | 995 | mov ecx, MAC_ADDR_LEN |
996 | |||
997 | ; Get MAC address. FIXME: read EEPROM |
||
998 | @@: in al, dx |
||
999 | stosb |
||
1000 | inc edx |
||
1001 | loop @r |
||
1002 | |||
1003 | DEBUGF 1,"MAC = %x-%x-%x-%x-%x-%x\n",[device.mac+0]:2,[device.mac+1]:2,[device.mac+2]:2,[device.mac+3]:2,[device.mac+4]:2,[device.mac+5]:2 |
||
1004 | |||
1005 | ret |
||
1006 | |||
1007 | align 4 |
||
1008 | write_mac: |
||
1009 | |||
1010 | ret 6 |
||
1011 | |||
1012 | |||
1013 | |||
1014 | |||
1015 | |||
1016 | ;*************************************************************************** |
||
1017 | ; Function |
||
1018 | ; transmit |
||
1019 | ; Description |
||
1020 | ; Transmits a packet of data via the ethernet card |
||
1021 | ; |
||
1022 | ; Destroyed registers |
||
1023 | ; eax, edx, esi, edi |
||
1024 | ; |
||
1025 | ;*************************************************************************** |
||
1026 | align 4 |
||
1027 | transmit: |
||
1028 | |||
1029 | DEBUGF 1,"Transmitting packet, buffer:%x, size:%u\n", [esp+4], [esp+8] |
||
1030 | mov eax, [esp+4] |
||
1031 | DEBUGF 1,"To: %x-%x-%x-%x-%x-%x From: %x-%x-%x-%x-%x-%x Type:%x%x\n",\ |
||
1032 | [eax+00]:2,[eax+01]:2,[eax+02]:2,[eax+03]:2,[eax+04]:2,[eax+05]:2,\ |
||
1033 | [eax+06]:2,[eax+07]:2,[eax+08]:2,[eax+09]:2,[eax+10]:2,[eax+11]:2,\ |
||
1034 | [eax+13]:2,[eax+12]:2 |
||
1035 | |||
1036 | cmp dword [esp+8], MAX_ETH_FRAME_SIZE |
||
1037 | ja .fail |
||
1038 | |||
1039 | ;---------------------------------- |
||
1040 | ; Find currentTX descriptor address |
||
1041 | |||
1042 | mov eax, tx_desc.size |
||
1043 | mul [tpc.cur_tx] |
||
1044 | lea esi, [eax + tx_ring] |
||
1045 | |||
1823 | hidnplayr | 1046 | DEBUGF 1,"Using TX desc: %x\n", esi |
1047 | |||
1554 | hidnplayr | 1048 | ;--------------------------- |
1049 | ; Program the packet pointer |
||
1050 | |||
1557 | hidnplayr | 1051 | mov eax, [esp + 4] |
1052 | mov [esi + tx_desc.buf_soft_addr], eax |
||
1554 | hidnplayr | 1053 | GetRealAddr |
1557 | hidnplayr | 1054 | mov dword [esi + tx_desc.buf_addr], eax |
1554 | hidnplayr | 1055 | |
1056 | ;------------------------ |
||
1057 | ; Program the packet size |
||
1058 | |||
1557 | hidnplayr | 1059 | mov eax, [esp + 8] |
1554 | hidnplayr | 1060 | @@: or eax, DSB_OWNbit or DSB_FSbit or DSB_LSbit |
1061 | cmp [tpc.cur_tx], NUM_TX_DESC - 1 |
||
1062 | jne @f |
||
1063 | or eax, DSB_EORbit |
||
1064 | @@: mov [esi + tx_desc.status], eax |
||
1065 | |||
1558 | hidnplayr | 1066 | ;----------------------------------------- |
1067 | ; Set the polling bit (start transmission) |
||
1554 | hidnplayr | 1068 | |
1069 | set_io 0 |
||
1070 | set_io REG_TxPoll |
||
1071 | mov al, 0x40 ; set polling bit |
||
1072 | out dx, al |
||
1073 | |||
1074 | ;----------------------- |
||
1075 | ; Update TX descriptor |
||
1076 | |||
1077 | inc [tpc.cur_tx] |
||
1078 | and [tpc.cur_tx], NUM_TX_DESC - 1 |
||
1558 | hidnplayr | 1079 | |
1080 | ;------------- |
||
1081 | ; Update stats |
||
1082 | |||
1083 | inc [device.packets_tx] |
||
1084 | mov eax, [esp+8] |
||
1085 | add dword [device.bytes_tx], eax |
||
1086 | adc dword [device.bytes_tx + 4], 0 |
||
1087 | |||
1554 | hidnplayr | 1088 | ret 8 |
1089 | |||
1090 | .fail: |
||
1091 | DEBUGF 1,"transmit failed\n" |
||
1092 | or eax, -1 |
||
1093 | stdcall KernelFree, [esp+4] |
||
1094 | ret 8 |
||
1095 | |||
1096 | |||
1097 | ;;;DSB_OWNbit |
||
1098 | |||
1099 | |||
1100 | ;;;;;;;;;;;;;;;;;;;;;;; |
||
1101 | ;; ;; |
||
1102 | ;; Interrupt handler ;; |
||
1103 | ;; ;; |
||
1104 | ;;;;;;;;;;;;;;;;;;;;;;; |
||
1105 | |||
1106 | align 4 |
||
1107 | int_handler: |
||
1108 | |||
1109 | DEBUGF 1,"IRQ %x ",eax:2 |
||
1110 | |||
1111 | ; find pointer of device wich made IRQ occur |
||
1112 | |||
1113 | mov ecx, [devices] |
||
1114 | test ecx, ecx |
||
1115 | jz .fail |
||
1116 | mov esi, device_list |
||
1117 | .nextdevice: |
||
1118 | mov ebx, dword [esi] |
||
1119 | |||
1557 | hidnplayr | 1120 | set_io 0 |
1554 | hidnplayr | 1121 | set_io REG_IntrStatus |
1122 | in ax, dx |
||
1123 | |||
1124 | test ax, ax |
||
1125 | jnz .got_it |
||
1126 | |||
1127 | .continue: |
||
1128 | add esi, 4 |
||
1129 | dec ecx |
||
1130 | jnz .nextdevice |
||
1131 | |||
1132 | ret ; If no device was found, abort (The irq was probably for a device, not registered to this driver) |
||
1133 | |||
1134 | .got_it: |
||
1135 | DEBUGF 1,"IntrStatus = 0x%x\n",ax |
||
1136 | |||
1137 | cmp ax, 0xFFFF ; if so, hardware is no longer present |
||
1138 | je .fail |
||
1139 | |||
1140 | ;-------- |
||
1141 | ; Receive |
||
1142 | |||
1143 | test ax, ISB_RxOK |
||
1144 | jz .no_rx |
||
1145 | |||
1146 | push ax |
||
1823 | hidnplayr | 1147 | push ebx |
1554 | hidnplayr | 1148 | |
1559 | hidnplayr | 1149 | .check_more: |
1823 | hidnplayr | 1150 | pop ebx |
1151 | DEBUGF 1,"ebx = 0x%x\n", ebx |
||
1554 | hidnplayr | 1152 | mov eax, rx_desc.size |
1153 | mul [tpc.cur_rx] |
||
1154 | lea esi, [eax + rx_ring] |
||
1155 | |||
1156 | DEBUGF 1,"RxDesc.status = 0x%x\n", [esi + rx_desc.status] |
||
1157 | |||
1557 | hidnplayr | 1158 | mov eax, [esi + rx_desc.status] |
1159 | test eax, DSB_OWNbit ;;; |
||
1554 | hidnplayr | 1160 | jnz .rx_return |
1161 | |||
1162 | DEBUGF 1,"tpc.cur_rx = %u\n", [tpc.cur_rx] |
||
1163 | |||
1164 | test eax, SD_RxRES |
||
1165 | jnz .rx_return ;;;;; RX error! |
||
1166 | |||
1823 | hidnplayr | 1167 | push ebx |
1559 | hidnplayr | 1168 | push .check_more |
1554 | hidnplayr | 1169 | and eax, 0x00001FFF |
1170 | add eax, -4 ; we dont need CRC |
||
1171 | push eax |
||
1172 | DEBUGF 1,"data length = %u\n", ax |
||
1173 | |||
1558 | hidnplayr | 1174 | ;------------- |
1175 | ; Update stats |
||
1559 | hidnplayr | 1176 | |
1558 | hidnplayr | 1177 | add dword [device.bytes_rx], eax |
1178 | adc dword [device.bytes_rx + 4], 0 |
||
1179 | inc dword [device.packets_rx] |
||
1180 | |||
1557 | hidnplayr | 1181 | push [esi + rx_desc.buf_soft_addr] |
1554 | hidnplayr | 1182 | |
1557 | hidnplayr | 1183 | ;---------------------- |
1184 | ; Allocate a new buffer |
||
1185 | |||
1186 | stdcall KernelAlloc, RX_BUF_SIZE |
||
1187 | mov [esi + rx_desc.buf_soft_addr], eax |
||
1188 | GetRealAddr |
||
1189 | mov dword [esi + rx_desc.buf_addr], eax |
||
1190 | |||
1554 | hidnplayr | 1191 | ;--------------- |
1192 | ; re set OWN bit |
||
1193 | |||
1194 | mov eax, DSB_OWNbit or RX_BUF_SIZE |
||
1195 | cmp [tpc.cur_rx], NUM_RX_DESC - 1 |
||
1196 | jne @f |
||
1197 | or eax, DSB_EORbit |
||
1198 | @@: mov [esi + rx_desc.status], eax |
||
1199 | |||
1200 | ;-------------- |
||
1201 | ; Update rx ptr |
||
1202 | |||
1203 | inc [tpc.cur_rx] |
||
1204 | and [tpc.cur_rx], NUM_RX_DESC - 1 |
||
1205 | |||
1206 | jmp EthReceiver |
||
1207 | .rx_return: |
||
1208 | |||
1209 | pop ax |
||
1210 | .no_rx: |
||
1211 | |||
1212 | ;--------- |
||
1213 | ; Transmit |
||
1214 | |||
1215 | test ax, ISB_TxOK |
||
1216 | jz .no_tx |
||
1217 | push ax |
||
1218 | |||
1219 | DEBUGF 1,"TX ok!\n" |
||
1220 | |||
1558 | hidnplayr | 1221 | mov ecx, NUM_TX_DESC |
1559 | hidnplayr | 1222 | lea esi, [tx_ring] |
1558 | hidnplayr | 1223 | .txloop: |
1224 | cmp [esi+tx_desc.buf_soft_addr], 0 |
||
1225 | jz .maybenext |
||
1226 | |||
1227 | test [esi+tx_desc.status], DSB_OWNbit |
||
1228 | jnz .maybenext |
||
1229 | |||
1230 | push ecx |
||
1823 | hidnplayr | 1231 | DEBUGF 1,"Freeing up TX desc: %x\n", esi |
1558 | hidnplayr | 1232 | stdcall KernelFree, [esi+tx_desc.buf_soft_addr] |
1233 | pop ecx |
||
1234 | and [esi+tx_desc.buf_soft_addr], 0 |
||
1235 | |||
1236 | .maybenext: |
||
1237 | add esi, tx_desc.size |
||
1238 | dec ecx |
||
1239 | jnz .txloop |
||
1240 | |||
1554 | hidnplayr | 1241 | pop ax |
1242 | .no_tx: |
||
1243 | |||
1244 | ;------- |
||
1245 | ; Finish |
||
1246 | |||
1247 | set_io 0 |
||
1248 | set_io REG_IntrStatus |
||
1249 | out dx, ax ; ACK all interrupts |
||
1250 | |||
1251 | .fail: |
||
1252 | ret |
||
1253 | |||
1254 | |||
1255 | |||
1256 | |||
1257 | |||
1258 | |||
1259 | |||
1260 | |||
1261 | |||
1262 | ; End of code |
||
1263 | align 4 ; Place all initialised data here |
||
1264 | |||
1265 | devices dd 0 |
||
1266 | version dd (DRIVER_VERSION shl 16) or (API_VERSION and 0xFFFF) |
||
1267 | my_service db 'RTL8169',0 ; max 16 chars include zero |
||
1268 | |||
1269 | include_debug_strings ; All data wich FDO uses will be included here |
||
1270 | |||
1271 | rtl_chip_info dd \ |
||
1272 | MCFG_METHOD_01, 0xff7e1880, \ ; RTL8169 |
||
1273 | MCFG_METHOD_02, 0xff7e1880, \ ; RTL8169s/8110s |
||
1274 | MCFG_METHOD_03, 0xff7e1880, \ ; RTL8169s/8110s |
||
1275 | MCFG_METHOD_04, 0xff7e1880, \ ; RTL8169sb/8110sb |
||
1276 | MCFG_METHOD_05, 0xff7e1880, \ ; RTL8169sc/8110sc |
||
1277 | MCFG_METHOD_11, 0xff7e1880, \ ; RTL8168b/8111b // PCI-E |
||
1278 | MCFG_METHOD_12, 0xff7e1880, \ ; RTL8168b/8111b // PCI-E |
||
1279 | MCFG_METHOD_13, 0xff7e1880, \ ; RTL8101e // PCI-E 8139 |
||
1280 | MCFG_METHOD_14, 0xff7e1880, \ ; RTL8100e // PCI-E 8139 |
||
1281 | MCFG_METHOD_15, 0xff7e1880 ; RTL8100e // PCI-E 8139 |
||
1282 | |||
1283 | mac_info dd \ |
||
1284 | 0x38800000, MCFG_METHOD_15, \ |
||
1285 | 0x38000000, MCFG_METHOD_12, \ |
||
1286 | 0x34000000, MCFG_METHOD_13, \ |
||
1287 | 0x30800000, MCFG_METHOD_14, \ |
||
1288 | 0x30000000, MCFG_METHOD_11, \ |
||
1289 | 0x18000000, MCFG_METHOD_05, \ |
||
1290 | 0x10000000, MCFG_METHOD_04, \ |
||
1291 | 0x04000000, MCFG_METHOD_03, \ |
||
1292 | 0x00800000, MCFG_METHOD_02, \ |
||
1293 | 0x00000000, MCFG_METHOD_01 ; catch-all |
||
1294 | |||
1558 | hidnplayr | 1295 | name_01 db "RTL8169", 0 |
1296 | name_02_03 db "RTL8169s/8110s", 0 |
||
1297 | name_04 db "RTL8169sb/8110sb", 0 |
||
1298 | name_05 db "RTL8169sc/8110sc", 0 |
||
1299 | name_11_12 db "RTL8168b/8111b", 0 ; PCI-E |
||
1300 | name_13 db "RTL8101e", 0 ; PCI-E 8139 |
||
1301 | name_14_15 db "RTL8100e", 0 ; PCI-E 8139 |
||
1302 | |||
1303 | |||
1554 | hidnplayr | 1304 | section '.data' data readable writable align 16 ; place all uninitialized data place here |
1305 | |||
1306 | device_list rd MAX_DEVICES ; This list contains all pointers to device structures the driver is handling |
||
1307 |