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Rev | Author | Line No. | Line |
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431 | serge | 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
586 | serge | 2 | ;; ;; |
431 | serge | 3 | ;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;; |
4 | ;; Distributed under terms of the GNU General Public License ;; |
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5 | ;; ;; |
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6 | ;; ;; |
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586 | serge | 7 | ;; PCI32.INC ;; |
8 | ;; ;; |
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9 | ;; 32 bit PCI driver code ;; |
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10 | ;; ;; |
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11 | ;; Version 0.3 April 9, 2007 ;; |
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12 | ;; Version 0.2 December 21st, 2002 ;; |
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13 | ;; ;; |
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14 | ;; Author: Victor Prodan, victorprodan@yahoo.com ;; |
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15 | ;; Mihailov Ilia, ghost.nsk@gmail.com ;; |
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16 | ;; Credits: ;; |
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17 | ;; Ralf Brown ;; |
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18 | ;; Mike Hibbett, mikeh@oceanfree.net ;; |
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19 | ;; ;; |
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20 | ;; See file COPYING for details ;; |
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21 | ;; ;; |
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431 | serge | 22 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
1 | ha | 23 | |
750 | victor | 24 | $Revision: 1376 $ |
1 | ha | 25 | |
26 | ;*************************************************************************** |
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27 | ; Function |
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28 | ; pci_api: |
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29 | ; |
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30 | ; Description |
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31 | ; entry point for system PCI calls |
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32 | ;*************************************************************************** |
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1370 | art_zh | 33 | ;mmio_pci_addr equ 0x400 ; set actual PCI address here to activate user-MMIO |
1 | ha | 34 | |
1370 | art_zh | 35 | |
1 | ha | 36 | align 4 |
37 | |||
38 | pci_api: |
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39 | |||
1348 | art_zh | 40 | cmp [pci_access_enabled],1 |
41 | jne no_pci_access_for_applications |
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1 | ha | 42 | |
1348 | art_zh | 43 | or al,al |
44 | jnz pci_fn_1 |
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45 | ; PCI function 0: get pci version (AH.AL) |
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46 | movzx eax,word [BOOT_VAR+0x9022] |
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47 | ret |
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1 | ha | 48 | |
49 | pci_fn_1: |
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1348 | art_zh | 50 | cmp al,1 |
51 | jnz pci_fn_2 |
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1 | ha | 52 | |
1348 | art_zh | 53 | ; PCI function 1: get last bus in AL |
54 | mov al,[BOOT_VAR+0x9021] |
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55 | ret |
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1 | ha | 56 | |
57 | pci_fn_2: |
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1348 | art_zh | 58 | cmp al,2 |
59 | jne pci_fn_3 |
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60 | ; PCI function 2: get pci access mechanism |
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61 | mov al,[BOOT_VAR+0x9020] |
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62 | ret |
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1 | ha | 63 | pci_fn_3: |
64 | |||
1348 | art_zh | 65 | cmp al,4 |
66 | jz pci_read_reg ;byte |
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67 | cmp al,5 |
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68 | jz pci_read_reg ;word |
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69 | cmp al,6 |
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70 | jz pci_read_reg ;dword |
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1 | ha | 71 | |
1348 | art_zh | 72 | cmp al,8 |
73 | jz pci_write_reg ;byte |
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74 | cmp al,9 |
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75 | jz pci_write_reg ;word |
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76 | cmp al,10 |
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77 | jz pci_write_reg ;dword |
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1 | ha | 78 | |
1354 | diamond | 79 | if defined mmio_pci_addr |
1370 | art_zh | 80 | cmp al,11 ; user-level MMIO functions |
1348 | art_zh | 81 | jz pci_mmio_init |
82 | cmp al,12 |
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83 | jz pci_mmio_map |
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84 | cmp al,13 |
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85 | jz pci_mmio_unmap |
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1354 | diamond | 86 | end if |
1348 | art_zh | 87 | |
1 | ha | 88 | no_pci_access_for_applications: |
89 | |||
1375 | Lrz | 90 | or eax,-1 |
1 | ha | 91 | |
1348 | art_zh | 92 | ret |
1 | ha | 93 | |
94 | ;*************************************************************************** |
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95 | ; Function |
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96 | ; pci_make_config_cmd |
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97 | ; |
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98 | ; Description |
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99 | ; creates a command dword for use with the PCI bus |
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100 | ; bus # in ah |
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101 | ; device+func in bh (dddddfff) |
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102 | ; register in bl |
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103 | ; |
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104 | ; command dword returned in eax ( 10000000 bbbbbbbb dddddfff rrrrrr00 ) |
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105 | ;*************************************************************************** |
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106 | |||
107 | align 4 |
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108 | |||
109 | pci_make_config_cmd: |
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1348 | art_zh | 110 | shl eax,8 ; move bus to bits 16-23 |
111 | mov ax,bx ; combine all |
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1 | ha | 112 | and eax,0xffffff |
1348 | art_zh | 113 | or eax,0x80000000 |
1 | ha | 114 | ret |
115 | |||
116 | ;*************************************************************************** |
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117 | ; Function |
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118 | ; pci_read_reg: |
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119 | ; |
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120 | ; Description |
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121 | ; read a register from the PCI config space into EAX/AX/AL |
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122 | ; IN: ah=bus,device+func=bh,register address=bl |
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123 | ; number of bytes to read (1,2,4) coded into AL, bits 0-1 |
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586 | serge | 124 | ; (0 - byte, 1 - word, 2 - dword) |
1 | ha | 125 | ;*************************************************************************** |
126 | |||
127 | align 4 |
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128 | |||
129 | pci_read_reg: |
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1348 | art_zh | 130 | cmp byte [BOOT_VAR+0x9020],2 ;what mechanism will we use? |
131 | je pci_read_reg_2 |
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1 | ha | 132 | |
1348 | art_zh | 133 | ; mechanism 1 |
134 | push esi ; save register size into ESI |
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135 | mov esi,eax |
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136 | and esi,3 |
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1 | ha | 137 | |
1348 | art_zh | 138 | call pci_make_config_cmd |
139 | mov ebx,eax |
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140 | ; get current state |
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141 | mov dx,0xcf8 |
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142 | in eax, dx |
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143 | push eax |
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144 | ; set up addressing to config data |
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145 | mov eax,ebx |
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146 | and al,0xfc ; make address dword-aligned |
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147 | out dx,eax |
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148 | ; get requested DWORD of config data |
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149 | mov dl,0xfc |
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150 | and bl,3 |
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151 | or dl,bl ; add to port address first 2 bits of register address |
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1 | ha | 152 | |
1348 | art_zh | 153 | or esi,esi |
154 | jz pci_read_byte1 |
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155 | cmp esi,1 |
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156 | jz pci_read_word1 |
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157 | cmp esi,2 |
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158 | jz pci_read_dword1 |
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159 | jmp pci_fin_read1 |
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1 | ha | 160 | |
161 | pci_read_byte1: |
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1348 | art_zh | 162 | in al,dx |
163 | jmp pci_fin_read1 |
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1 | ha | 164 | pci_read_word1: |
1348 | art_zh | 165 | in ax,dx |
166 | jmp pci_fin_read1 |
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1 | ha | 167 | pci_read_dword1: |
1348 | art_zh | 168 | in eax,dx |
169 | jmp pci_fin_read1 |
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1 | ha | 170 | pci_fin_read1: |
1348 | art_zh | 171 | ; restore configuration control |
172 | xchg eax,[esp] |
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173 | mov dx,0xcf8 |
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174 | out dx,eax |
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1 | ha | 175 | |
1348 | art_zh | 176 | pop eax |
177 | pop esi |
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178 | ret |
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1 | ha | 179 | pci_read_reg_2: |
180 | |||
1348 | art_zh | 181 | test bh,128 ;mech#2 only supports 16 devices per bus |
182 | jnz pci_read_reg_err |
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1 | ha | 183 | |
1348 | art_zh | 184 | push esi ; save register size into ESI |
185 | mov esi,eax |
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186 | and esi,3 |
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1 | ha | 187 | |
1348 | art_zh | 188 | push eax |
189 | ;store current state of config space |
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190 | mov dx,0xcf8 |
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191 | in al,dx |
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192 | mov ah,al |
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193 | mov dl,0xfa |
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194 | in al,dx |
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1 | ha | 195 | |
1348 | art_zh | 196 | xchg eax,[esp] |
197 | ; out 0xcfa,bus |
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198 | mov al,ah |
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199 | out dx,al |
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200 | ; out 0xcf8,0x80 |
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201 | mov dl,0xf8 |
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202 | mov al,0x80 |
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203 | out dx,al |
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204 | ; compute addr |
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205 | shr bh,3 ; func is ignored in mechanism 2 |
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206 | or bh,0xc0 |
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207 | mov dx,bx |
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1 | ha | 208 | |
1348 | art_zh | 209 | or esi,esi |
210 | jz pci_read_byte2 |
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211 | cmp esi,1 |
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212 | jz pci_read_word2 |
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213 | cmp esi,2 |
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214 | jz pci_read_dword2 |
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215 | jmp pci_fin_read2 |
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1 | ha | 216 | |
217 | pci_read_byte2: |
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1348 | art_zh | 218 | in al,dx |
219 | jmp pci_fin_read2 |
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1 | ha | 220 | pci_read_word2: |
1348 | art_zh | 221 | in ax,dx |
222 | jmp pci_fin_read2 |
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1 | ha | 223 | pci_read_dword2: |
1348 | art_zh | 224 | in eax,dx |
1 | ha | 225 | ; jmp pci_fin_read2 |
226 | pci_fin_read2: |
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227 | |||
1348 | art_zh | 228 | ; restore configuration space |
229 | xchg eax,[esp] |
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230 | mov dx,0xcfa |
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231 | out dx,al |
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232 | mov dl,0xf8 |
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233 | mov al,ah |
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234 | out dx,al |
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1 | ha | 235 | |
1348 | art_zh | 236 | pop eax |
237 | pop esi |
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238 | ret |
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1 | ha | 239 | |
240 | pci_read_reg_err: |
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1348 | art_zh | 241 | xor eax,eax |
242 | dec eax |
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243 | ret |
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1 | ha | 244 | |
245 | |||
246 | ;*************************************************************************** |
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247 | ; Function |
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248 | ; pci_write_reg: |
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249 | ; |
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250 | ; Description |
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251 | ; write a register from ECX/CX/CL into the PCI config space |
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252 | ; IN: ah=bus,device+func=bh,register address (dword aligned)=bl, |
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253 | ; value to write in ecx |
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254 | ; number of bytes to write (1,2,4) coded into AL, bits 0-1 |
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586 | serge | 255 | ; (0 - byte, 1 - word, 2 - dword) |
1 | ha | 256 | ;*************************************************************************** |
257 | |||
258 | align 4 |
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259 | |||
260 | pci_write_reg: |
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1348 | art_zh | 261 | cmp byte [BOOT_VAR+0x9020],2 ;what mechanism will we use? |
262 | je pci_write_reg_2 |
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1 | ha | 263 | |
1348 | art_zh | 264 | ; mechanism 1 |
265 | push esi ; save register size into ESI |
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266 | mov esi,eax |
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267 | and esi,3 |
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1 | ha | 268 | |
1348 | art_zh | 269 | call pci_make_config_cmd |
270 | mov ebx,eax |
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271 | ; get current state into ecx |
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272 | mov dx,0xcf8 |
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273 | in eax, dx |
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274 | push eax |
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275 | ; set up addressing to config data |
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276 | mov eax,ebx |
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277 | and al,0xfc ; make address dword-aligned |
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278 | out dx,eax |
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279 | ; write DWORD of config data |
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280 | mov dl,0xfc |
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281 | and bl,3 |
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282 | or dl,bl |
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283 | mov eax,ecx |
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1 | ha | 284 | |
1348 | art_zh | 285 | or esi,esi |
286 | jz pci_write_byte1 |
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287 | cmp esi,1 |
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288 | jz pci_write_word1 |
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289 | cmp esi,2 |
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290 | jz pci_write_dword1 |
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291 | jmp pci_fin_write1 |
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1 | ha | 292 | |
293 | pci_write_byte1: |
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1348 | art_zh | 294 | out dx,al |
295 | jmp pci_fin_write1 |
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1 | ha | 296 | pci_write_word1: |
1348 | art_zh | 297 | out dx,ax |
298 | jmp pci_fin_write1 |
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1 | ha | 299 | pci_write_dword1: |
1348 | art_zh | 300 | out dx,eax |
301 | jmp pci_fin_write1 |
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1 | ha | 302 | pci_fin_write1: |
303 | |||
1348 | art_zh | 304 | ; restore configuration control |
305 | pop eax |
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306 | mov dl,0xf8 |
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307 | out dx,eax |
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1 | ha | 308 | |
1348 | art_zh | 309 | xor eax,eax |
310 | pop esi |
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1 | ha | 311 | |
1348 | art_zh | 312 | ret |
1 | ha | 313 | pci_write_reg_2: |
314 | |||
1348 | art_zh | 315 | test bh,128 ;mech#2 only supports 16 devices per bus |
316 | jnz pci_write_reg_err |
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1 | ha | 317 | |
318 | |||
1348 | art_zh | 319 | push esi ; save register size into ESI |
320 | mov esi,eax |
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321 | and esi,3 |
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1 | ha | 322 | |
1348 | art_zh | 323 | push eax |
324 | ;store current state of config space |
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325 | mov dx,0xcf8 |
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326 | in al,dx |
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327 | mov ah,al |
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328 | mov dl,0xfa |
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329 | in al,dx |
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330 | xchg eax,[esp] |
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331 | ; out 0xcfa,bus |
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332 | mov al,ah |
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333 | out dx,al |
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334 | ; out 0xcf8,0x80 |
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335 | mov dl,0xf8 |
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336 | mov al,0x80 |
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337 | out dx,al |
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338 | ; compute addr |
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339 | shr bh,3 ; func is ignored in mechanism 2 |
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340 | or bh,0xc0 |
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341 | mov dx,bx |
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342 | ; write register |
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343 | mov eax,ecx |
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1 | ha | 344 | |
1348 | art_zh | 345 | or esi,esi |
346 | jz pci_write_byte2 |
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347 | cmp esi,1 |
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348 | jz pci_write_word2 |
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349 | cmp esi,2 |
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350 | jz pci_write_dword2 |
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351 | jmp pci_fin_write2 |
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1 | ha | 352 | |
353 | pci_write_byte2: |
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1348 | art_zh | 354 | out dx,al |
355 | jmp pci_fin_write2 |
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1 | ha | 356 | pci_write_word2: |
1348 | art_zh | 357 | out dx,ax |
358 | jmp pci_fin_write2 |
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1 | ha | 359 | pci_write_dword2: |
1348 | art_zh | 360 | out dx,eax |
361 | jmp pci_fin_write2 |
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1 | ha | 362 | pci_fin_write2: |
1348 | art_zh | 363 | ; restore configuration space |
364 | pop eax |
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365 | mov dx,0xcfa |
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366 | out dx,al |
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367 | mov dl,0xf8 |
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368 | mov al,ah |
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369 | out dx,al |
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1 | ha | 370 | |
1348 | art_zh | 371 | xor eax,eax |
372 | pop esi |
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373 | ret |
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1 | ha | 374 | |
375 | pci_write_reg_err: |
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1348 | art_zh | 376 | xor eax,eax |
377 | dec eax |
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378 | ret |
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586 | serge | 379 | |
1370 | art_zh | 380 | if defined mmio_pci_addr ; must be set above |
1348 | art_zh | 381 | ;*************************************************************************** |
382 | ; Function |
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1370 | art_zh | 383 | ; pci_mmio_init |
1348 | art_zh | 384 | ; |
385 | ; Description |
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386 | ; IN: bx = device's PCI bus address (bbbbbbbbdddddfff) |
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1358 | art_zh | 387 | ; Returns eax = user heap space available (bytes) |
1348 | art_zh | 388 | ; Error codes |
389 | ; eax = -1 : PCI user access blocked, |
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390 | ; eax = -2 : device not registered for uMMIO service |
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391 | ; eax = -3 : user heap initialization failure |
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392 | ;*************************************************************************** |
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393 | pci_mmio_init: |
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1370 | art_zh | 394 | cmp bx, mmio_pci_addr |
1348 | art_zh | 395 | jz @f |
396 | mov eax,-2 |
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397 | ret |
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398 | @@: |
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399 | call init_heap ; (if not initialized yet) |
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400 | or eax,eax |
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401 | jz @f |
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402 | ret |
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403 | @@: |
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404 | mov eax,-3 |
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405 | ret |
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406 | |||
407 | |||
408 | ;*************************************************************************** |
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409 | ; Function |
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1370 | art_zh | 410 | ; pci_mmio_map |
1348 | art_zh | 411 | ; |
412 | ; Description |
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413 | ; maps a block of PCI memory to user-accessible linear address |
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414 | ; |
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415 | ; WARNING! This VERY EXPERIMENTAL service is for one chosen PCI device only! |
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416 | ; The target device address should be set in kernel var mmio_pci_addr |
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417 | ; |
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418 | ; IN: ah = BAR#; |
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419 | ; IN: ebx = block size (bytes); |
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420 | ; IN: ecx = offset in MMIO block (in 4K-pages, to avoid misaligned pages); |
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421 | ; |
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422 | ; Returns eax = MMIO block's linear address in the userspace (if no error) |
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423 | ; |
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424 | ; |
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425 | ; Error codes |
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426 | ; eax = -1 : user access to PCI blocked, |
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427 | ; eax = -2 : an invalid BAR register referred |
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428 | ; eax = -3 : no i/o space on that BAR |
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429 | ; eax = -4 : a port i/o BAR register referred |
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430 | ; eax = -5 : dynamic userspace allocation problem |
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431 | ;*************************************************************************** |
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432 | |||
433 | pci_mmio_map: |
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434 | and edx,0x0ffff |
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435 | cmp ah,6 |
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1353 | art_zh | 436 | jc .bar_0_5 |
437 | jz .bar_rom |
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1348 | art_zh | 438 | mov eax,-2 |
439 | ret |
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1353 | art_zh | 440 | .bar_rom: |
441 | mov ah, 8 ; bar6 = Expansion ROM base address |
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442 | .bar_0_5: |
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1348 | art_zh | 443 | push ecx |
444 | add ebx, 4095 |
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445 | and ebx,-4096 |
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446 | push ebx |
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1353 | art_zh | 447 | mov bl, ah ; bl = BAR# (0..5), however bl=8 for BAR6 |
1348 | art_zh | 448 | shl bl, 1 |
449 | shl bl, 1 |
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1353 | art_zh | 450 | add bl, 0x10 ; now bl = BAR offset in PCI config. space |
1354 | diamond | 451 | mov ax, mmio_pci_addr |
1348 | art_zh | 452 | mov bh, al ; bh = dddddfff |
453 | mov al, 2 ; al : DW to read |
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454 | call pci_read_reg |
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455 | or eax, eax |
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456 | jnz @f |
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457 | mov eax,-3 ; empty I/O space |
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458 | jmp mmio_ret_fail |
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459 | @@: |
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460 | test eax, 1 |
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461 | jz @f |
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462 | mov eax,-4 ; damned ports (not MMIO space) |
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463 | jmp mmio_ret_fail |
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464 | @@: |
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465 | pop ecx ; ecx = block size, bytes (expanded to whole page) |
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466 | mov ebx, ecx ; user_alloc destroys eax, ecx, edx, but saves ebx |
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467 | push eax ; store MMIO physical address + keep 2DWords in the stack |
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468 | stdcall user_alloc, ecx |
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469 | or eax, eax |
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470 | jnz mmio_map_over |
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471 | mov eax,-5 ; problem with page allocation |
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472 | |||
473 | mmio_ret_fail: |
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474 | pop ecx |
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475 | pop edx |
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476 | ret |
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477 | |||
478 | mmio_map_over: |
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479 | mov ecx, ebx ; ecx = size (bytes, expanded to whole page) |
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480 | shr ecx, 12 ; ecx = number of pages |
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481 | mov ebx, eax ; ebx = linear address |
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482 | pop eax ; eax = MMIO start |
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483 | pop edx ; edx = MMIO shift (pages) |
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484 | shl edx, 12 ; edx = MMIO shift (bytes) |
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485 | add eax, edx ; eax = uMMIO physical address |
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486 | or eax, PG_SHARED |
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487 | or eax, PG_UW |
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488 | or eax, PG_NOCACHE |
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489 | mov edi, ebx |
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490 | call commit_pages |
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491 | mov eax, edi |
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492 | ret |
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493 | |||
494 | ;*************************************************************************** |
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495 | ; Function |
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1370 | art_zh | 496 | ; pci_mmio_unmap_page |
1348 | art_zh | 497 | ; |
498 | ; Description |
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499 | ; unmaps the linear space previously tied to a PCI memory block |
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500 | ; |
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501 | ; IN: ebx = linear address of space previously allocated by pci_mmio_map |
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502 | ; returns eax = 1 if successfully unmapped |
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503 | ; |
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504 | ; Error codes |
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505 | ; eax = -1 if no user PCI access allowed, |
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506 | ; eax = 0 if unmapping failed |
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507 | ;*************************************************************************** |
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508 | |||
509 | pci_mmio_unmap: |
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510 | stdcall user_free, ebx |
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511 | ret |
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512 | |||
1354 | diamond | 513 | end if |
1348 | art_zh | 514 | |
586 | serge | 515 | ;-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= |
1375 | Lrz | 516 | uglobal |
517 | align 4 |
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586 | serge | 518 | ; VendID (2), DevID (2), Revision = 0 (1), Class Code (3), FNum (1), Bus (1) |
519 | pci_emu_dat: times 30*10 db 0 |
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1375 | Lrz | 520 | endg |
586 | serge | 521 | ;-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= |
522 | align 4 |
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523 | sys_pcibios: |
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594 | diamond | 524 | cmp [pci_access_enabled], 1 |
1348 | art_zh | 525 | jne .unsupported_func |
526 | cmp [pci_bios_entry], 0 |
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594 | diamond | 527 | jz .emulate_bios |
586 | serge | 528 | |
1348 | art_zh | 529 | push ds |
530 | mov ax, pci_data_sel |
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531 | mov ds, ax |
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532 | mov eax, ebp |
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533 | mov ah, 0B1h |
||
534 | call pword [cs:pci_bios_entry] |
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535 | pop ds |
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586 | serge | 536 | |
537 | jmp .return |
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538 | ;-=-=-=-=-=-=-=-= |
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539 | .emulate_bios: |
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540 | cmp ebp, 1 ; PCI_FUNCTION_ID |
||
541 | jnz .not_PCI_BIOS_PRESENT |
||
542 | mov edx, 'PCI ' |
||
1348 | art_zh | 543 | mov al, [OS_BASE+0x2F0000 + 0x9020] |
544 | mov bx, [OS_BASE+0x2F0000 + 0x9022] |
||
545 | mov cl, [OS_BASE+0x2F0000 + 0x9021] |
||
546 | xor ah, ah |
||
594 | diamond | 547 | jmp .return_abcd |
586 | serge | 548 | |
549 | .not_PCI_BIOS_PRESENT: |
||
550 | cmp ebp, 2 ; FIND_PCI_DEVICE |
||
551 | jne .not_FIND_PCI_DEVICE |
||
594 | diamond | 552 | mov ebx, pci_emu_dat |
553 | ..nxt: cmp [ebx], dx |
||
586 | serge | 554 | jne ..no |
594 | diamond | 555 | cmp [ebx + 2], cx |
586 | serge | 556 | jne ..no |
594 | diamond | 557 | dec si |
586 | serge | 558 | jns ..no |
594 | diamond | 559 | mov bx, [ebx + 4] |
1348 | art_zh | 560 | xor ah, ah |
594 | diamond | 561 | jmp .return_ab |
562 | ..no: cmp word[ebx], 0 |
||
586 | serge | 563 | je ..dev_not_found |
594 | diamond | 564 | add ebx, 10 |
586 | serge | 565 | jmp ..nxt |
566 | ..dev_not_found: |
||
567 | mov ah, 0x86 ; DEVICE_NOT_FOUND |
||
594 | diamond | 568 | jmp .return_a |
586 | serge | 569 | |
570 | .not_FIND_PCI_DEVICE: |
||
571 | cmp ebp, 3 ; FIND_PCI_CLASS_CODE |
||
572 | jne .not_FIND_PCI_CLASS_CODE |
||
573 | mov esi, pci_emu_dat |
||
594 | diamond | 574 | shl ecx, 8 |
1348 | art_zh | 575 | ..nxt2: cmp [esi], ecx |
586 | serge | 576 | jne ..no2 |
577 | mov bx, [esi] |
||
1348 | art_zh | 578 | xor ah, ah |
594 | diamond | 579 | jmp .return_ab |
586 | serge | 580 | ..no2: cmp dword[esi], 0 |
594 | diamond | 581 | je ..dev_not_found |
586 | serge | 582 | add esi, 10 |
583 | jmp ..nxt2 |
||
584 | |||
585 | .not_FIND_PCI_CLASS_CODE: |
||
586 | cmp ebp, 8 ; READ_CONFIG_* |
||
587 | jb .not_READ_CONFIG |
||
588 | cmp ebp, 0x0A |
||
589 | ja .not_READ_CONFIG |
||
1348 | art_zh | 590 | mov eax, ebp |
591 | mov ah, bh |
||
592 | mov edx, edi |
||
593 | mov bh, bl |
||
594 | mov bl, dl |
||
586 | serge | 595 | call pci_read_reg |
596 | mov ecx, eax |
||
597 | xor ah, ah ; SUCCESSFUL |
||
594 | diamond | 598 | jmp .return_abc |
586 | serge | 599 | .not_READ_CONFIG: |
600 | cmp ebp, 0x0B ; WRITE_CONFIG_* |
||
601 | jb .not_WRITE_CONFIG |
||
602 | cmp ebp, 0x0D |
||
603 | ja .not_WRITE_CONFIG |
||
1348 | art_zh | 604 | lea eax, [ebp+1] |
605 | mov ah, bh |
||
606 | mov edx, edi |
||
607 | mov bh, bl |
||
608 | mov bl, dl |
||
586 | serge | 609 | call pci_write_reg |
610 | xor ah, ah ; SUCCESSFUL |
||
594 | diamond | 611 | jmp .return_abc |
586 | serge | 612 | .not_WRITE_CONFIG: |
613 | .unsupported_func: |
||
614 | mov ah, 0x81 ; FUNC_NOT_SUPPORTED |
||
1375 | Lrz | 615 | .return:mov dword[esp + 4 ], edi |
616 | mov dword[esp + 8], esi |
||
594 | diamond | 617 | .return_abcd: |
1375 | Lrz | 618 | mov dword[esp + 24], edx |
594 | diamond | 619 | .return_abc: |
1375 | Lrz | 620 | mov dword[esp + 28], ecx |
594 | diamond | 621 | .return_ab: |
1375 | Lrz | 622 | mov dword[esp + 20], ebx |
594 | diamond | 623 | .return_a: |
1375 | Lrz | 624 | mov dword[esp + 32], eax |
586 | serge | 625 | ret |