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Rev | Author | Line No. | Line |
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9020 | rgimad | 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
2 | ;; ;; |
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3 | ;; Copyright (C) KolibriOS team 2004-2021. All rights reserved. ;; |
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4 | ;; Distributed under terms of the GNU General Public License ;; |
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5 | ;; ;; |
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6 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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7 | |||
8 | $Revision$ |
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9 | |||
10 | PCI_REG_STATUS_COMMAND = 0x0004 |
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11 | PCI_REG_BAR5 = 0x0024 |
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12 | |||
9023 | rgimad | 13 | ; bit_ prefix means that its index of bit |
14 | ; format: bit_AHCI_STR_REG_BIT |
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15 | bit_AHCI_HBA_CAP2_BOH = 0 ; Supports BIOS/OS Handoff |
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9020 | rgimad | 16 | |
9023 | rgimad | 17 | bit_AHCI_HBA_BOHC_BOS = 0 ; BIOS-Owned Semaphore (BIOS owns controller) |
18 | bit_AHCI_HBA_BOHC_OOS = 1 ; OS-Owned Semaphore (OS owns controller) |
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19 | bit_AHCI_HBA_BOHC_BB = 4 ; BIOS Busy (polling bit while BIOS cleans up |
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9020 | rgimad | 20 | |
9023 | rgimad | 21 | bit_AHCI_HBA_GHC_AHCI_ENABLE = 31 ; Enable AHCI mode |
22 | bit_AHCI_HBA_GHC_RESET = 0 ; Reset HBA |
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23 | bit_AHCI_HBA_GHC_INTERRUPT_ENABLE = 1 ; Enable interrupts from the HBA |
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24 | |||
9037 | rgimad | 25 | AHCI_HBA_PxSSTS_DET = 0xF |
26 | AHCI_HBA_PORT_IPM_ACTIVE = 1 |
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27 | AHCI_HBA_PxSSTS_DET_PRESENT = 3 |
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28 | |||
9023 | rgimad | 29 | AHCI_MAX_PORTS = 32 ; |
9020 | rgimad | 30 | HBA_MEMORY_SIZE = 0x1100 |
31 | |||
32 | struct AHCI_DATA |
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33 | abar dd ? ; pointer to HBA Memory (BAR5) mapped to virtual kernelspace memory |
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34 | pcidev dd ? ; pointer to corresponding PCIDEV structure |
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35 | ends |
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36 | |||
37 | ; Generic Host Control registers |
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38 | struct HBA_MEM |
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39 | capability dd ? ; 0x00 |
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40 | global_host_control dd ? ; 0x04 |
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41 | interrupt_status dd ? ; 0x08 |
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42 | port_implemented dd ? ; 0x0C |
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43 | version dd ? ; 0x10 |
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44 | ccc_ctl dd ? ; 0x14, Command completion coalescing control |
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45 | ccc_pts dd ? ; 0x18, Command completion coalescing ports |
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46 | em_loc dd ? ; 0x1C, Enclosure management location |
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47 | em_ctl dd ? ; 0x20, Enclosure management control |
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48 | capability2 dd ? ; 0x24, Host capabilities extended |
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49 | bohc dd ? ; 0x28, BIOS/OS handoff control and status |
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50 | reserved rb (0xA0-0x2C) ; 0x2C - 0x9F, Reserved |
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51 | vendor rb (0x100-0xA0) ; 0xA0 - 0xFF, Vendor specific |
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9023 | rgimad | 52 | ports rb (sizeof.HBA_PORT*AHCI_MAX_PORTS) ; 0x100 - 0x10FF, Port control registers, max AHCI_MAX_PORTS |
9020 | rgimad | 53 | ends |
54 | |||
55 | ; Port Control registers |
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56 | struct HBA_PORT |
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57 | command_list_base_l dd ? ; 0x00, command list base address, 1K-byte aligned |
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58 | command_list_base_h dd ? ; 0x04, command list base address upper 32 bits, used on 64 bit systems |
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59 | fis_base_l dd ? ; 0x08, FIS base address, 256-byte aligned |
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60 | fis_base_h dd ? ; 0x0C, FIS base address upper 32 bits, used on 64 bit systems |
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61 | interrupt_status dd ? ; 0x10 |
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62 | interrupt_enable dd ? ; 0x14 |
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63 | command dd ? ; 0x18, command and status |
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64 | reserved0 dd ? ; 0x1C |
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65 | task_file_data dd ? ; 0x20 |
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66 | signature dd ? ; 0x24 |
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67 | sata_status dd ? ; 0x28, SATA status (SCR0:SStatus) |
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68 | sata_control dd ? ; 0x2C, SATA control (SCR2:SControl) |
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69 | sata_error dd ? ; 0x30, SATA error (SCR1:SError) |
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70 | sata_active dd ? ; 0x34, SATA active (SCR3:SActive) |
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71 | command_issue dd ? ; 0x38 |
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72 | sata_notification dd ? ; 0x3C, SATA notification (SCR4:SNotification) |
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73 | fis_based_switch_control dd ? ; 0x40 |
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74 | reserved1 rd 11 ; 0x44 - 0x6F |
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75 | vendor rd 4 ; 0x70 - 0x7F, vendor specific |
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76 | ends |
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77 | |||
78 | uglobal |
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79 | align 4 |
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80 | ahci_controller AHCI_DATA |
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81 | endg |
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82 | |||
83 | |||
84 | ; detect ahci controller and initialize |
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85 | align 4 |
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86 | init_ahci: |
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87 | mov ecx, ahci_controller |
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88 | mov esi, pcidev_list |
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89 | .find_ahci_ctr: |
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90 | mov esi, [esi + PCIDEV.fd] |
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91 | cmp esi, pcidev_list |
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92 | jz .ahci_ctr_not_found |
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93 | mov eax, [esi + PCIDEV.class] |
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94 | ;DEBUGF 1, "K: device class = %x\n", eax |
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95 | shr eax, 8 ; shift right because lowest 8 bits if ProgIf field |
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96 | cmp eax, 0x0106 ; 0x01 - Mass Storage Controller class, 0x06 - Serial ATA Controller subclass |
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97 | jz .ahci_ctr_found |
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98 | jmp .find_ahci_ctr |
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99 | |||
100 | .ahci_ctr_not_found: |
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101 | DEBUGF 1, "K: AHCI controller not found\n" |
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102 | ret |
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103 | |||
104 | .ahci_ctr_found: |
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105 | mov [ahci_controller + AHCI_DATA.pcidev], esi |
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106 | |||
107 | mov eax, [esi+PCIDEV.class] |
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108 | movzx ebx, byte [esi+PCIDEV.bus] |
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109 | movzx ecx, byte [esi+PCIDEV.devfn] |
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110 | shr ecx, 3 ; get rid of 3 lowest bits (function code), the rest bits is device code |
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111 | movzx edx, byte [esi+PCIDEV.devfn] |
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112 | and edx, 00000111b ; get only 3 lowest bits (function code) |
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113 | DEBUGF 1, "K: found AHCI controller, (class, subcl, progif) = %x, bus = %x, device = %x, function = %x\n", eax, ebx, ecx, edx |
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114 | |||
9023 | rgimad | 115 | ; get BAR5 value, it is physical address |
9037 | rgimad | 116 | movzx ebx, [esi + PCIDEV.bus] |
117 | movzx ebp, [esi + PCIDEV.devfn] |
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118 | stdcall pci_read32, ebx, ebp, PCI_REG_BAR5 |
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119 | DEBUGF 1, "K: AHCI controller MMIO = %x\n", eax |
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120 | mov edi, eax |
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9020 | rgimad | 121 | |
9037 | rgimad | 122 | ; get the size of MMIO region |
123 | stdcall pci_write32, ebx, ebp, PCI_REG_BAR5, 0xFFFFFFFF |
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124 | stdcall pci_read32, ebx, ebp, PCI_REG_BAR5 |
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125 | not eax |
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126 | inc eax |
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127 | DEBUGF 1, "K: AHCI: MMIO region size = 0x%x bytes\n", eax |
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128 | |||
129 | ; Map MMIO region to virtual memory |
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130 | stdcall map_io_mem, edi, eax, PG_SWR + PG_NOCACHE |
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9020 | rgimad | 131 | mov [ahci_controller + AHCI_DATA.abar], eax |
132 | DEBUGF 1, "K: AHCI controller BAR5 mapped to virtual addr %x\n", eax |
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133 | |||
9037 | rgimad | 134 | ; Restore the original BAR5 value |
135 | stdcall pci_write32, ebx, ebp, PCI_REG_BAR5, edi |
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136 | |||
9023 | rgimad | 137 | ; Enable dma bus mastering, memory space access, clear the "disable interrupts" bit |
138 | ; Usually, it is already done before us |
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9024 | rgimad | 139 | movzx ebx, [esi + PCIDEV.bus] |
140 | movzx ebp, [esi + PCIDEV.devfn] |
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141 | stdcall pci_read32, ebx, ebp, PCI_REG_STATUS_COMMAND |
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9020 | rgimad | 142 | DEBUGF 1, "K: AHCI: pci_status_command = %x\nEnabling interrupts, DMA bus mastering and memory space access\n", eax |
143 | or eax, 0x06 ; pci.command |= 0x06 (dma bus mastering + memory space access) |
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144 | btr eax, 10 ; clear the "disable interrupts" bit |
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145 | DEBUGF 1, "K: AHCI: pci_status_command = %x\n", eax |
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9024 | rgimad | 146 | stdcall pci_write32, ebx, ebp, PCI_REG_STATUS_COMMAND, eax |
9020 | rgimad | 147 | |
9023 | rgimad | 148 | ; ; Print some register values to debug board |
149 | ; mov esi, [ahci_controller + AHCI_DATA.abar] |
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9024 | rgimad | 150 | ; DEBUGF 1, "K: AHCI: HBA.cap = %x, HBA.ghc = %x, HBA_MEM.version = %x\n", [esi + HBA_MEM.capability], [esi + HBA_MEM.global_host_control], [esi + HBA_MEM.version] |
9020 | rgimad | 151 | |
9023 | rgimad | 152 | ;------------------------------------------------------- |
153 | ; Request BIOS/OS ownership handoff, if supported. (TODO check correctness) |
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154 | mov esi, [ahci_controller + AHCI_DATA.abar] |
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155 | ;mov ebx, [esi + HBA_MEM.capability2] |
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156 | ;DEBUGF 1, "K: AHCI: HBA_MEM.cap2 = %x\n", ebx |
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9024 | rgimad | 157 | bt [esi + HBA_MEM.capability2], bit_AHCI_HBA_CAP2_BOH |
9020 | rgimad | 158 | jnc .end_handoff |
9023 | rgimad | 159 | DEBUGF 1, "K: AHCI: requesting AHCI ownership change...\n" |
9024 | rgimad | 160 | bts [esi + HBA_MEM.bohc], bit_AHCI_HBA_BOHC_OOS |
9020 | rgimad | 161 | |
162 | .wait_not_bos: |
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9024 | rgimad | 163 | bt [esi + HBA_MEM.bohc], bit_AHCI_HBA_BOHC_BOS |
9020 | rgimad | 164 | jc .wait_not_bos |
165 | |||
166 | mov ebx, 3 |
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167 | call delay_hs |
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168 | |||
9023 | rgimad | 169 | ; if Bios Busy is still set after 30 mS, wait 2 seconds. |
9024 | rgimad | 170 | bt [esi + HBA_MEM.bohc], bit_AHCI_HBA_BOHC_BB |
9020 | rgimad | 171 | jnc @f |
172 | |||
173 | mov ebx, 200 |
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174 | call delay_hs |
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175 | @@: |
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9023 | rgimad | 176 | DEBUGF 1, "K: AHCI: ownership change completed.\n" |
9020 | rgimad | 177 | |
178 | .end_handoff: |
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9023 | rgimad | 179 | ;------------------------------------------------------- |
9020 | rgimad | 180 | |
9023 | rgimad | 181 | ; enable the AHCI and reset it |
9024 | rgimad | 182 | bts [esi + HBA_MEM.global_host_control], bit_AHCI_HBA_GHC_AHCI_ENABLE |
183 | bts [esi + HBA_MEM.global_host_control], bit_AHCI_HBA_GHC_RESET |
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9020 | rgimad | 184 | |
9023 | rgimad | 185 | ; wait for reset to complete |
186 | .wait_reset: |
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9024 | rgimad | 187 | bt [esi + HBA_MEM.global_host_control], bit_AHCI_HBA_GHC_RESET |
9023 | rgimad | 188 | jc .wait_reset |
9020 | rgimad | 189 | |
9023 | rgimad | 190 | ; enable the AHCI and interrupts |
9024 | rgimad | 191 | bts [esi + HBA_MEM.global_host_control], bit_AHCI_HBA_GHC_AHCI_ENABLE |
192 | bts [esi + HBA_MEM.global_host_control], bit_AHCI_HBA_GHC_INTERRUPT_ENABLE |
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9023 | rgimad | 193 | mov ebx, 2 |
194 | call delay_hs |
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195 | |||
9037 | rgimad | 196 | DEBUGF 1, "K: AHCI: caps: %x %x, ver: %x, ghc: %x, pi: %x\n", [esi + HBA_MEM.capability], [esi + HBA_MEM.capability2], [esi + HBA_MEM.version], [esi + HBA_MEM.global_host_control], [esi + HBA_MEM.port_implemented] |
9020 | rgimad | 197 | |
9037 | rgimad | 198 | ; TODO: |
199 | ; calculate irq line |
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200 | ; ahciHBA->ghc |= AHCI_GHC_IE; |
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201 | ; IDT::RegisterInterruptHandler(irq, InterruptHandler); |
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202 | ; ahciHBA->is = 0xffffffff; |
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203 | |||
204 | xor ebx, ebx |
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205 | .detect_drives: |
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206 | cmp ebx, AHCI_MAX_PORTS |
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207 | jae .end_detect_drives |
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208 | |||
209 | ; if port with index ebx is not implemented then go to next |
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210 | mov ecx, [esi + HBA_MEM.port_implemented] |
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211 | bt ecx, ebx |
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212 | jnc .continue_detect_drives |
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213 | |||
214 | mov edi, ebx |
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215 | shl edi, BSF sizeof.HBA_PORT |
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216 | add edi, HBA_MEM.ports |
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217 | add edi, esi |
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218 | ; now edi - base of HBA_MEM.ports[ebx] |
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219 | |||
220 | DEBUGF 1, "K: AHCI: port %d, ssts = %x\n", ebx, [edi + HBA_PORT.sata_status] |
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221 | |||
222 | mov ecx, [edi + HBA_PORT.sata_status] |
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223 | shr ecx, 8 |
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224 | and ecx, 0x0F |
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225 | cmp ecx, AHCI_HBA_PORT_IPM_ACTIVE |
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226 | jne .continue_detect_drives |
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227 | |||
228 | mov ecx, [edi + HBA_PORT.sata_status] |
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229 | and ecx, AHCI_HBA_PxSSTS_DET |
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230 | cmp ecx, AHCI_HBA_PxSSTS_DET_PRESENT |
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231 | jne .continue_detect_drives |
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232 | |||
233 | DEBUGF 1, "K: AHCI: found drive at port %d, signature = %x\n", ebx, [edi + HBA_PORT.signature] |
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234 | |||
235 | .continue_detect_drives: |
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236 | inc ebx |
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237 | jmp .detect_drives |
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238 | |||
239 | ; TODO: why signatures of found disks are 0xFFFFFFFF ? |
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240 | |||
241 | .end_detect_drives: |
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242 | |||
243 | |||
9020 | rgimad | 244 | ret |
245 |