WebSVN – Kolibri OS – Blame – /kernel/branches/Kolibri-acpi/detect/init_ata.inc

Rev	Author	Line No.	Line
5201	serge	1	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
		2	;; ;;
5565	serge	3	;; Copyright (C) KolibriOS team 2014-2015. All rights reserved. ;;
5201	serge	4	;; Distributed under terms of the GNU General Public License ;;
		5	;; ;;
		6	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
		7
		8	$Revision: 5147 $
		9
		10
		11	;-----------------------------------------------------------------------------
		12	; find the IDE controller in the device list
		13	;-----------------------------------------------------------------------------
		14	mov ecx, IDE_controller_1
		15	mov esi, pcidev_list
		16	;--------------------------------------
		17	align 4
		18	.loop:
		19	mov esi, [esi+PCIDEV.fd]
		20	cmp esi, pcidev_list
		21	jz find_IDE_controller_done
		22
		23	mov eax, [esi+PCIDEV.class]
		24	; shr eax, 4
		25	; cmp eax, 0x01018
		26	shr eax, 7
		27	cmp eax, 0x010180 shr 7
		28	jnz .loop
		29	;--------------------------------------
		30	.found:
		31	mov eax, [esi+PCIDEV.class]
		32	DEBUGF 1, 'K : IDE controller programming interface %x\n', eax
		33	mov [ecx+IDE_DATA.ProgrammingInterface], eax
		34
		35	mov ah, [esi+PCIDEV.bus]
		36	mov al, 2
		37	mov bh, [esi+PCIDEV.devfn]
		38	;--------------------------------------
		39	mov dx, 0x1F0
		40	test byte [esi+PCIDEV.class], 1
		41	jz @f
		42	mov bl, 0x10
		43	push eax
		44	call pci_read_reg
		45	and eax, 0xFFFC
		46	mov edx, eax
		47	pop eax
		48	@@:
		49	DEBUGF 1, 'K : BAR0 IDE base addr %x\n', dx
		50	mov [StandardATABases], dx
		51	mov [ecx+IDE_DATA.BAR0_val], dx
		52	;--------------------------------------
		53	mov dx, 0x3F4
		54	test byte [esi+PCIDEV.class], 1
		55	jz @f
		56	mov bl, 0x14
		57	push eax
		58	call pci_read_reg
		59	and eax, 0xFFFC
		60	mov edx, eax
		61	pop eax
		62	@@:
		63	DEBUGF 1, 'K : BAR1 IDE base addr %x\n', dx
		64	mov [ecx+IDE_DATA.BAR1_val], dx
		65	;--------------------------------------
		66	mov dx, 0x170
		67	test byte [esi+PCIDEV.class], 4
		68	jz @f
		69	mov bl, 0x18
		70	push eax
		71	call pci_read_reg
		72	and eax, 0xFFFC
		73	mov edx, eax
		74	pop eax
		75	@@:
		76	DEBUGF 1, 'K : BAR2 IDE base addr %x\n', dx
		77	mov [StandardATABases+2], dx
		78	mov [ecx+IDE_DATA.BAR2_val], dx
		79	;--------------------------------------
		80	mov dx, 0x374
		81	test byte [esi+PCIDEV.class], 4
		82	jz @f
		83	mov bl, 0x1C
		84	push eax
		85	call pci_read_reg
		86	and eax, 0xFFFC
		87	mov edx, eax
		88	pop eax
		89	@@:
		90	DEBUGF 1, 'K : BAR3 IDE base addr %x\n', dx
		91	mov [ecx+IDE_DATA.BAR3_val], dx
		92	;--------------------------------------
		93	mov bl, 0x20
		94	push eax
		95	call pci_read_reg
		96	and eax, 0xFFFC
		97	DEBUGF 1, 'K : BAR4 IDE controller register base addr %x\n', ax
		98	mov [ecx+IDE_DATA.RegsBaseAddres], ax
		99	pop eax
		100	;--------------------------------------
		101	mov bl, 0x3C
		102	push eax
		103	call pci_read_reg
		104	and eax, 0xFF
		105	DEBUGF 1, 'K : IDE Interrupt %x\n', al
		106	mov [ecx+IDE_DATA.Interrupt], ax
		107	pop eax
		108
		109	add ecx, sizeof.IDE_DATA
		110	;--------------------------------------
		111	jmp .loop
		112	;-----------------------------------------------------------------------------
		113	uglobal
		114	align 4
		115	;--------------------------------------
		116	IDE_controller_pointer dd ?
		117	;--------------------------------------
		118	IDE_controller_1 IDE_DATA
		119	IDE_controller_2 IDE_DATA
		120	IDE_controller_3 IDE_DATA
		121	;--------------------------------------
		122	cache_ide0 IDE_CACHE
		123	cache_ide1 IDE_CACHE
		124	cache_ide2 IDE_CACHE
		125	cache_ide3 IDE_CACHE
		126	cache_ide4 IDE_CACHE
		127	cache_ide5 IDE_CACHE
		128	cache_ide6 IDE_CACHE
		129	cache_ide7 IDE_CACHE
		130	cache_ide8 IDE_CACHE
		131	cache_ide9 IDE_CACHE
		132	cache_ide10 IDE_CACHE
		133	cache_ide11 IDE_CACHE
		134	;--------------------------------------
		135	IDE_device_1 rd 2
		136	IDE_device_2 rd 2
		137	IDE_device_3 rd 2
		138	;--------------------------------------
		139	endg
		140	;-----------------------------------------------------------------------------
		141	; START of initialisation IDE ATA code
		142	;-----------------------------------------------------------------------------
		143	Init_IDE_ATA_controller:
		144	cmp [ecx+IDE_DATA.ProgrammingInterface], 0
		145	jne @f
		146
		147	ret
		148	;--------------------------------------
		149	@@:
		150	mov esi, boot_disabling_ide
		151	call boot_log
		152	;--------------------------------------
		153	; Disable IDE interrupts, because the search
		154	; for IDE partitions is in the PIO mode.
		155	;--------------------------------------
		156	.disable_IDE_interrupt:
		157	; Disable interrupts in IDE controller for PIO
		158	mov al, 2
		159	mov dx, [ecx+IDE_DATA.BAR1_val] ;0x3F4
		160	add dx, 2 ;0x3F6
		161	out dx, al
		162	mov dx, [ecx+IDE_DATA.BAR3_val] ;0x374
		163	add dx, 2 ;0x376
		164	out dx, al
		165	;-----------------------------------------------------------------------------
		166	; set current ata bases
		167	@@:
		168	mov ax, [ecx+IDE_DATA.BAR0_val]
		169	mov [StandardATABases], ax
		170	mov ax, [ecx+IDE_DATA.BAR2_val]
		171	mov [StandardATABases+2], ax
		172
		173	mov esi, boot_detecthdcd
		174	call boot_log
		175	;--------------------------------------
		176	include 'dev_hdcd.inc'
		177	;--------------------------------------
		178	ret
		179	;-----------------------------------------------------------------------------
		180	Init_IDE_ATA_controller_2:
		181	cmp [ecx+IDE_DATA.ProgrammingInterface], 0
		182	jne @f
		183
		184	ret
		185	;--------------------------------------
		186	@@:
		187	mov dx, [ecx+IDE_DATA.RegsBaseAddres]
		188	; test whether it is our interrupt?
		189	add dx, 2
		190	in al, dx
		191	test al, 100b
		192	jz @f
		193	; clear Bus Master IDE Status register
		194	; clear Interrupt bit
		195	out dx, al
		196	;--------------------------------------
		197	@@:
		198	add dx, 8
		199	; test whether it is our interrupt?
		200	in al, dx
		201	test al, 100b
		202	jz @f
		203	; clear Bus Master IDE Status register
		204	; clear Interrupt bit
		205	out dx, al
		206	;--------------------------------------
		207	@@:
		208	; read status register and remove the interrupt request
		209	mov dx, [ecx+IDE_DATA.BAR0_val] ;0x1F0
		210	add dx, 0x7 ;0x1F7
		211	in al, dx
		212	mov dx, [ecx+IDE_DATA.BAR2_val] ;0x170
		213	add dx, 0x7 ;0x177
		214	in al, dx
		215	;-----------------------------------------------------------------------------
		216	; push eax edx
		217	; mov dx, [ecx+IDE_DATA.RegsBaseAddres]
		218	; xor eax, eax
		219	; add dx, 2
		220	; in al, dx
		221	; DEBUGF 1, "K : Primary Bus Master IDE Status Register %x\n", eax
		222
		223	; add dx, 8
		224	; in al, dx
		225	; DEBUGF 1, "K : Secondary Bus Master IDE Status Register %x\n", eax
		226	; pop edx eax
		227
		228	; cmp [ecx+IDE_DATA.RegsBaseAddres], 0
		229	; setnz [ecx+IDE_DATA.dma_hdd]
		230	;-----------------------------------------------------------------------------
		231	; set interrupts for IDE Controller
		232	;-----------------------------------------------------------------------------
		233	pushfd
		234	cli
		235	.enable_IDE_interrupt:
		236	mov esi, boot_enabling_ide
		237	call boot_log
		238	; Enable interrupts in IDE controller for DMA
		239	xor ebx, ebx
		240	cmp ecx, IDE_controller_2
		241	jne @f
		242
		243	add ebx, 5
		244	jmp .check_DRIVE_DATA
		245	;--------------------------------------
		246	@@:
		247	cmp ecx, IDE_controller_3
		248	jne .check_DRIVE_DATA
		249
		250	add ebx, 10
		251	;--------------------------------------
		252	.check_DRIVE_DATA:
		253	mov al, 0
		254	mov ah, [ebx+DRIVE_DATA+1]
		255	test ah, 10100000b ; check for ATAPI devices
		256	jz @f
		257	;--------------------------------------
		258	.ch1_pio_set_ATAPI:
		259	DEBUGF 1, "K : IDE CH1 PIO, because ATAPI drive present\n"
		260	jmp .ch1_pio_set_for_all
		261	;--------------------------------------
		262	.ch1_pio_set_no_devices:
		263	DEBUGF 1, "K : IDE CH1 PIO because no devices\n"
		264	jmp .ch1_pio_set_for_all
		265	;-------------------------------------
		266	.ch1_pio_set:
		267	DEBUGF 1, "K : IDE CH1 PIO because device not support UDMA\n"
		268	;-------------------------------------
		269	.ch1_pio_set_for_all:
		270	mov [ecx+IDE_DATA.dma_hdd_channel_1], al
		271	jmp .ch2_check
		272	;--------------------------------------
		273	@@:
		274	xor ebx, ebx
		275	call calculate_IDE_device_values_storage
		276
		277	test ah, 1010000b
		278	jz .ch1_pio_set_no_devices
		279
		280	test ah, 1000000b
		281	jz @f
		282
		283	cmp [ebx+IDE_DEVICE.UDMA_possible_modes], al
		284	je .ch1_pio_set
		285
		286	cmp [ebx+IDE_DEVICE.UDMA_set_mode], al
		287	je .ch1_pio_set
		288	;--------------------------------------
		289	@@:
		290	test ah, 10000b
		291	jz @f
		292
		293	add ebx, 2
		294
		295	cmp [ebx+IDE_DEVICE.UDMA_possible_modes], al
		296	je .ch1_pio_set
		297
		298	cmp [ebx+IDE_DEVICE.UDMA_set_mode], al
		299	je .ch1_pio_set
		300	;--------------------------------------
		301	@@:
		302	mov dx, [ecx+IDE_DATA.BAR1_val] ;0x3F4
		303	add dx, 2 ;0x3F6
		304	out dx, al
		305	DEBUGF 1, "K : IDE CH1 DMA enabled\n"
		306	mov [ecx+IDE_DATA.dma_hdd_channel_1], byte 1
		307	;--------------------------------------
		308	.ch2_check:
		309	test ah, 1010b ; check for ATAPI devices
		310	jz @f
		311	;--------------------------------------
		312	.ch2_pio_set_ATAPI:
		313	DEBUGF 1, "K : IDE CH2 PIO, because ATAPI drive present\n"
		314	jmp .ch2_pio_set_for_all
		315	;--------------------------------------
		316	.ch2_pio_set_no_devices:
		317	DEBUGF 1, "K : IDE CH2 PIO because no devices\n"
		318	jmp .ch2_pio_set_for_all
		319	;--------------------------------------
		320	.ch2_pio_set:
		321	DEBUGF 1, "K : IDE CH2 PIO because device not support UDMA\n"
		322	;--------------------------------------
		323	.ch2_pio_set_for_all:
		324	mov [ecx+IDE_DATA.dma_hdd_channel_2], al
		325	jmp .set_interrupts_for_IDE_controllers
		326	;--------------------------------------
		327	@@:
		328	mov ebx, 4
		329	call calculate_IDE_device_values_storage
		330
		331	test ah, 101b
		332	jz .ch2_pio_set_no_devices
		333
		334	test ah, 100b
		335	jz @f
		336
		337	cmp [ebx+IDE_DEVICE.UDMA_possible_modes], al
		338	je .ch2_pio_set
		339
		340	cmp [ebx+IDE_DEVICE.UDMA_set_mode], al
		341	je .ch2_pio_set
		342	;--------------------------------------
		343	@@:
		344	test ah, 1b
		345	jz @f
		346
		347	add ebx, 2
		348
		349	cmp [ebx+IDE_DEVICE.UDMA_possible_modes], al
		350	je .ch2_pio_set
		351
		352	cmp [ebx+IDE_DEVICE.UDMA_set_mode], al
		353	je .ch2_pio_set
		354	;--------------------------------------
		355	@@:
		356	mov dx, [ecx+IDE_DATA.BAR3_val] ;0x374
		357	add dx, 2 ;0x376
		358	out dx, al
		359	DEBUGF 1, "K : IDE CH2 DMA enabled\n"
		360	mov [ecx+IDE_DATA.dma_hdd_channel_2], byte 1
		361	;--------------------------------------
		362	.set_interrupts_for_IDE_controllers:
		363	mov esi, boot_set_int_IDE
		364	call boot_log
		365	;--------------------------------------
		366	mov eax, [ecx+IDE_DATA.ProgrammingInterface]
		367	; cmp ax, 0x0180
		368	; je .pata_ide
		369
		370	; cmp ax, 0x018a
		371	; jne .sata_ide
		372
		373	test al, 1 ; 0 - legacy PCI mode, 1 - native PCI mode
		374	jnz .sata_ide
		375	;--------------------------------------
		376	.pata_ide:
		377	cmp [ecx+IDE_DATA.RegsBaseAddres], 0
		378	je .end_set_interrupts
		379
		380	push ecx
6078	serge	381	stdcall attach_int_handler, 14, IDE_irq_14_handler, ecx
		382	pop ecx
5201	serge	383	DEBUGF 1, "K : Set IDE IRQ14 return code %x\n", eax
6078	serge	384	push ecx
		385	stdcall attach_int_handler, 15, IDE_irq_15_handler, ecx
5201	serge	386	DEBUGF 1, "K : Set IDE IRQ15 return code %x\n", eax
		387	pop ecx
		388
		389	jmp .end_set_interrupts
		390	;--------------------------------------
		391	.sata_ide:
		392	; cmp ax, 0x0185
		393	; je .sata_ide_1
		394
		395	; cmp ax, 0x018f
		396	; jne .end_set_interrupts
		397	;--------------------------------------
		398	;.sata_ide_1:
		399	; Some weird controllers generate an interrupt even if IDE interrupts
		400	; are disabled and no IDE devices. For example, notebook ASUS K72F -
		401	; IDE controller 010185 generates false interrupt when we work with
		402	; the IDE controller 01018f. For this reason, the interrupt handler
		403	; does not need to be installed if both channel IDE controller
		404	; running in PIO mode.
6078	serge	405
		406	; ...unfortunately, PCI interrupt can be shared with other devices
		407	; which could enable it without consulting IDE code.
		408	; So install the handler anyways and try to process
		409	; even those interrupts which we are not expecting.
5201	serge	410	cmp [ecx+IDE_DATA.RegsBaseAddres], 0
		411	je .end_set_interrupts
		412
		413	mov ax, [ecx+IDE_DATA.Interrupt]
		414	movzx eax, al
		415	push ecx
6078	serge	416	stdcall attach_int_handler, eax, IDE_common_irq_handler, ecx
5201	serge	417	pop ecx
		418	DEBUGF 1, "K : Set IDE IRQ%d return code %x\n", [ecx+IDE_DATA.Interrupt]:1, eax
		419	;--------------------------------------
		420	.end_set_interrupts:
		421	popfd
		422	ret
		423	;-----------------------------------------------------------------------------
		424	; END of initialisation IDE ATA code
		425	;-----------------------------------------------------------------------------
		426	find_IDE_controller_done:
		427	mov ecx, IDE_controller_1
		428	mov [IDE_controller_pointer], ecx
		429	call Init_IDE_ATA_controller
		430	mov ecx, IDE_controller_2
		431	mov [IDE_controller_pointer], ecx
		432	call Init_IDE_ATA_controller
		433	mov ecx, IDE_controller_3
		434	mov [IDE_controller_pointer], ecx
		435	call Init_IDE_ATA_controller
		436	;-----------------------------------------------------------------------------
		437	mov esi, boot_getcache
		438	call boot_log
		439	include 'getcache.inc'
		440	;-----------------------------------------------------------------------------
		441	mov esi, boot_detectpart
		442	call boot_log
		443	include 'sear_par.inc'
		444	;-----------------------------------------------------------------------------
		445	mov esi, boot_init_sys
		446	call boot_log
		447	call Parser_params
		448
		449	if ~ defined extended_primary_loader
		450	; ramdisk image should be loaded by extended primary loader if it exists
		451	; READ RAMDISK IMAGE FROM HD
		452	include '../boot/rdload.inc'
		453	end if
		454	;-----------------------------------------------------------------------------
		455	mov ecx, IDE_controller_1
		456	mov [IDE_controller_pointer], ecx
		457	call Init_IDE_ATA_controller_2
		458	mov ecx, IDE_controller_2
		459	mov [IDE_controller_pointer], ecx
		460	call Init_IDE_ATA_controller_2
		461	mov ecx, IDE_controller_3
		462	mov [IDE_controller_pointer], ecx
		463	call Init_IDE_ATA_controller_2
		464	;-----------------------------------------------------------------------------

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(root)/kernel/branches/Kolibri-acpi/detect/init_ata.inc – Rev 6078