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3769 | Serge | 1 | /* |
2 | * All Video Processing kernels |
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3 | * Copyright © <2010>, Intel Corporation. |
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4 | * |
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5 | * This program is licensed under the terms and conditions of the |
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6 | * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at |
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7 | * http://www.opensource.org/licenses/eclipse-1.0.php. |
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8 | * |
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9 | */ |
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10 | |||
11 | // Module name: DI.inc |
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12 | |||
13 | #ifdef GT |
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14 | // GT DI Kernel |
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15 | #else // ILK |
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16 | // ILK DI Kernel |
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17 | #endif |
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18 | |||
19 | #include "undefall.inc" |
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20 | |||
21 | //--------------------------------------------------------------------------- |
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22 | // Message descriptors |
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23 | //--------------------------------------------------------------------------- |
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24 | // Extended message descriptor |
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25 | // Message descriptor for sampler read |
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26 | // // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) |
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27 | // // 1 (header present 1) 0 11 (SIMD32/64 mode) |
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28 | // // 1000 (message type) 0000 (DI state index) |
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29 | // // 00000000 (binding table index - set later) |
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30 | // // = 0x040b8000 |
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31 | #define nSMPL_DI_MSGDSC 0x040b8000 |
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32 | |||
33 | #define nSMPL_RESP_LEN_DNDI nRESLEN_12 // 12 - for DN + DI Alg |
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34 | #define nSMPL_RESP_LEN_DN_PL nRESLEN_5 // 5 - for DN Planar Alg |
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35 | #define nSMPL_RESP_LEN_DN_PA nRESLEN_9 // 9 - for DN Packed Alg |
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36 | #define nSMPL_RESP_LEN_DI nRESLEN_9 // 9 - for DI Only Alg |
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37 | #define nSMPL_RESP_LEN_PDI nRESLEN_11 // 11 - for Partial DI Alg |
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38 | |||
39 | // Attention: The Message Length is The Number of GRFs with Data Only, without the Header |
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40 | #define nDPMW_MSG_LEN_STMM nMSGLEN_1 // 1 - For STMM Save |
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41 | #define nDPMW_MSG_LEN_HIST nMSGLEN_1 // 1 - For Denoise History Save |
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42 | #define nDPMW_MSG_LEN_PA_DN_DI nMSGLEN_4 // 4 - For DN Curr Save |
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43 | #define nDPMW_MSG_LEN_PA_DN_NODI nMSGLEN_8 // 8 - For DN Curr Save (denoise only - DI disabled) |
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44 | #define nDPMW_MSG_LEN_PL_DN_DI nMSGLEN_2 // 2 - For DN Curr Save |
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45 | #define nDPMW_MSG_LEN_PL_DN_NODI nMSGLEN_4 // 4 - For DN Curr Save (denoise only - DI disabled) |
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46 | |||
47 | #define nDPW_BLOCK_SIZE_STMM nBLOCK_WIDTH_8+nBLOCK_HEIGHT_4 // Y block size 8x4 |
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48 | |||
49 | #undef nDPW_BLOCK_SIZE_DI |
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50 | #undef nDPW_MSG_SIZE_DI |
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51 | #define nDPW_BLOCK_SIZE_DI nBLOCK_WIDTH_32+nBLOCK_HEIGHT_4 |
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52 | #define nDPW_MSG_SIZE_DI nMSGLEN_4 |
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53 | |||
54 | |||
55 | //--------------------------------------------------------------------------- |
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56 | // Kernel GRF variables |
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57 | //--------------------------------------------------------------------------- |
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58 | // Defines for DI enabled |
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59 | #define nDI_PREV_FRAME_LUMA_OFFSET 0 |
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60 | #define nDI_PREV_FRAME_CHROMA_OFFSET 2 |
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61 | #define nDI_CURR_FRAME_LUMA_OFFSET 4 |
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62 | #define nDI_CURR_FRAME_CHROMA_OFFSET 6 |
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63 | #define nDI_STMM_OFFSET 8 |
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64 | #define nDI_HIST_OFFSET 9 |
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65 | #define nDI_CURR_2ND_FIELD_LUMA_OFFSET 10 |
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66 | #define nDI_CURR_2ND_FIELD_CHROMA_OFFSET 11 |
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67 | |||
68 | // Defines for DI disabled |
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69 | #define nNODI_LUMA_OFFSET 0 |
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70 | #define nNODI_HIST_OFFSET 4 |
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71 | #define nNODI_CHROMA_OFFSET 5 |
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72 | |||
73 | #ifdef DI_ENABLE |
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74 | #define nHIST_OFFSET nDI_HIST_OFFSET |
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75 | #undef nY_NUM_OF_ROWS |
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76 | #define nY_NUM_OF_ROWS 8 // Number of Y rows per block (4 rows for each frame) |
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77 | #undef nUV_NUM_OF_ROWS |
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78 | #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block |
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79 | |||
80 | #endif |
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81 | |||
82 | #ifdef DI_DISABLE |
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83 | #define nHIST_OFFSET nNODI_HIST_OFFSET |
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84 | #endif |
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85 | |||
86 | #if (nSRC_REGION==nREGION_2) |
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87 | #define ub2SRC_Y ub2BOT_Y |
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88 | #define ub2SRC_U ub2BOT_U |
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89 | #define ub2SRC_V ub2BOT_V |
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90 | #define uwDEST_Y uwBOT_Y |
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91 | #define uwDEST_U uwBOT_U |
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92 | #define uwDEST_V uwBOT_V |
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93 | #define nDEST_YUV_REG nTOP_Y |
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94 | #define udDEST_YUV udTOP_Y_IO |
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95 | |||
96 | #define nRESP nTEMP0 // DI return message requires 12 GRFs |
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97 | #define nDN_YUV nTOP_Y // Space for Packing DN for next run requires 8 GRFs |
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98 | |||
99 | #undef nSRC_REGION |
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100 | #define nSRC_REGION nREGION_2 |
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101 | |||
102 | #else |
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103 | #define ub2SRC_Y ub2TOP_Y |
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104 | #define ub2SRC_U ub2TOP_U |
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105 | #define ub2SRC_V ub2TOP_V |
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106 | #define uwDEST_Y uwTOP_Y |
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107 | #define uwDEST_U uwTOP_U |
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108 | #define uwDEST_V uwTOP_V |
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109 | #define nDEST_YUV_REG nBOT_Y |
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110 | #define udDEST_YUV udBOT_Y_IO |
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111 | #define nRESP nTEMP0 // DI return message requires 12 GRFs |
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112 | #define nDN_YUV nBOT_Y // Space for Packing DN for next run requires 8 GRFs |
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113 | |||
114 | #undef nSRC_REGION |
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115 | #define nSRC_REGION nREGION_1 // REGION_1 will be the source region for first kernel |
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116 | |||
117 | #endif |
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118 | |||
119 | |||
120 | |||
121 | |||
122 | |||
123 | |||
124 | |||
125 | |||
126 | |||
127 | // Message response (Denoised & DI-ed pixels & statistics) |
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128 | .declare udRESP Base=REG(r,nRESP) ElementSize=4 SrcRegion=REGION(8,1) DstRegion=<1> Type=ud |
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129 | .declare ubRESP Base=REG(r,nRESP) ElementSize=1 SrcRegion=REGION(16,1) DstRegion=<1> Type=ub |
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130 | |||
131 | // For Denoised Curr Output (Used as Priv in Next Run) |
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132 | .declare ubDN_YUV Base=REG(r,nDN_YUV) ElementSize=1 Type=ub |
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133 | .declare udDN_YUV Base=REG(r,nDN_YUV) ElementSize=4 Type=ud |
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134 | #define npDN_YUV nDN_YUV*nGRFWIB |
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135 | |||
136 | // For DI Process Output (1st and 2nd Frames Output) |
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137 | //.declare udDI_YUV_PRIV Base=REG(r,nTEMP0) ElementSize=4 Type=ud // Previous frame DI output |
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138 | //.declare udDI_YUV_CURR Base=REG(r,nTEMP0) ElementSize=4 Type=ud // Current frame DI output |
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139 | //#define npDI_YUV nTEMP0*nGRFWIB |
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140 | |||
141 | //--------------------------------------------------------------------------- |
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142 | // Kernel MRF variables |
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143 | //--------------------------------------------------------------------------- |
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144 | #define mMSG_SMPL m1 // Sampler Command is in: m1~m2 |
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145 | .declare mudMSG_SMPL Base=mMSG_SMPL ElementSize=4 Type=ud |
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146 | .declare muwMSG_SMPL Base=mMSG_SMPL ElementSize=2 Type=uw |
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147 | |||
148 | #define mMSGHDR_DN m1 // Denoise Output: m1~m9 for PA, m3~m5 for PL |
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149 | .declare mudMSGHDR_DN Base=mMSGHDR_DN ElementSize=4 Type=ud |
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150 | .declare mubMSGHDR_DN Base=mMSGHDR_DN ElementSize=1 Type=ub |
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151 | |||
152 | #define mMSGHDR_STMM m11 // STMM Output: m11~m12 |
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153 | .declare mudMSGHDR_STMM Base=mMSGHDR_STMM ElementSize=4 Type=ud |
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154 | #define mMSGHDR_HIST m13 // HIST Output: m13~m14 |
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155 | .declare mudMSGHDR_HIST Base=mMSGHDR_HIST ElementSize=1 Type=ud |
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156 | |||
157 | #define mMSGHDR_DI_1ST m1 // DI output: m1~m5 |
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158 | .declare mudMSGHDR_DI_1ST Base=mMSGHDR_DI_1ST ElementSize=4 Type=ud |
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159 | #define mMSGHDR_DI_2ND m6 // DI output: m6~m10 |
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160 | .declare mudMSGHDR_DI_2ND Base=mMSGHDR_DI_2ND ElementSize=4 Type=ud |
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161 | |||
162 | // end of DNDI.inc1>1>2010> |