WebSVN – Kolibri OS – Blame – /drivers/video/drm/vmwgfx/svga3d_reg.h

Rev	Author	Line No.	Line
4075	Serge	1	/**********************************************************
		2	* Copyright 1998-2009 VMware, Inc. All rights reserved.
		3	*
		4	* Permission is hereby granted, free of charge, to any person
		5	* obtaining a copy of this software and associated documentation
		6	* files (the "Software"), to deal in the Software without
		7	* restriction, including without limitation the rights to use, copy,
		8	* modify, merge, publish, distribute, sublicense, and/or sell copies
		9	* of the Software, and to permit persons to whom the Software is
		10	* furnished to do so, subject to the following conditions:
		11	*
		12	* The above copyright notice and this permission notice shall be
		13	* included in all copies or substantial portions of the Software.
		14	*
		15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
		16	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
		17	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
		18	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
		19	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
		20	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
		21	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
		22	* SOFTWARE.
		23	*
		24	**********************************************************/
		25
		26	/*
		27	* svga3d_reg.h --
		28	*
		29	* SVGA 3D hardware definitions
		30	*/
		31
		32	#ifndef _SVGA3D_REG_H_
		33	#define _SVGA3D_REG_H_
		34
		35	#include "svga_reg.h"
		36
		37
		38	/*
		39	* 3D Hardware Version
		40	*
		41	* The hardware version is stored in the SVGA_FIFO_3D_HWVERSION fifo
		42	* register. Is set by the host and read by the guest. This lets
		43	* us make new guest drivers which are backwards-compatible with old
		44	* SVGA hardware revisions. It does not let us support old guest
		45	* drivers. Good enough for now.
		46	*
		47	*/
		48
		49	#define SVGA3D_MAKE_HWVERSION(major, minor) (((major) << 16) \| ((minor) & 0xFF))
		50	#define SVGA3D_MAJOR_HWVERSION(version) ((version) >> 16)
		51	#define SVGA3D_MINOR_HWVERSION(version) ((version) & 0xFF)
		52
		53	typedef enum {
		54	SVGA3D_HWVERSION_WS5_RC1 = SVGA3D_MAKE_HWVERSION(0, 1),
		55	SVGA3D_HWVERSION_WS5_RC2 = SVGA3D_MAKE_HWVERSION(0, 2),
		56	SVGA3D_HWVERSION_WS51_RC1 = SVGA3D_MAKE_HWVERSION(0, 3),
		57	SVGA3D_HWVERSION_WS6_B1 = SVGA3D_MAKE_HWVERSION(1, 1),
		58	SVGA3D_HWVERSION_FUSION_11 = SVGA3D_MAKE_HWVERSION(1, 4),
		59	SVGA3D_HWVERSION_WS65_B1 = SVGA3D_MAKE_HWVERSION(2, 0),
		60	SVGA3D_HWVERSION_WS8_B1 = SVGA3D_MAKE_HWVERSION(2, 1),
		61	SVGA3D_HWVERSION_CURRENT = SVGA3D_HWVERSION_WS8_B1,
		62	} SVGA3dHardwareVersion;
		63
		64	/*
		65	* Generic Types
		66	*/
		67
		68	typedef uint32 SVGA3dBool; /* 32-bit Bool definition */
		69	#define SVGA3D_NUM_CLIPPLANES 6
		70	#define SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS 8
		71	#define SVGA3D_MAX_CONTEXT_IDS 256
		72	#define SVGA3D_MAX_SURFACE_IDS (32 * 1024)
		73
		74	/*
		75	* Surface formats.
		76	*
		77	* If you modify this list, be sure to keep GLUtil.c in sync. It
		78	* includes the internal format definition of each surface in
		79	* GLUtil_ConvertSurfaceFormat, and it contains a table of
		80	* human-readable names in GLUtil_GetFormatName.
		81	*/
		82
		83	typedef enum SVGA3dSurfaceFormat {
		84	SVGA3D_FORMAT_INVALID = 0,
		85
		86	SVGA3D_X8R8G8B8 = 1,
		87	SVGA3D_A8R8G8B8 = 2,
		88
		89	SVGA3D_R5G6B5 = 3,
		90	SVGA3D_X1R5G5B5 = 4,
		91	SVGA3D_A1R5G5B5 = 5,
		92	SVGA3D_A4R4G4B4 = 6,
		93
		94	SVGA3D_Z_D32 = 7,
		95	SVGA3D_Z_D16 = 8,
		96	SVGA3D_Z_D24S8 = 9,
		97	SVGA3D_Z_D15S1 = 10,
		98
		99	SVGA3D_LUMINANCE8 = 11,
		100	SVGA3D_LUMINANCE4_ALPHA4 = 12,
		101	SVGA3D_LUMINANCE16 = 13,
		102	SVGA3D_LUMINANCE8_ALPHA8 = 14,
		103
		104	SVGA3D_DXT1 = 15,
		105	SVGA3D_DXT2 = 16,
		106	SVGA3D_DXT3 = 17,
		107	SVGA3D_DXT4 = 18,
		108	SVGA3D_DXT5 = 19,
		109
		110	SVGA3D_BUMPU8V8 = 20,
		111	SVGA3D_BUMPL6V5U5 = 21,
		112	SVGA3D_BUMPX8L8V8U8 = 22,
		113	SVGA3D_BUMPL8V8U8 = 23,
		114
		115	SVGA3D_ARGB_S10E5 = 24, /* 16-bit floating-point ARGB */
		116	SVGA3D_ARGB_S23E8 = 25, /* 32-bit floating-point ARGB */
		117
		118	SVGA3D_A2R10G10B10 = 26,
		119
		120	/* signed formats */
		121	SVGA3D_V8U8 = 27,
		122	SVGA3D_Q8W8V8U8 = 28,
		123	SVGA3D_CxV8U8 = 29,
		124
		125	/* mixed formats */
		126	SVGA3D_X8L8V8U8 = 30,
		127	SVGA3D_A2W10V10U10 = 31,
		128
		129	SVGA3D_ALPHA8 = 32,
		130
		131	/* Single- and dual-component floating point formats */
		132	SVGA3D_R_S10E5 = 33,
		133	SVGA3D_R_S23E8 = 34,
		134	SVGA3D_RG_S10E5 = 35,
		135	SVGA3D_RG_S23E8 = 36,
		136
		137	/*
		138	* Any surface can be used as a buffer object, but SVGA3D_BUFFER is
		139	* the most efficient format to use when creating new surfaces
		140	* expressly for index or vertex data.
		141	*/
		142
		143	SVGA3D_BUFFER = 37,
		144
		145	SVGA3D_Z_D24X8 = 38,
		146
		147	SVGA3D_V16U16 = 39,
		148
		149	SVGA3D_G16R16 = 40,
		150	SVGA3D_A16B16G16R16 = 41,
		151
		152	/* Packed Video formats */
		153	SVGA3D_UYVY = 42,
		154	SVGA3D_YUY2 = 43,
		155
		156	/* Planar video formats */
		157	SVGA3D_NV12 = 44,
		158
		159	/* Video format with alpha */
		160	SVGA3D_AYUV = 45,
		161
		162	SVGA3D_BC4_UNORM = 108,
		163	SVGA3D_BC5_UNORM = 111,
		164
		165	/* Advanced D3D9 depth formats. */
		166	SVGA3D_Z_DF16 = 118,
		167	SVGA3D_Z_DF24 = 119,
		168	SVGA3D_Z_D24S8_INT = 120,
		169
		170	SVGA3D_FORMAT_MAX
		171	} SVGA3dSurfaceFormat;
		172
		173	typedef uint32 SVGA3dColor; /* a, r, g, b */
		174
		175	/*
		176	* These match the D3DFORMAT_OP definitions used by Direct3D. We need
		177	* them so that we can query the host for what the supported surface
		178	* operations are (when we're using the D3D backend, in particular),
		179	* and so we can send those operations to the guest.
		180	*/
		181	typedef enum {
		182	SVGA3DFORMAT_OP_TEXTURE = 0x00000001,
		183	SVGA3DFORMAT_OP_VOLUMETEXTURE = 0x00000002,
		184	SVGA3DFORMAT_OP_CUBETEXTURE = 0x00000004,
		185	SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET = 0x00000008,
		186	SVGA3DFORMAT_OP_SAME_FORMAT_RENDERTARGET = 0x00000010,
		187	SVGA3DFORMAT_OP_ZSTENCIL = 0x00000040,
		188	SVGA3DFORMAT_OP_ZSTENCIL_WITH_ARBITRARY_COLOR_DEPTH = 0x00000080,
		189
		190	/*
		191	* This format can be used as a render target if the current display mode
		192	* is the same depth if the alpha channel is ignored. e.g. if the device
		193	* can render to A8R8G8B8 when the display mode is X8R8G8B8, then the
		194	* format op list entry for A8R8G8B8 should have this cap.
		195	*/
		196	SVGA3DFORMAT_OP_SAME_FORMAT_UP_TO_ALPHA_RENDERTARGET = 0x00000100,
		197
		198	/*
		199	* This format contains DirectDraw support (including Flip). This flag
		200	* should not to be set on alpha formats.
		201	*/
		202	SVGA3DFORMAT_OP_DISPLAYMODE = 0x00000400,
		203
		204	/*
		205	* The rasterizer can support some level of Direct3D support in this format
		206	* and implies that the driver can create a Context in this mode (for some
		207	* render target format). When this flag is set, the SVGA3DFORMAT_OP_DISPLAYMODE
		208	* flag must also be set.
		209	*/
		210	SVGA3DFORMAT_OP_3DACCELERATION = 0x00000800,
		211
		212	/*
		213	* This is set for a private format when the driver has put the bpp in
		214	* the structure.
		215	*/
		216	SVGA3DFORMAT_OP_PIXELSIZE = 0x00001000,
		217
		218	/*
		219	* Indicates that this format can be converted to any RGB format for which
		220	* SVGA3DFORMAT_OP_MEMBEROFGROUP_ARGB is specified
		221	*/
		222	SVGA3DFORMAT_OP_CONVERT_TO_ARGB = 0x00002000,
		223
		224	/*
		225	* Indicates that this format can be used to create offscreen plain surfaces.
		226	*/
		227	SVGA3DFORMAT_OP_OFFSCREENPLAIN = 0x00004000,
		228
		229	/*
		230	* Indicated that this format can be read as an SRGB texture (meaning that the
		231	* sampler will linearize the looked up data)
		232	*/
		233	SVGA3DFORMAT_OP_SRGBREAD = 0x00008000,
		234
		235	/*
		236	* Indicates that this format can be used in the bumpmap instructions
		237	*/
		238	SVGA3DFORMAT_OP_BUMPMAP = 0x00010000,
		239
		240	/*
		241	* Indicates that this format can be sampled by the displacement map sampler
		242	*/
		243	SVGA3DFORMAT_OP_DMAP = 0x00020000,
		244
		245	/*
		246	* Indicates that this format cannot be used with texture filtering
		247	*/
		248	SVGA3DFORMAT_OP_NOFILTER = 0x00040000,
		249
		250	/*
		251	* Indicates that format conversions are supported to this RGB format if
		252	* SVGA3DFORMAT_OP_CONVERT_TO_ARGB is specified in the source format.
		253	*/
		254	SVGA3DFORMAT_OP_MEMBEROFGROUP_ARGB = 0x00080000,
		255
		256	/*
		257	* Indicated that this format can be written as an SRGB target (meaning that the
		258	* pixel pipe will DE-linearize data on output to format)
		259	*/
		260	SVGA3DFORMAT_OP_SRGBWRITE = 0x00100000,
		261
		262	/*
		263	* Indicates that this format cannot be used with alpha blending
		264	*/
		265	SVGA3DFORMAT_OP_NOALPHABLEND = 0x00200000,
		266
		267	/*
		268	* Indicates that the device can auto-generated sublevels for resources
		269	* of this format
		270	*/
		271	SVGA3DFORMAT_OP_AUTOGENMIPMAP = 0x00400000,
		272
		273	/*
		274	* Indicates that this format can be used by vertex texture sampler
		275	*/
		276	SVGA3DFORMAT_OP_VERTEXTEXTURE = 0x00800000,
		277
		278	/*
		279	* Indicates that this format supports neither texture coordinate wrap
		280	* modes, nor mipmapping
		281	*/
		282	SVGA3DFORMAT_OP_NOTEXCOORDWRAPNORMIP = 0x01000000
		283	} SVGA3dFormatOp;
		284
		285	/*
		286	* This structure is a conversion of SVGA3DFORMAT_OP_*.
		287	* Entries must be located at the same position.
		288	*/
		289	typedef union {
		290	uint32 value;
		291	struct {
		292	uint32 texture : 1;
		293	uint32 volumeTexture : 1;
		294	uint32 cubeTexture : 1;
		295	uint32 offscreenRenderTarget : 1;
		296	uint32 sameFormatRenderTarget : 1;
		297	uint32 unknown1 : 1;
		298	uint32 zStencil : 1;
		299	uint32 zStencilArbitraryDepth : 1;
		300	uint32 sameFormatUpToAlpha : 1;
		301	uint32 unknown2 : 1;
		302	uint32 displayMode : 1;
		303	uint32 acceleration3d : 1;
		304	uint32 pixelSize : 1;
		305	uint32 convertToARGB : 1;
		306	uint32 offscreenPlain : 1;
		307	uint32 sRGBRead : 1;
		308	uint32 bumpMap : 1;
		309	uint32 dmap : 1;
		310	uint32 noFilter : 1;
		311	uint32 memberOfGroupARGB : 1;
		312	uint32 sRGBWrite : 1;
		313	uint32 noAlphaBlend : 1;
		314	uint32 autoGenMipMap : 1;
		315	uint32 vertexTexture : 1;
		316	uint32 noTexCoordWrapNorMip : 1;
		317	};
		318	} SVGA3dSurfaceFormatCaps;
		319
		320	/*
		321	* SVGA_3D_CMD_SETRENDERSTATE Types. All value types
		322	* must fit in a uint32.
		323	*/
		324
		325	typedef enum {
		326	SVGA3D_RS_INVALID = 0,
		327	SVGA3D_RS_ZENABLE = 1, /* SVGA3dBool */
		328	SVGA3D_RS_ZWRITEENABLE = 2, /* SVGA3dBool */
		329	SVGA3D_RS_ALPHATESTENABLE = 3, /* SVGA3dBool */
		330	SVGA3D_RS_DITHERENABLE = 4, /* SVGA3dBool */
		331	SVGA3D_RS_BLENDENABLE = 5, /* SVGA3dBool */
		332	SVGA3D_RS_FOGENABLE = 6, /* SVGA3dBool */
		333	SVGA3D_RS_SPECULARENABLE = 7, /* SVGA3dBool */
		334	SVGA3D_RS_STENCILENABLE = 8, /* SVGA3dBool */
		335	SVGA3D_RS_LIGHTINGENABLE = 9, /* SVGA3dBool */
		336	SVGA3D_RS_NORMALIZENORMALS = 10, /* SVGA3dBool */
		337	SVGA3D_RS_POINTSPRITEENABLE = 11, /* SVGA3dBool */
		338	SVGA3D_RS_POINTSCALEENABLE = 12, /* SVGA3dBool */
		339	SVGA3D_RS_STENCILREF = 13, /* uint32 */
		340	SVGA3D_RS_STENCILMASK = 14, /* uint32 */
		341	SVGA3D_RS_STENCILWRITEMASK = 15, /* uint32 */
		342	SVGA3D_RS_FOGSTART = 16, /* float */
		343	SVGA3D_RS_FOGEND = 17, /* float */
		344	SVGA3D_RS_FOGDENSITY = 18, /* float */
		345	SVGA3D_RS_POINTSIZE = 19, /* float */
		346	SVGA3D_RS_POINTSIZEMIN = 20, /* float */
		347	SVGA3D_RS_POINTSIZEMAX = 21, /* float */
		348	SVGA3D_RS_POINTSCALE_A = 22, /* float */
		349	SVGA3D_RS_POINTSCALE_B = 23, /* float */
		350	SVGA3D_RS_POINTSCALE_C = 24, /* float */
		351	SVGA3D_RS_FOGCOLOR = 25, /* SVGA3dColor */
		352	SVGA3D_RS_AMBIENT = 26, /* SVGA3dColor */
		353	SVGA3D_RS_CLIPPLANEENABLE = 27, /* SVGA3dClipPlanes */
		354	SVGA3D_RS_FOGMODE = 28, /* SVGA3dFogMode */
		355	SVGA3D_RS_FILLMODE = 29, /* SVGA3dFillMode */
		356	SVGA3D_RS_SHADEMODE = 30, /* SVGA3dShadeMode */
		357	SVGA3D_RS_LINEPATTERN = 31, /* SVGA3dLinePattern */
		358	SVGA3D_RS_SRCBLEND = 32, /* SVGA3dBlendOp */
		359	SVGA3D_RS_DSTBLEND = 33, /* SVGA3dBlendOp */
		360	SVGA3D_RS_BLENDEQUATION = 34, /* SVGA3dBlendEquation */
		361	SVGA3D_RS_CULLMODE = 35, /* SVGA3dFace */
		362	SVGA3D_RS_ZFUNC = 36, /* SVGA3dCmpFunc */
		363	SVGA3D_RS_ALPHAFUNC = 37, /* SVGA3dCmpFunc */
		364	SVGA3D_RS_STENCILFUNC = 38, /* SVGA3dCmpFunc */
		365	SVGA3D_RS_STENCILFAIL = 39, /* SVGA3dStencilOp */
		366	SVGA3D_RS_STENCILZFAIL = 40, /* SVGA3dStencilOp */
		367	SVGA3D_RS_STENCILPASS = 41, /* SVGA3dStencilOp */
		368	SVGA3D_RS_ALPHAREF = 42, /* float (0.0 .. 1.0) */
		369	SVGA3D_RS_FRONTWINDING = 43, /* SVGA3dFrontWinding */
		370	SVGA3D_RS_COORDINATETYPE = 44, /* SVGA3dCoordinateType */
		371	SVGA3D_RS_ZBIAS = 45, /* float */
		372	SVGA3D_RS_RANGEFOGENABLE = 46, /* SVGA3dBool */
		373	SVGA3D_RS_COLORWRITEENABLE = 47, /* SVGA3dColorMask */
		374	SVGA3D_RS_VERTEXMATERIALENABLE = 48, /* SVGA3dBool */
		375	SVGA3D_RS_DIFFUSEMATERIALSOURCE = 49, /* SVGA3dVertexMaterial */
		376	SVGA3D_RS_SPECULARMATERIALSOURCE = 50, /* SVGA3dVertexMaterial */
		377	SVGA3D_RS_AMBIENTMATERIALSOURCE = 51, /* SVGA3dVertexMaterial */
		378	SVGA3D_RS_EMISSIVEMATERIALSOURCE = 52, /* SVGA3dVertexMaterial */
		379	SVGA3D_RS_TEXTUREFACTOR = 53, /* SVGA3dColor */
		380	SVGA3D_RS_LOCALVIEWER = 54, /* SVGA3dBool */
		381	SVGA3D_RS_SCISSORTESTENABLE = 55, /* SVGA3dBool */
		382	SVGA3D_RS_BLENDCOLOR = 56, /* SVGA3dColor */
		383	SVGA3D_RS_STENCILENABLE2SIDED = 57, /* SVGA3dBool */
		384	SVGA3D_RS_CCWSTENCILFUNC = 58, /* SVGA3dCmpFunc */
		385	SVGA3D_RS_CCWSTENCILFAIL = 59, /* SVGA3dStencilOp */
		386	SVGA3D_RS_CCWSTENCILZFAIL = 60, /* SVGA3dStencilOp */
		387	SVGA3D_RS_CCWSTENCILPASS = 61, /* SVGA3dStencilOp */
		388	SVGA3D_RS_VERTEXBLEND = 62, /* SVGA3dVertexBlendFlags */
		389	SVGA3D_RS_SLOPESCALEDEPTHBIAS = 63, /* float */
		390	SVGA3D_RS_DEPTHBIAS = 64, /* float */
		391
		392
		393	/*
		394	* Output Gamma Level
		395	*
		396	* Output gamma effects the gamma curve of colors that are output from the
		397	* rendering pipeline. A value of 1.0 specifies a linear color space. If the
		398	* value is <= 0.0, gamma correction is ignored and linear color space is
		399	* used.
		400	*/
		401
		402	SVGA3D_RS_OUTPUTGAMMA = 65, /* float */
		403	SVGA3D_RS_ZVISIBLE = 66, /* SVGA3dBool */
		404	SVGA3D_RS_LASTPIXEL = 67, /* SVGA3dBool */
		405	SVGA3D_RS_CLIPPING = 68, /* SVGA3dBool */
		406	SVGA3D_RS_WRAP0 = 69, /* SVGA3dWrapFlags */
		407	SVGA3D_RS_WRAP1 = 70, /* SVGA3dWrapFlags */
		408	SVGA3D_RS_WRAP2 = 71, /* SVGA3dWrapFlags */
		409	SVGA3D_RS_WRAP3 = 72, /* SVGA3dWrapFlags */
		410	SVGA3D_RS_WRAP4 = 73, /* SVGA3dWrapFlags */
		411	SVGA3D_RS_WRAP5 = 74, /* SVGA3dWrapFlags */
		412	SVGA3D_RS_WRAP6 = 75, /* SVGA3dWrapFlags */
		413	SVGA3D_RS_WRAP7 = 76, /* SVGA3dWrapFlags */
		414	SVGA3D_RS_WRAP8 = 77, /* SVGA3dWrapFlags */
		415	SVGA3D_RS_WRAP9 = 78, /* SVGA3dWrapFlags */
		416	SVGA3D_RS_WRAP10 = 79, /* SVGA3dWrapFlags */
		417	SVGA3D_RS_WRAP11 = 80, /* SVGA3dWrapFlags */
		418	SVGA3D_RS_WRAP12 = 81, /* SVGA3dWrapFlags */
		419	SVGA3D_RS_WRAP13 = 82, /* SVGA3dWrapFlags */
		420	SVGA3D_RS_WRAP14 = 83, /* SVGA3dWrapFlags */
		421	SVGA3D_RS_WRAP15 = 84, /* SVGA3dWrapFlags */
		422	SVGA3D_RS_MULTISAMPLEANTIALIAS = 85, /* SVGA3dBool */
		423	SVGA3D_RS_MULTISAMPLEMASK = 86, /* uint32 */
		424	SVGA3D_RS_INDEXEDVERTEXBLENDENABLE = 87, /* SVGA3dBool */
		425	SVGA3D_RS_TWEENFACTOR = 88, /* float */
		426	SVGA3D_RS_ANTIALIASEDLINEENABLE = 89, /* SVGA3dBool */
		427	SVGA3D_RS_COLORWRITEENABLE1 = 90, /* SVGA3dColorMask */
		428	SVGA3D_RS_COLORWRITEENABLE2 = 91, /* SVGA3dColorMask */
		429	SVGA3D_RS_COLORWRITEENABLE3 = 92, /* SVGA3dColorMask */
		430	SVGA3D_RS_SEPARATEALPHABLENDENABLE = 93, /* SVGA3dBool */
		431	SVGA3D_RS_SRCBLENDALPHA = 94, /* SVGA3dBlendOp */
		432	SVGA3D_RS_DSTBLENDALPHA = 95, /* SVGA3dBlendOp */
		433	SVGA3D_RS_BLENDEQUATIONALPHA = 96, /* SVGA3dBlendEquation */
		434	SVGA3D_RS_TRANSPARENCYANTIALIAS = 97, /* SVGA3dTransparencyAntialiasType */
		435	SVGA3D_RS_LINEAA = 98, /* SVGA3dBool */
		436	SVGA3D_RS_LINEWIDTH = 99, /* float */
		437	SVGA3D_RS_MAX
		438	} SVGA3dRenderStateName;
		439
		440	typedef enum {
		441	SVGA3D_TRANSPARENCYANTIALIAS_NORMAL = 0,
		442	SVGA3D_TRANSPARENCYANTIALIAS_ALPHATOCOVERAGE = 1,
		443	SVGA3D_TRANSPARENCYANTIALIAS_SUPERSAMPLE = 2,
		444	SVGA3D_TRANSPARENCYANTIALIAS_MAX
		445	} SVGA3dTransparencyAntialiasType;
		446
		447	typedef enum {
		448	SVGA3D_VERTEXMATERIAL_NONE = 0, /* Use the value in the current material */
		449	SVGA3D_VERTEXMATERIAL_DIFFUSE = 1, /* Use the value in the diffuse component */
		450	SVGA3D_VERTEXMATERIAL_SPECULAR = 2, /* Use the value in the specular component */
		451	} SVGA3dVertexMaterial;
		452
		453	typedef enum {
		454	SVGA3D_FILLMODE_INVALID = 0,
		455	SVGA3D_FILLMODE_POINT = 1,
		456	SVGA3D_FILLMODE_LINE = 2,
		457	SVGA3D_FILLMODE_FILL = 3,
		458	SVGA3D_FILLMODE_MAX
		459	} SVGA3dFillModeType;
		460
		461
		462	typedef
		463	union {
		464	struct {
		465	uint16 mode; /* SVGA3dFillModeType */
		466	uint16 face; /* SVGA3dFace */
		467	};
		468	uint32 uintValue;
		469	} SVGA3dFillMode;
		470
		471	typedef enum {
		472	SVGA3D_SHADEMODE_INVALID = 0,
		473	SVGA3D_SHADEMODE_FLAT = 1,
		474	SVGA3D_SHADEMODE_SMOOTH = 2,
		475	SVGA3D_SHADEMODE_PHONG = 3, /* Not supported */
		476	SVGA3D_SHADEMODE_MAX
		477	} SVGA3dShadeMode;
		478
		479	typedef
		480	union {
		481	struct {
		482	uint16 repeat;
		483	uint16 pattern;
		484	};
		485	uint32 uintValue;
		486	} SVGA3dLinePattern;
		487
		488	typedef enum {
		489	SVGA3D_BLENDOP_INVALID = 0,
		490	SVGA3D_BLENDOP_ZERO = 1,
		491	SVGA3D_BLENDOP_ONE = 2,
		492	SVGA3D_BLENDOP_SRCCOLOR = 3,
		493	SVGA3D_BLENDOP_INVSRCCOLOR = 4,
		494	SVGA3D_BLENDOP_SRCALPHA = 5,
		495	SVGA3D_BLENDOP_INVSRCALPHA = 6,
		496	SVGA3D_BLENDOP_DESTALPHA = 7,
		497	SVGA3D_BLENDOP_INVDESTALPHA = 8,
		498	SVGA3D_BLENDOP_DESTCOLOR = 9,
		499	SVGA3D_BLENDOP_INVDESTCOLOR = 10,
		500	SVGA3D_BLENDOP_SRCALPHASAT = 11,
		501	SVGA3D_BLENDOP_BLENDFACTOR = 12,
		502	SVGA3D_BLENDOP_INVBLENDFACTOR = 13,
		503	SVGA3D_BLENDOP_MAX
		504	} SVGA3dBlendOp;
		505
		506	typedef enum {
		507	SVGA3D_BLENDEQ_INVALID = 0,
		508	SVGA3D_BLENDEQ_ADD = 1,
		509	SVGA3D_BLENDEQ_SUBTRACT = 2,
		510	SVGA3D_BLENDEQ_REVSUBTRACT = 3,
		511	SVGA3D_BLENDEQ_MINIMUM = 4,
		512	SVGA3D_BLENDEQ_MAXIMUM = 5,
		513	SVGA3D_BLENDEQ_MAX
		514	} SVGA3dBlendEquation;
		515
		516	typedef enum {
		517	SVGA3D_FRONTWINDING_INVALID = 0,
		518	SVGA3D_FRONTWINDING_CW = 1,
		519	SVGA3D_FRONTWINDING_CCW = 2,
		520	SVGA3D_FRONTWINDING_MAX
		521	} SVGA3dFrontWinding;
		522
		523	typedef enum {
		524	SVGA3D_FACE_INVALID = 0,
		525	SVGA3D_FACE_NONE = 1,
		526	SVGA3D_FACE_FRONT = 2,
		527	SVGA3D_FACE_BACK = 3,
		528	SVGA3D_FACE_FRONT_BACK = 4,
		529	SVGA3D_FACE_MAX
		530	} SVGA3dFace;
		531
		532	/*
		533	* The order and the values should not be changed
		534	*/
		535
		536	typedef enum {
		537	SVGA3D_CMP_INVALID = 0,
		538	SVGA3D_CMP_NEVER = 1,
		539	SVGA3D_CMP_LESS = 2,
		540	SVGA3D_CMP_EQUAL = 3,
		541	SVGA3D_CMP_LESSEQUAL = 4,
		542	SVGA3D_CMP_GREATER = 5,
		543	SVGA3D_CMP_NOTEQUAL = 6,
		544	SVGA3D_CMP_GREATEREQUAL = 7,
		545	SVGA3D_CMP_ALWAYS = 8,
		546	SVGA3D_CMP_MAX
		547	} SVGA3dCmpFunc;
		548
		549	/*
		550	* SVGA3D_FOGFUNC_* specifies the fog equation, or PER_VERTEX which allows
		551	* the fog factor to be specified in the alpha component of the specular
		552	* (a.k.a. secondary) vertex color.
		553	*/
		554	typedef enum {
		555	SVGA3D_FOGFUNC_INVALID = 0,
		556	SVGA3D_FOGFUNC_EXP = 1,
		557	SVGA3D_FOGFUNC_EXP2 = 2,
		558	SVGA3D_FOGFUNC_LINEAR = 3,
		559	SVGA3D_FOGFUNC_PER_VERTEX = 4
		560	} SVGA3dFogFunction;
		561
		562	/*
		563	* SVGA3D_FOGTYPE_* specifies if fog factors are computed on a per-vertex
		564	* or per-pixel basis.
		565	*/
		566	typedef enum {
		567	SVGA3D_FOGTYPE_INVALID = 0,
		568	SVGA3D_FOGTYPE_VERTEX = 1,
		569	SVGA3D_FOGTYPE_PIXEL = 2,
		570	SVGA3D_FOGTYPE_MAX = 3
		571	} SVGA3dFogType;
		572
		573	/*
		574	* SVGA3D_FOGBASE_* selects depth or range-based fog. Depth-based fog is
		575	* computed using the eye Z value of each pixel (or vertex), whereas range-
		576	* based fog is computed using the actual distance (range) to the eye.
		577	*/
		578	typedef enum {
		579	SVGA3D_FOGBASE_INVALID = 0,
		580	SVGA3D_FOGBASE_DEPTHBASED = 1,
		581	SVGA3D_FOGBASE_RANGEBASED = 2,
		582	SVGA3D_FOGBASE_MAX = 3
		583	} SVGA3dFogBase;
		584
		585	typedef enum {
		586	SVGA3D_STENCILOP_INVALID = 0,
		587	SVGA3D_STENCILOP_KEEP = 1,
		588	SVGA3D_STENCILOP_ZERO = 2,
		589	SVGA3D_STENCILOP_REPLACE = 3,
		590	SVGA3D_STENCILOP_INCRSAT = 4,
		591	SVGA3D_STENCILOP_DECRSAT = 5,
		592	SVGA3D_STENCILOP_INVERT = 6,
		593	SVGA3D_STENCILOP_INCR = 7,
		594	SVGA3D_STENCILOP_DECR = 8,
		595	SVGA3D_STENCILOP_MAX
		596	} SVGA3dStencilOp;
		597
		598	typedef enum {
		599	SVGA3D_CLIPPLANE_0 = (1 << 0),
		600	SVGA3D_CLIPPLANE_1 = (1 << 1),
		601	SVGA3D_CLIPPLANE_2 = (1 << 2),
		602	SVGA3D_CLIPPLANE_3 = (1 << 3),
		603	SVGA3D_CLIPPLANE_4 = (1 << 4),
		604	SVGA3D_CLIPPLANE_5 = (1 << 5),
		605	} SVGA3dClipPlanes;
		606
		607	typedef enum {
		608	SVGA3D_CLEAR_COLOR = 0x1,
		609	SVGA3D_CLEAR_DEPTH = 0x2,
		610	SVGA3D_CLEAR_STENCIL = 0x4
		611	} SVGA3dClearFlag;
		612
		613	typedef enum {
		614	SVGA3D_RT_DEPTH = 0,
		615	SVGA3D_RT_STENCIL = 1,
		616	SVGA3D_RT_COLOR0 = 2,
		617	SVGA3D_RT_COLOR1 = 3,
		618	SVGA3D_RT_COLOR2 = 4,
		619	SVGA3D_RT_COLOR3 = 5,
		620	SVGA3D_RT_COLOR4 = 6,
		621	SVGA3D_RT_COLOR5 = 7,
		622	SVGA3D_RT_COLOR6 = 8,
		623	SVGA3D_RT_COLOR7 = 9,
		624	SVGA3D_RT_MAX,
		625	SVGA3D_RT_INVALID = ((uint32)-1),
		626	} SVGA3dRenderTargetType;
		627
		628	#define SVGA3D_MAX_RT_COLOR (SVGA3D_RT_COLOR7 - SVGA3D_RT_COLOR0 + 1)
		629
		630	typedef
		631	union {
		632	struct {
		633	uint32 red : 1;
		634	uint32 green : 1;
		635	uint32 blue : 1;
		636	uint32 alpha : 1;
		637	};
		638	uint32 uintValue;
		639	} SVGA3dColorMask;
		640
		641	typedef enum {
		642	SVGA3D_VBLEND_DISABLE = 0,
		643	SVGA3D_VBLEND_1WEIGHT = 1,
		644	SVGA3D_VBLEND_2WEIGHT = 2,
		645	SVGA3D_VBLEND_3WEIGHT = 3,
		646	} SVGA3dVertexBlendFlags;
		647
		648	typedef enum {
		649	SVGA3D_WRAPCOORD_0 = 1 << 0,
		650	SVGA3D_WRAPCOORD_1 = 1 << 1,
		651	SVGA3D_WRAPCOORD_2 = 1 << 2,
		652	SVGA3D_WRAPCOORD_3 = 1 << 3,
		653	SVGA3D_WRAPCOORD_ALL = 0xF,
		654	} SVGA3dWrapFlags;
		655
		656	/*
		657	* SVGA_3D_CMD_TEXTURESTATE Types. All value types
		658	* must fit in a uint32.
		659	*/
		660
		661	typedef enum {
		662	SVGA3D_TS_INVALID = 0,
		663	SVGA3D_TS_BIND_TEXTURE = 1, /* SVGA3dSurfaceId */
		664	SVGA3D_TS_COLOROP = 2, /* SVGA3dTextureCombiner */
		665	SVGA3D_TS_COLORARG1 = 3, /* SVGA3dTextureArgData */
		666	SVGA3D_TS_COLORARG2 = 4, /* SVGA3dTextureArgData */
		667	SVGA3D_TS_ALPHAOP = 5, /* SVGA3dTextureCombiner */
		668	SVGA3D_TS_ALPHAARG1 = 6, /* SVGA3dTextureArgData */
		669	SVGA3D_TS_ALPHAARG2 = 7, /* SVGA3dTextureArgData */
		670	SVGA3D_TS_ADDRESSU = 8, /* SVGA3dTextureAddress */
		671	SVGA3D_TS_ADDRESSV = 9, /* SVGA3dTextureAddress */
		672	SVGA3D_TS_MIPFILTER = 10, /* SVGA3dTextureFilter */
		673	SVGA3D_TS_MAGFILTER = 11, /* SVGA3dTextureFilter */
		674	SVGA3D_TS_MINFILTER = 12, /* SVGA3dTextureFilter */
		675	SVGA3D_TS_BORDERCOLOR = 13, /* SVGA3dColor */
		676	SVGA3D_TS_TEXCOORDINDEX = 14, /* uint32 */
		677	SVGA3D_TS_TEXTURETRANSFORMFLAGS = 15, /* SVGA3dTexTransformFlags */
		678	SVGA3D_TS_TEXCOORDGEN = 16, /* SVGA3dTextureCoordGen */
		679	SVGA3D_TS_BUMPENVMAT00 = 17, /* float */
		680	SVGA3D_TS_BUMPENVMAT01 = 18, /* float */
		681	SVGA3D_TS_BUMPENVMAT10 = 19, /* float */
		682	SVGA3D_TS_BUMPENVMAT11 = 20, /* float */
		683	SVGA3D_TS_TEXTURE_MIPMAP_LEVEL = 21, /* uint32 */
		684	SVGA3D_TS_TEXTURE_LOD_BIAS = 22, /* float */
		685	SVGA3D_TS_TEXTURE_ANISOTROPIC_LEVEL = 23, /* uint32 */
		686	SVGA3D_TS_ADDRESSW = 24, /* SVGA3dTextureAddress */
		687
		688
		689	/*
		690	* Sampler Gamma Level
		691	*
		692	* Sampler gamma effects the color of samples taken from the sampler. A
		693	* value of 1.0 will produce linear samples. If the value is <= 0.0 the
		694	* gamma value is ignored and a linear space is used.
		695	*/
		696
		697	SVGA3D_TS_GAMMA = 25, /* float */
		698	SVGA3D_TS_BUMPENVLSCALE = 26, /* float */
		699	SVGA3D_TS_BUMPENVLOFFSET = 27, /* float */
		700	SVGA3D_TS_COLORARG0 = 28, /* SVGA3dTextureArgData */
		701	SVGA3D_TS_ALPHAARG0 = 29, /* SVGA3dTextureArgData */
		702	SVGA3D_TS_MAX
		703	} SVGA3dTextureStateName;
		704
		705	typedef enum {
		706	SVGA3D_TC_INVALID = 0,
		707	SVGA3D_TC_DISABLE = 1,
		708	SVGA3D_TC_SELECTARG1 = 2,
		709	SVGA3D_TC_SELECTARG2 = 3,
		710	SVGA3D_TC_MODULATE = 4,
		711	SVGA3D_TC_ADD = 5,
		712	SVGA3D_TC_ADDSIGNED = 6,
		713	SVGA3D_TC_SUBTRACT = 7,
		714	SVGA3D_TC_BLENDTEXTUREALPHA = 8,
		715	SVGA3D_TC_BLENDDIFFUSEALPHA = 9,
		716	SVGA3D_TC_BLENDCURRENTALPHA = 10,
		717	SVGA3D_TC_BLENDFACTORALPHA = 11,
		718	SVGA3D_TC_MODULATE2X = 12,
		719	SVGA3D_TC_MODULATE4X = 13,
		720	SVGA3D_TC_DSDT = 14,
		721	SVGA3D_TC_DOTPRODUCT3 = 15,
		722	SVGA3D_TC_BLENDTEXTUREALPHAPM = 16,
		723	SVGA3D_TC_ADDSIGNED2X = 17,
		724	SVGA3D_TC_ADDSMOOTH = 18,
		725	SVGA3D_TC_PREMODULATE = 19,
		726	SVGA3D_TC_MODULATEALPHA_ADDCOLOR = 20,
		727	SVGA3D_TC_MODULATECOLOR_ADDALPHA = 21,
		728	SVGA3D_TC_MODULATEINVALPHA_ADDCOLOR = 22,
		729	SVGA3D_TC_MODULATEINVCOLOR_ADDALPHA = 23,
		730	SVGA3D_TC_BUMPENVMAPLUMINANCE = 24,
		731	SVGA3D_TC_MULTIPLYADD = 25,
		732	SVGA3D_TC_LERP = 26,
		733	SVGA3D_TC_MAX
		734	} SVGA3dTextureCombiner;
		735
		736	#define SVGA3D_TC_CAP_BIT(svga3d_tc_op) (svga3d_tc_op ? (1 << (svga3d_tc_op - 1)) : 0)
		737
		738	typedef enum {
		739	SVGA3D_TEX_ADDRESS_INVALID = 0,
		740	SVGA3D_TEX_ADDRESS_WRAP = 1,
		741	SVGA3D_TEX_ADDRESS_MIRROR = 2,
		742	SVGA3D_TEX_ADDRESS_CLAMP = 3,
		743	SVGA3D_TEX_ADDRESS_BORDER = 4,
		744	SVGA3D_TEX_ADDRESS_MIRRORONCE = 5,
		745	SVGA3D_TEX_ADDRESS_EDGE = 6,
		746	SVGA3D_TEX_ADDRESS_MAX
		747	} SVGA3dTextureAddress;
		748
		749	/*
		750	* SVGA3D_TEX_FILTER_NONE as the minification filter means mipmapping is
		751	* disabled, and the rasterizer should use the magnification filter instead.
		752	*/
		753	typedef enum {
		754	SVGA3D_TEX_FILTER_NONE = 0,
		755	SVGA3D_TEX_FILTER_NEAREST = 1,
		756	SVGA3D_TEX_FILTER_LINEAR = 2,
		757	SVGA3D_TEX_FILTER_ANISOTROPIC = 3,
		758	SVGA3D_TEX_FILTER_FLATCUBIC = 4, /* Deprecated, not implemented */
		759	SVGA3D_TEX_FILTER_GAUSSIANCUBIC = 5, /* Deprecated, not implemented */
		760	SVGA3D_TEX_FILTER_PYRAMIDALQUAD = 6, /* Not currently implemented */
		761	SVGA3D_TEX_FILTER_GAUSSIANQUAD = 7, /* Not currently implemented */
		762	SVGA3D_TEX_FILTER_MAX
		763	} SVGA3dTextureFilter;
		764
		765	typedef enum {
		766	SVGA3D_TEX_TRANSFORM_OFF = 0,
		767	SVGA3D_TEX_TRANSFORM_S = (1 << 0),
		768	SVGA3D_TEX_TRANSFORM_T = (1 << 1),
		769	SVGA3D_TEX_TRANSFORM_R = (1 << 2),
		770	SVGA3D_TEX_TRANSFORM_Q = (1 << 3),
		771	SVGA3D_TEX_PROJECTED = (1 << 15),
		772	} SVGA3dTexTransformFlags;
		773
		774	typedef enum {
		775	SVGA3D_TEXCOORD_GEN_OFF = 0,
		776	SVGA3D_TEXCOORD_GEN_EYE_POSITION = 1,
		777	SVGA3D_TEXCOORD_GEN_EYE_NORMAL = 2,
		778	SVGA3D_TEXCOORD_GEN_REFLECTIONVECTOR = 3,
		779	SVGA3D_TEXCOORD_GEN_SPHERE = 4,
		780	SVGA3D_TEXCOORD_GEN_MAX
		781	} SVGA3dTextureCoordGen;
		782
		783	/*
		784	* Texture argument constants for texture combiner
		785	*/
		786	typedef enum {
		787	SVGA3D_TA_INVALID = 0,
		788	SVGA3D_TA_CONSTANT = 1,
		789	SVGA3D_TA_PREVIOUS = 2,
		790	SVGA3D_TA_DIFFUSE = 3,
		791	SVGA3D_TA_TEXTURE = 4,
		792	SVGA3D_TA_SPECULAR = 5,
		793	SVGA3D_TA_MAX
		794	} SVGA3dTextureArgData;
		795
		796	#define SVGA3D_TM_MASK_LEN 4
		797
		798	/* Modifiers for texture argument constants defined above. */
		799	typedef enum {
		800	SVGA3D_TM_NONE = 0,
		801	SVGA3D_TM_ALPHA = (1 << SVGA3D_TM_MASK_LEN),
		802	SVGA3D_TM_ONE_MINUS = (2 << SVGA3D_TM_MASK_LEN),
		803	} SVGA3dTextureArgModifier;
		804
		805	#define SVGA3D_INVALID_ID ((uint32)-1)
		806	#define SVGA3D_MAX_CLIP_PLANES 6
		807
		808	/*
		809	* This is the limit to the number of fixed-function texture
		810	* transforms and texture coordinates we can support. It does not
		811	* correspond to the number of texture image units (samplers) we
		812	* support!
		813	*/
		814	#define SVGA3D_MAX_TEXTURE_COORDS 8
		815
		816	/*
		817	* Vertex declarations
		818	*
		819	* Notes:
		820	*
		821	* SVGA3D_DECLUSAGE_POSITIONT is for pre-transformed vertices. If you
		822	* draw with any POSITIONT vertex arrays, the programmable vertex
		823	* pipeline will be implicitly disabled. Drawing will take place as if
		824	* no vertex shader was bound.
		825	*/
		826
		827	typedef enum {
		828	SVGA3D_DECLUSAGE_POSITION = 0,
		829	SVGA3D_DECLUSAGE_BLENDWEIGHT, /* 1 */
		830	SVGA3D_DECLUSAGE_BLENDINDICES, /* 2 */
		831	SVGA3D_DECLUSAGE_NORMAL, /* 3 */
		832	SVGA3D_DECLUSAGE_PSIZE, /* 4 */
		833	SVGA3D_DECLUSAGE_TEXCOORD, /* 5 */
		834	SVGA3D_DECLUSAGE_TANGENT, /* 6 */
		835	SVGA3D_DECLUSAGE_BINORMAL, /* 7 */
		836	SVGA3D_DECLUSAGE_TESSFACTOR, /* 8 */
		837	SVGA3D_DECLUSAGE_POSITIONT, /* 9 */
		838	SVGA3D_DECLUSAGE_COLOR, /* 10 */
		839	SVGA3D_DECLUSAGE_FOG, /* 11 */
		840	SVGA3D_DECLUSAGE_DEPTH, /* 12 */
		841	SVGA3D_DECLUSAGE_SAMPLE, /* 13 */
		842	SVGA3D_DECLUSAGE_MAX
		843	} SVGA3dDeclUsage;
		844
		845	typedef enum {
		846	SVGA3D_DECLMETHOD_DEFAULT = 0,
		847	SVGA3D_DECLMETHOD_PARTIALU,
		848	SVGA3D_DECLMETHOD_PARTIALV,
		849	SVGA3D_DECLMETHOD_CROSSUV, /* Normal */
		850	SVGA3D_DECLMETHOD_UV,
		851	SVGA3D_DECLMETHOD_LOOKUP, /* Lookup a displacement map */
		852	SVGA3D_DECLMETHOD_LOOKUPPRESAMPLED, /* Lookup a pre-sampled displacement map */
		853	} SVGA3dDeclMethod;
		854
		855	typedef enum {
		856	SVGA3D_DECLTYPE_FLOAT1 = 0,
		857	SVGA3D_DECLTYPE_FLOAT2 = 1,
		858	SVGA3D_DECLTYPE_FLOAT3 = 2,
		859	SVGA3D_DECLTYPE_FLOAT4 = 3,
		860	SVGA3D_DECLTYPE_D3DCOLOR = 4,
		861	SVGA3D_DECLTYPE_UBYTE4 = 5,
		862	SVGA3D_DECLTYPE_SHORT2 = 6,
		863	SVGA3D_DECLTYPE_SHORT4 = 7,
		864	SVGA3D_DECLTYPE_UBYTE4N = 8,
		865	SVGA3D_DECLTYPE_SHORT2N = 9,
		866	SVGA3D_DECLTYPE_SHORT4N = 10,
		867	SVGA3D_DECLTYPE_USHORT2N = 11,
		868	SVGA3D_DECLTYPE_USHORT4N = 12,
		869	SVGA3D_DECLTYPE_UDEC3 = 13,
		870	SVGA3D_DECLTYPE_DEC3N = 14,
		871	SVGA3D_DECLTYPE_FLOAT16_2 = 15,
		872	SVGA3D_DECLTYPE_FLOAT16_4 = 16,
		873	SVGA3D_DECLTYPE_MAX,
		874	} SVGA3dDeclType;
		875
		876	/*
		877	* This structure is used for the divisor for geometry instancing;
		878	* it's a direct translation of the Direct3D equivalent.
		879	*/
		880	typedef union {
		881	struct {
		882	/*
		883	* For index data, this number represents the number of instances to draw.
		884	* For instance data, this number represents the number of
		885	* instances/vertex in this stream
		886	*/
		887	uint32 count : 30;
		888
		889	/*
		890	* This is 1 if this is supposed to be the data that is repeated for
		891	* every instance.
		892	*/
		893	uint32 indexedData : 1;
		894
		895	/*
		896	* This is 1 if this is supposed to be the per-instance data.
		897	*/
		898	uint32 instanceData : 1;
		899	};
		900
		901	uint32 value;
		902	} SVGA3dVertexDivisor;
		903
		904	typedef enum {
		905	SVGA3D_PRIMITIVE_INVALID = 0,
		906	SVGA3D_PRIMITIVE_TRIANGLELIST = 1,
		907	SVGA3D_PRIMITIVE_POINTLIST = 2,
		908	SVGA3D_PRIMITIVE_LINELIST = 3,
		909	SVGA3D_PRIMITIVE_LINESTRIP = 4,
		910	SVGA3D_PRIMITIVE_TRIANGLESTRIP = 5,
		911	SVGA3D_PRIMITIVE_TRIANGLEFAN = 6,
		912	SVGA3D_PRIMITIVE_MAX
		913	} SVGA3dPrimitiveType;
		914
		915	typedef enum {
		916	SVGA3D_COORDINATE_INVALID = 0,
		917	SVGA3D_COORDINATE_LEFTHANDED = 1,
		918	SVGA3D_COORDINATE_RIGHTHANDED = 2,
		919	SVGA3D_COORDINATE_MAX
		920	} SVGA3dCoordinateType;
		921
		922	typedef enum {
		923	SVGA3D_TRANSFORM_INVALID = 0,
		924	SVGA3D_TRANSFORM_WORLD = 1,
		925	SVGA3D_TRANSFORM_VIEW = 2,
		926	SVGA3D_TRANSFORM_PROJECTION = 3,
		927	SVGA3D_TRANSFORM_TEXTURE0 = 4,
		928	SVGA3D_TRANSFORM_TEXTURE1 = 5,
		929	SVGA3D_TRANSFORM_TEXTURE2 = 6,
		930	SVGA3D_TRANSFORM_TEXTURE3 = 7,
		931	SVGA3D_TRANSFORM_TEXTURE4 = 8,
		932	SVGA3D_TRANSFORM_TEXTURE5 = 9,
		933	SVGA3D_TRANSFORM_TEXTURE6 = 10,
		934	SVGA3D_TRANSFORM_TEXTURE7 = 11,
		935	SVGA3D_TRANSFORM_WORLD1 = 12,
		936	SVGA3D_TRANSFORM_WORLD2 = 13,
		937	SVGA3D_TRANSFORM_WORLD3 = 14,
		938	SVGA3D_TRANSFORM_MAX
		939	} SVGA3dTransformType;
		940
		941	typedef enum {
		942	SVGA3D_LIGHTTYPE_INVALID = 0,
		943	SVGA3D_LIGHTTYPE_POINT = 1,
		944	SVGA3D_LIGHTTYPE_SPOT1 = 2, /* 1-cone, in degrees */
		945	SVGA3D_LIGHTTYPE_SPOT2 = 3, /* 2-cone, in radians */
		946	SVGA3D_LIGHTTYPE_DIRECTIONAL = 4,
		947	SVGA3D_LIGHTTYPE_MAX
		948	} SVGA3dLightType;
		949
		950	typedef enum {
		951	SVGA3D_CUBEFACE_POSX = 0,
		952	SVGA3D_CUBEFACE_NEGX = 1,
		953	SVGA3D_CUBEFACE_POSY = 2,
		954	SVGA3D_CUBEFACE_NEGY = 3,
		955	SVGA3D_CUBEFACE_POSZ = 4,
		956	SVGA3D_CUBEFACE_NEGZ = 5,
		957	} SVGA3dCubeFace;
		958
		959	typedef enum {
		960	SVGA3D_SHADERTYPE_VS = 1,
		961	SVGA3D_SHADERTYPE_PS = 2,
		962	SVGA3D_SHADERTYPE_MAX
		963	} SVGA3dShaderType;
		964
		965	typedef enum {
		966	SVGA3D_CONST_TYPE_FLOAT = 0,
		967	SVGA3D_CONST_TYPE_INT = 1,
		968	SVGA3D_CONST_TYPE_BOOL = 2,
		969	} SVGA3dShaderConstType;
		970
		971	#define SVGA3D_MAX_SURFACE_FACES 6
		972
		973	typedef enum {
		974	SVGA3D_STRETCH_BLT_POINT = 0,
		975	SVGA3D_STRETCH_BLT_LINEAR = 1,
		976	SVGA3D_STRETCH_BLT_MAX
		977	} SVGA3dStretchBltMode;
		978
		979	typedef enum {
		980	SVGA3D_QUERYTYPE_OCCLUSION = 0,
		981	SVGA3D_QUERYTYPE_MAX
		982	} SVGA3dQueryType;
		983
		984	typedef enum {
		985	SVGA3D_QUERYSTATE_PENDING = 0, /* Waiting on the host (set by guest) */
		986	SVGA3D_QUERYSTATE_SUCCEEDED = 1, /* Completed successfully (set by host) */
		987	SVGA3D_QUERYSTATE_FAILED = 2, /* Completed unsuccessfully (set by host) */
		988	SVGA3D_QUERYSTATE_NEW = 3, /* Never submitted (For guest use only) */
		989	} SVGA3dQueryState;
		990
		991	typedef enum {
		992	SVGA3D_WRITE_HOST_VRAM = 1,
		993	SVGA3D_READ_HOST_VRAM = 2,
		994	} SVGA3dTransferType;
		995
		996	/*
		997	* The maximum number of vertex arrays we're guaranteed to support in
		998	* SVGA_3D_CMD_DRAWPRIMITIVES.
		999	*/
		1000	#define SVGA3D_MAX_VERTEX_ARRAYS 32
		1001
		1002	/*
		1003	* The maximum number of primitive ranges we're guaranteed to support
		1004	* in SVGA_3D_CMD_DRAWPRIMITIVES.
		1005	*/
		1006	#define SVGA3D_MAX_DRAW_PRIMITIVE_RANGES 32
		1007
		1008	/*
		1009	* Identifiers for commands in the command FIFO.
		1010	*
		1011	* IDs between 1000 and 1039 (inclusive) were used by obsolete versions of
		1012	* the SVGA3D protocol and remain reserved; they should not be used in the
		1013	* future.
		1014	*
		1015	* IDs between 1040 and 1999 (inclusive) are available for use by the
		1016	* current SVGA3D protocol.
		1017	*
		1018	* FIFO clients other than SVGA3D should stay below 1000, or at 2000
		1019	* and up.
		1020	*/
		1021
		1022	#define SVGA_3D_CMD_LEGACY_BASE 1000
		1023	#define SVGA_3D_CMD_BASE 1040
		1024
		1025	#define SVGA_3D_CMD_SURFACE_DEFINE SVGA_3D_CMD_BASE + 0 /* Deprecated */
		1026	#define SVGA_3D_CMD_SURFACE_DESTROY SVGA_3D_CMD_BASE + 1
		1027	#define SVGA_3D_CMD_SURFACE_COPY SVGA_3D_CMD_BASE + 2
		1028	#define SVGA_3D_CMD_SURFACE_STRETCHBLT SVGA_3D_CMD_BASE + 3
		1029	#define SVGA_3D_CMD_SURFACE_DMA SVGA_3D_CMD_BASE + 4
		1030	#define SVGA_3D_CMD_CONTEXT_DEFINE SVGA_3D_CMD_BASE + 5
		1031	#define SVGA_3D_CMD_CONTEXT_DESTROY SVGA_3D_CMD_BASE + 6
		1032	#define SVGA_3D_CMD_SETTRANSFORM SVGA_3D_CMD_BASE + 7
		1033	#define SVGA_3D_CMD_SETZRANGE SVGA_3D_CMD_BASE + 8
		1034	#define SVGA_3D_CMD_SETRENDERSTATE SVGA_3D_CMD_BASE + 9
		1035	#define SVGA_3D_CMD_SETRENDERTARGET SVGA_3D_CMD_BASE + 10
		1036	#define SVGA_3D_CMD_SETTEXTURESTATE SVGA_3D_CMD_BASE + 11
		1037	#define SVGA_3D_CMD_SETMATERIAL SVGA_3D_CMD_BASE + 12
		1038	#define SVGA_3D_CMD_SETLIGHTDATA SVGA_3D_CMD_BASE + 13
		1039	#define SVGA_3D_CMD_SETLIGHTENABLED SVGA_3D_CMD_BASE + 14
		1040	#define SVGA_3D_CMD_SETVIEWPORT SVGA_3D_CMD_BASE + 15
		1041	#define SVGA_3D_CMD_SETCLIPPLANE SVGA_3D_CMD_BASE + 16
		1042	#define SVGA_3D_CMD_CLEAR SVGA_3D_CMD_BASE + 17
		1043	#define SVGA_3D_CMD_PRESENT SVGA_3D_CMD_BASE + 18 /* Deprecated */
		1044	#define SVGA_3D_CMD_SHADER_DEFINE SVGA_3D_CMD_BASE + 19
		1045	#define SVGA_3D_CMD_SHADER_DESTROY SVGA_3D_CMD_BASE + 20
		1046	#define SVGA_3D_CMD_SET_SHADER SVGA_3D_CMD_BASE + 21
		1047	#define SVGA_3D_CMD_SET_SHADER_CONST SVGA_3D_CMD_BASE + 22
		1048	#define SVGA_3D_CMD_DRAW_PRIMITIVES SVGA_3D_CMD_BASE + 23
		1049	#define SVGA_3D_CMD_SETSCISSORRECT SVGA_3D_CMD_BASE + 24
		1050	#define SVGA_3D_CMD_BEGIN_QUERY SVGA_3D_CMD_BASE + 25
		1051	#define SVGA_3D_CMD_END_QUERY SVGA_3D_CMD_BASE + 26
		1052	#define SVGA_3D_CMD_WAIT_FOR_QUERY SVGA_3D_CMD_BASE + 27
		1053	#define SVGA_3D_CMD_PRESENT_READBACK SVGA_3D_CMD_BASE + 28 /* Deprecated */
		1054	#define SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN SVGA_3D_CMD_BASE + 29
		1055	#define SVGA_3D_CMD_SURFACE_DEFINE_V2 SVGA_3D_CMD_BASE + 30
		1056	#define SVGA_3D_CMD_GENERATE_MIPMAPS SVGA_3D_CMD_BASE + 31
		1057	#define SVGA_3D_CMD_ACTIVATE_SURFACE SVGA_3D_CMD_BASE + 40
		1058	#define SVGA_3D_CMD_DEACTIVATE_SURFACE SVGA_3D_CMD_BASE + 41
		1059	#define SVGA_3D_CMD_MAX SVGA_3D_CMD_BASE + 42
		1060
		1061	#define SVGA_3D_CMD_FUTURE_MAX 2000
		1062
		1063	/*
		1064	* Common substructures used in multiple FIFO commands:
		1065	*/
		1066
		1067	typedef struct {
		1068	union {
		1069	struct {
		1070	uint16 function; /* SVGA3dFogFunction */
		1071	uint8 type; /* SVGA3dFogType */
		1072	uint8 base; /* SVGA3dFogBase */
		1073	};
		1074	uint32 uintValue;
		1075	};
		1076	} SVGA3dFogMode;
		1077
		1078	/*
		1079	* Uniquely identify one image (a 1D/2D/3D array) from a surface. This
		1080	* is a surface ID as well as face/mipmap indices.
		1081	*/
		1082
		1083	typedef
		1084	struct SVGA3dSurfaceImageId {
		1085	uint32 sid;
		1086	uint32 face;
		1087	uint32 mipmap;
		1088	} SVGA3dSurfaceImageId;
		1089
		1090	typedef
		1091	struct SVGA3dGuestImage {
		1092	SVGAGuestPtr ptr;
		1093
		1094	/*
		1095	* A note on interpretation of pitch: This value of pitch is the
		1096	* number of bytes between vertically adjacent image
		1097	* blocks. Normally this is the number of bytes between the first
		1098	* pixel of two adjacent scanlines. With compressed textures,
		1099	* however, this may represent the number of bytes between
		1100	* compression blocks rather than between rows of pixels.
		1101	*
		1102	* XXX: Compressed textures currently must be tightly packed in guest memory.
		1103	*
		1104	* If the image is 1-dimensional, pitch is ignored.
		1105	*
		1106	* If 'pitch' is zero, the SVGA3D device calculates a pitch value
		1107	* assuming each row of blocks is tightly packed.
		1108	*/
		1109	uint32 pitch;
		1110	} SVGA3dGuestImage;
		1111
		1112
		1113	/*
		1114	* FIFO command format definitions:
		1115	*/
		1116
		1117	/*
		1118	* The data size header following cmdNum for every 3d command
		1119	*/
		1120	typedef
		1121	struct {
		1122	uint32 id;
		1123	uint32 size;
		1124	} SVGA3dCmdHeader;
		1125
		1126	/*
		1127	* A surface is a hierarchy of host VRAM surfaces: 1D, 2D, or 3D, with
		1128	* optional mipmaps and cube faces.
		1129	*/
		1130
		1131	typedef
		1132	struct {
		1133	uint32 width;
		1134	uint32 height;
		1135	uint32 depth;
		1136	} SVGA3dSize;
		1137
		1138	typedef enum {
		1139	SVGA3D_SURFACE_CUBEMAP = (1 << 0),
		1140	SVGA3D_SURFACE_HINT_STATIC = (1 << 1),
		1141	SVGA3D_SURFACE_HINT_DYNAMIC = (1 << 2),
		1142	SVGA3D_SURFACE_HINT_INDEXBUFFER = (1 << 3),
		1143	SVGA3D_SURFACE_HINT_VERTEXBUFFER = (1 << 4),
		1144	SVGA3D_SURFACE_HINT_TEXTURE = (1 << 5),
		1145	SVGA3D_SURFACE_HINT_RENDERTARGET = (1 << 6),
		1146	SVGA3D_SURFACE_HINT_DEPTHSTENCIL = (1 << 7),
		1147	SVGA3D_SURFACE_HINT_WRITEONLY = (1 << 8),
		1148	SVGA3D_SURFACE_MASKABLE_ANTIALIAS = (1 << 9),
		1149	SVGA3D_SURFACE_AUTOGENMIPMAPS = (1 << 10),
		1150	} SVGA3dSurfaceFlags;
		1151
		1152	typedef
		1153	struct {
		1154	uint32 numMipLevels;
		1155	} SVGA3dSurfaceFace;
		1156
		1157	typedef
		1158	struct {
		1159	uint32 sid;
		1160	SVGA3dSurfaceFlags surfaceFlags;
		1161	SVGA3dSurfaceFormat format;
		1162	/*
		1163	* If surfaceFlags has SVGA3D_SURFACE_CUBEMAP bit set, all SVGA3dSurfaceFace
		1164	* structures must have the same value of numMipLevels field.
		1165	* Otherwise, all but the first SVGA3dSurfaceFace structures must have the
		1166	* numMipLevels set to 0.
		1167	*/
		1168	SVGA3dSurfaceFace face[SVGA3D_MAX_SURFACE_FACES];
		1169	/*
		1170	* Followed by an SVGA3dSize structure for each mip level in each face.
		1171	*
		1172	* A note on surface sizes: Sizes are always specified in pixels,
		1173	* even if the true surface size is not a multiple of the minimum
		1174	* block size of the surface's format. For example, a 3x3x1 DXT1
		1175	* compressed texture would actually be stored as a 4x4x1 image in
		1176	* memory.
		1177	*/
		1178	} SVGA3dCmdDefineSurface; /* SVGA_3D_CMD_SURFACE_DEFINE */
		1179
		1180	typedef
		1181	struct {
		1182	uint32 sid;
		1183	SVGA3dSurfaceFlags surfaceFlags;
		1184	SVGA3dSurfaceFormat format;
		1185	/*
		1186	* If surfaceFlags has SVGA3D_SURFACE_CUBEMAP bit set, all SVGA3dSurfaceFace
		1187	* structures must have the same value of numMipLevels field.
		1188	* Otherwise, all but the first SVGA3dSurfaceFace structures must have the
		1189	* numMipLevels set to 0.
		1190	*/
		1191	SVGA3dSurfaceFace face[SVGA3D_MAX_SURFACE_FACES];
		1192	uint32 multisampleCount;
		1193	SVGA3dTextureFilter autogenFilter;
		1194	/*
		1195	* Followed by an SVGA3dSize structure for each mip level in each face.
		1196	*
		1197	* A note on surface sizes: Sizes are always specified in pixels,
		1198	* even if the true surface size is not a multiple of the minimum
		1199	* block size of the surface's format. For example, a 3x3x1 DXT1
		1200	* compressed texture would actually be stored as a 4x4x1 image in
		1201	* memory.
		1202	*/
		1203	} SVGA3dCmdDefineSurface_v2; /* SVGA_3D_CMD_SURFACE_DEFINE_V2 */
		1204
		1205	typedef
		1206	struct {
		1207	uint32 sid;
		1208	} SVGA3dCmdDestroySurface; /* SVGA_3D_CMD_SURFACE_DESTROY */
		1209
		1210	typedef
		1211	struct {
		1212	uint32 cid;
		1213	} SVGA3dCmdDefineContext; /* SVGA_3D_CMD_CONTEXT_DEFINE */
		1214
		1215	typedef
		1216	struct {
		1217	uint32 cid;
		1218	} SVGA3dCmdDestroyContext; /* SVGA_3D_CMD_CONTEXT_DESTROY */
		1219
		1220	typedef
		1221	struct {
		1222	uint32 cid;
		1223	SVGA3dClearFlag clearFlag;
		1224	uint32 color;
		1225	float depth;
		1226	uint32 stencil;
		1227	/* Followed by variable number of SVGA3dRect structures */
		1228	} SVGA3dCmdClear; /* SVGA_3D_CMD_CLEAR */
		1229
		1230	typedef
		1231	struct SVGA3dCopyRect {
		1232	uint32 x;
		1233	uint32 y;
		1234	uint32 w;
		1235	uint32 h;
		1236	uint32 srcx;
		1237	uint32 srcy;
		1238	} SVGA3dCopyRect;
		1239
		1240	typedef
		1241	struct SVGA3dCopyBox {
		1242	uint32 x;
		1243	uint32 y;
		1244	uint32 z;
		1245	uint32 w;
		1246	uint32 h;
		1247	uint32 d;
		1248	uint32 srcx;
		1249	uint32 srcy;
		1250	uint32 srcz;
		1251	} SVGA3dCopyBox;
		1252
		1253	typedef
		1254	struct {
		1255	uint32 x;
		1256	uint32 y;
		1257	uint32 w;
		1258	uint32 h;
		1259	} SVGA3dRect;
		1260
		1261	typedef
		1262	struct {
		1263	uint32 x;
		1264	uint32 y;
		1265	uint32 z;
		1266	uint32 w;
		1267	uint32 h;
		1268	uint32 d;
		1269	} SVGA3dBox;
		1270
		1271	typedef
		1272	struct {
		1273	uint32 x;
		1274	uint32 y;
		1275	uint32 z;
		1276	} SVGA3dPoint;
		1277
		1278	typedef
		1279	struct {
		1280	SVGA3dLightType type;
		1281	SVGA3dBool inWorldSpace;
		1282	float diffuse[4];
		1283	float specular[4];
		1284	float ambient[4];
		1285	float position[4];
		1286	float direction[4];
		1287	float range;
		1288	float falloff;
		1289	float attenuation0;
		1290	float attenuation1;
		1291	float attenuation2;
		1292	float theta;
		1293	float phi;
		1294	} SVGA3dLightData;
		1295
		1296	typedef
		1297	struct {
		1298	uint32 sid;
		1299	/* Followed by variable number of SVGA3dCopyRect structures */
		1300	} SVGA3dCmdPresent; /* SVGA_3D_CMD_PRESENT */
		1301
		1302	typedef
		1303	struct {
		1304	SVGA3dRenderStateName state;
		1305	union {
		1306	uint32 uintValue;
		1307	float floatValue;
		1308	};
		1309	} SVGA3dRenderState;
		1310
		1311	typedef
		1312	struct {
		1313	uint32 cid;
		1314	/* Followed by variable number of SVGA3dRenderState structures */
		1315	} SVGA3dCmdSetRenderState; /* SVGA_3D_CMD_SETRENDERSTATE */
		1316
		1317	typedef
		1318	struct {
		1319	uint32 cid;
		1320	SVGA3dRenderTargetType type;
		1321	SVGA3dSurfaceImageId target;
		1322	} SVGA3dCmdSetRenderTarget; /* SVGA_3D_CMD_SETRENDERTARGET */
		1323
		1324	typedef
		1325	struct {
		1326	SVGA3dSurfaceImageId src;
		1327	SVGA3dSurfaceImageId dest;
		1328	/* Followed by variable number of SVGA3dCopyBox structures */
		1329	} SVGA3dCmdSurfaceCopy; /* SVGA_3D_CMD_SURFACE_COPY */
		1330
		1331	typedef
		1332	struct {
		1333	SVGA3dSurfaceImageId src;
		1334	SVGA3dSurfaceImageId dest;
		1335	SVGA3dBox boxSrc;
		1336	SVGA3dBox boxDest;
		1337	SVGA3dStretchBltMode mode;
		1338	} SVGA3dCmdSurfaceStretchBlt; /* SVGA_3D_CMD_SURFACE_STRETCHBLT */
		1339
		1340	typedef
		1341	struct {
		1342	/*
		1343	* If the discard flag is present in a surface DMA operation, the host may
		1344	* discard the contents of the current mipmap level and face of the target
		1345	* surface before applying the surface DMA contents.
		1346	*/
		1347	uint32 discard : 1;
		1348
		1349	/*
		1350	* If the unsynchronized flag is present, the host may perform this upload
		1351	* without syncing to pending reads on this surface.
		1352	*/
		1353	uint32 unsynchronized : 1;
		1354
		1355	/*
		1356	* Guests MUST set the reserved bits to 0 before submitting the command
		1357	* suffix as future flags may occupy these bits.
		1358	*/
		1359	uint32 reserved : 30;
		1360	} SVGA3dSurfaceDMAFlags;
		1361
		1362	typedef
		1363	struct {
		1364	SVGA3dGuestImage guest;
		1365	SVGA3dSurfaceImageId host;
		1366	SVGA3dTransferType transfer;
		1367	/*
		1368	* Followed by variable number of SVGA3dCopyBox structures. For consistency
		1369	* in all clipping logic and coordinate translation, we define the
		1370	* "source" in each copyBox as the guest image and the
		1371	* "destination" as the host image, regardless of transfer
		1372	* direction.
		1373	*
		1374	* For efficiency, the SVGA3D device is free to copy more data than
		1375	* specified. For example, it may round copy boxes outwards such
		1376	* that they lie on particular alignment boundaries.
		1377	*/
		1378	} SVGA3dCmdSurfaceDMA; /* SVGA_3D_CMD_SURFACE_DMA */
		1379
		1380	/*
		1381	* SVGA3dCmdSurfaceDMASuffix --
		1382	*
		1383	* This is a command suffix that will appear after a SurfaceDMA command in
		1384	* the FIFO. It contains some extra information that hosts may use to
		1385	* optimize performance or protect the guest. This suffix exists to preserve
		1386	* backwards compatibility while also allowing for new functionality to be
		1387	* implemented.
		1388	*/
		1389
		1390	typedef
		1391	struct {
		1392	uint32 suffixSize;
		1393
		1394	/*
		1395	* The maximum offset is used to determine the maximum offset from the
		1396	* guestPtr base address that will be accessed or written to during this
		1397	* surfaceDMA. If the suffix is supported, the host will respect this
		1398	* boundary while performing surface DMAs.
		1399	*
		1400	* Defaults to MAX_UINT32
		1401	*/
		1402	uint32 maximumOffset;
		1403
		1404	/*
		1405	* A set of flags that describes optimizations that the host may perform
		1406	* while performing this surface DMA operation. The guest should never rely
		1407	* on behaviour that is different when these flags are set for correctness.
		1408	*
		1409	* Defaults to 0
		1410	*/
		1411	SVGA3dSurfaceDMAFlags flags;
		1412	} SVGA3dCmdSurfaceDMASuffix;
		1413
		1414	/*
		1415	* SVGA_3D_CMD_DRAW_PRIMITIVES --
		1416	*
		1417	* This command is the SVGA3D device's generic drawing entry point.
		1418	* It can draw multiple ranges of primitives, optionally using an
		1419	* index buffer, using an arbitrary collection of vertex buffers.
		1420	*
		1421	* Each SVGA3dVertexDecl defines a distinct vertex array to bind
		1422	* during this draw call. The declarations specify which surface
		1423	* the vertex data lives in, what that vertex data is used for,
		1424	* and how to interpret it.
		1425	*
		1426	* Each SVGA3dPrimitiveRange defines a collection of primitives
		1427	* to render using the same vertex arrays. An index buffer is
		1428	* optional.
		1429	*/
		1430
		1431	typedef
		1432	struct {
		1433	/*
		1434	* A range hint is an optional specification for the range of indices
		1435	* in an SVGA3dArray that will be used. If 'last' is zero, it is assumed
		1436	* that the entire array will be used.
		1437	*
		1438	* These are only hints. The SVGA3D device may use them for
		1439	* performance optimization if possible, but it's also allowed to
		1440	* ignore these values.
		1441	*/
		1442	uint32 first;
		1443	uint32 last;
		1444	} SVGA3dArrayRangeHint;
		1445
		1446	typedef
		1447	struct {
		1448	/*
		1449	* Define the origin and shape of a vertex or index array. Both
		1450	* 'offset' and 'stride' are in bytes. The provided surface will be
		1451	* reinterpreted as a flat array of bytes in the same format used
		1452	* by surface DMA operations. To avoid unnecessary conversions, the
		1453	* surface should be created with the SVGA3D_BUFFER format.
		1454	*
		1455	* Index 0 in the array starts 'offset' bytes into the surface.
		1456	* Index 1 begins at byte 'offset + stride', etc. Array indices may
		1457	* not be negative.
		1458	*/
		1459	uint32 surfaceId;
		1460	uint32 offset;
		1461	uint32 stride;
		1462	} SVGA3dArray;
		1463
		1464	typedef
		1465	struct {
		1466	/*
		1467	* Describe a vertex array's data type, and define how it is to be
		1468	* used by the fixed function pipeline or the vertex shader. It
		1469	* isn't useful to have two VertexDecls with the same
		1470	* VertexArrayIdentity in one draw call.
		1471	*/
		1472	SVGA3dDeclType type;
		1473	SVGA3dDeclMethod method;
		1474	SVGA3dDeclUsage usage;
		1475	uint32 usageIndex;
		1476	} SVGA3dVertexArrayIdentity;
		1477
		1478	typedef
		1479	struct {
		1480	SVGA3dVertexArrayIdentity identity;
		1481	SVGA3dArray array;
		1482	SVGA3dArrayRangeHint rangeHint;
		1483	} SVGA3dVertexDecl;
		1484
		1485	typedef
		1486	struct {
		1487	/*
		1488	* Define a group of primitives to render, from sequential indices.
		1489	*
		1490	* The value of 'primitiveType' and 'primitiveCount' imply the
		1491	* total number of vertices that will be rendered.
		1492	*/
		1493	SVGA3dPrimitiveType primType;
		1494	uint32 primitiveCount;
		1495
		1496	/*
		1497	* Optional index buffer. If indexArray.surfaceId is
		1498	* SVGA3D_INVALID_ID, we render without an index buffer. Rendering
		1499	* without an index buffer is identical to rendering with an index
		1500	* buffer containing the sequence [0, 1, 2, 3, ...].
		1501	*
		1502	* If an index buffer is in use, indexWidth specifies the width in
		1503	* bytes of each index value. It must be less than or equal to
		1504	* indexArray.stride.
		1505	*
		1506	* (Currently, the SVGA3D device requires index buffers to be tightly
		1507	* packed. In other words, indexWidth == indexArray.stride)
		1508	*/
		1509	SVGA3dArray indexArray;
		1510	uint32 indexWidth;
		1511
		1512	/*
		1513	* Optional index bias. This number is added to all indices from
		1514	* indexArray before they are used as vertex array indices. This
		1515	* can be used in multiple ways:
		1516	*
		1517	* - When not using an indexArray, this bias can be used to
		1518	* specify where in the vertex arrays to begin rendering.
		1519	*
		1520	* - A positive number here is equivalent to increasing the
		1521	* offset in each vertex array.
		1522	*
		1523	* - A negative number can be used to render using a small
		1524	* vertex array and an index buffer that contains large
		1525	* values. This may be used by some applications that
		1526	* crop a vertex buffer without modifying their index
		1527	* buffer.
		1528	*
		1529	* Note that rendering with a negative bias value may be slower and
		1530	* use more memory than rendering with a positive or zero bias.
		1531	*/
		1532	int32 indexBias;
		1533	} SVGA3dPrimitiveRange;
		1534
		1535	typedef
		1536	struct {
		1537	uint32 cid;
		1538	uint32 numVertexDecls;
		1539	uint32 numRanges;
		1540
		1541	/*
		1542	* There are two variable size arrays after the
		1543	* SVGA3dCmdDrawPrimitives structure. In order,
		1544	* they are:
		1545	*
		1546	* 1. SVGA3dVertexDecl, quantity 'numVertexDecls', but no more than
		1547	* SVGA3D_MAX_VERTEX_ARRAYS;
		1548	* 2. SVGA3dPrimitiveRange, quantity 'numRanges', but no more than
		1549	* SVGA3D_MAX_DRAW_PRIMITIVE_RANGES;
		1550	* 3. Optionally, SVGA3dVertexDivisor, quantity 'numVertexDecls' (contains
		1551	* the frequency divisor for the corresponding vertex decl).
		1552	*/
		1553	} SVGA3dCmdDrawPrimitives; /* SVGA_3D_CMD_DRAWPRIMITIVES */
		1554
		1555	typedef
		1556	struct {
		1557	uint32 stage;
		1558	SVGA3dTextureStateName name;
		1559	union {
		1560	uint32 value;
		1561	float floatValue;
		1562	};
		1563	} SVGA3dTextureState;
		1564
		1565	typedef
		1566	struct {
		1567	uint32 cid;
		1568	/* Followed by variable number of SVGA3dTextureState structures */
		1569	} SVGA3dCmdSetTextureState; /* SVGA_3D_CMD_SETTEXTURESTATE */
		1570
		1571	typedef
		1572	struct {
		1573	uint32 cid;
		1574	SVGA3dTransformType type;
		1575	float matrix[16];
		1576	} SVGA3dCmdSetTransform; /* SVGA_3D_CMD_SETTRANSFORM */
		1577
		1578	typedef
		1579	struct {
		1580	float min;
		1581	float max;
		1582	} SVGA3dZRange;
		1583
		1584	typedef
		1585	struct {
		1586	uint32 cid;
		1587	SVGA3dZRange zRange;
		1588	} SVGA3dCmdSetZRange; /* SVGA_3D_CMD_SETZRANGE */
		1589
		1590	typedef
		1591	struct {
		1592	float diffuse[4];
		1593	float ambient[4];
		1594	float specular[4];
		1595	float emissive[4];
		1596	float shininess;
		1597	} SVGA3dMaterial;
		1598
		1599	typedef
		1600	struct {
		1601	uint32 cid;
		1602	SVGA3dFace face;
		1603	SVGA3dMaterial material;
		1604	} SVGA3dCmdSetMaterial; /* SVGA_3D_CMD_SETMATERIAL */
		1605
		1606	typedef
		1607	struct {
		1608	uint32 cid;
		1609	uint32 index;
		1610	SVGA3dLightData data;
		1611	} SVGA3dCmdSetLightData; /* SVGA_3D_CMD_SETLIGHTDATA */
		1612
		1613	typedef
		1614	struct {
		1615	uint32 cid;
		1616	uint32 index;
		1617	uint32 enabled;
		1618	} SVGA3dCmdSetLightEnabled; /* SVGA_3D_CMD_SETLIGHTENABLED */
		1619
		1620	typedef
		1621	struct {
		1622	uint32 cid;
		1623	SVGA3dRect rect;
		1624	} SVGA3dCmdSetViewport; /* SVGA_3D_CMD_SETVIEWPORT */
		1625
		1626	typedef
		1627	struct {
		1628	uint32 cid;
		1629	SVGA3dRect rect;
		1630	} SVGA3dCmdSetScissorRect; /* SVGA_3D_CMD_SETSCISSORRECT */
		1631
		1632	typedef
		1633	struct {
		1634	uint32 cid;
		1635	uint32 index;
		1636	float plane[4];
		1637	} SVGA3dCmdSetClipPlane; /* SVGA_3D_CMD_SETCLIPPLANE */
		1638
		1639	typedef
		1640	struct {
		1641	uint32 cid;
		1642	uint32 shid;
		1643	SVGA3dShaderType type;
		1644	/* Followed by variable number of DWORDs for shader bycode */
		1645	} SVGA3dCmdDefineShader; /* SVGA_3D_CMD_SHADER_DEFINE */
		1646
		1647	typedef
		1648	struct {
		1649	uint32 cid;
		1650	uint32 shid;
		1651	SVGA3dShaderType type;
		1652	} SVGA3dCmdDestroyShader; /* SVGA_3D_CMD_SHADER_DESTROY */
		1653
		1654	typedef
		1655	struct {
		1656	uint32 cid;
		1657	uint32 reg; /* register number */
		1658	SVGA3dShaderType type;
		1659	SVGA3dShaderConstType ctype;
		1660	uint32 values[4];
		1661	} SVGA3dCmdSetShaderConst; /* SVGA_3D_CMD_SET_SHADER_CONST */
		1662
		1663	typedef
		1664	struct {
		1665	uint32 cid;
		1666	SVGA3dShaderType type;
		1667	uint32 shid;
		1668	} SVGA3dCmdSetShader; /* SVGA_3D_CMD_SET_SHADER */
		1669
		1670	typedef
		1671	struct {
		1672	uint32 cid;
		1673	SVGA3dQueryType type;
		1674	} SVGA3dCmdBeginQuery; /* SVGA_3D_CMD_BEGIN_QUERY */
		1675
		1676	typedef
		1677	struct {
		1678	uint32 cid;
		1679	SVGA3dQueryType type;
		1680	SVGAGuestPtr guestResult; /* Points to an SVGA3dQueryResult structure */
		1681	} SVGA3dCmdEndQuery; /* SVGA_3D_CMD_END_QUERY */
		1682
		1683	typedef
		1684	struct {
		1685	uint32 cid; /* Same parameters passed to END_QUERY */
		1686	SVGA3dQueryType type;
		1687	SVGAGuestPtr guestResult;
		1688	} SVGA3dCmdWaitForQuery; /* SVGA_3D_CMD_WAIT_FOR_QUERY */
		1689
		1690	typedef
		1691	struct {
		1692	uint32 totalSize; /* Set by guest before query is ended. */
		1693	SVGA3dQueryState state; /* Set by host or guest. See SVGA3dQueryState. */
		1694	union { /* Set by host on exit from PENDING state */
		1695	uint32 result32;
		1696	};
		1697	} SVGA3dQueryResult;
		1698
		1699	/*
		1700	* SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN --
		1701	*
		1702	* This is a blit from an SVGA3D surface to a Screen Object. Just
		1703	* like GMR-to-screen blits, this blit may be directed at a
		1704	* specific screen or to the virtual coordinate space.
		1705	*
		1706	* The blit copies from a rectangular region of an SVGA3D surface
		1707	* image to a rectangular region of a screen or screens.
		1708	*
		1709	* This command takes an optional variable-length list of clipping
		1710	* rectangles after the body of the command. If no rectangles are
		1711	* specified, there is no clipping region. The entire destRect is
		1712	* drawn to. If one or more rectangles are included, they describe
		1713	* a clipping region. The clip rectangle coordinates are measured
		1714	* relative to the top-left corner of destRect.
		1715	*
		1716	* This clipping region serves multiple purposes:
		1717	*
		1718	* - It can be used to perform an irregularly shaped blit more
		1719	* efficiently than by issuing many separate blit commands.
		1720	*
		1721	* - It is equivalent to allowing blits with non-integer
		1722	* source coordinates. You could blit just one half-pixel
		1723	* of a source, for example, by specifying a larger
		1724	* destination rectangle than you need, then removing
		1725	* part of it using a clip rectangle.
		1726	*
		1727	* Availability:
		1728	* SVGA_FIFO_CAP_SCREEN_OBJECT
		1729	*
		1730	* Limitations:
		1731	*
		1732	* - Currently, no backend supports blits from a mipmap or face
		1733	* other than the first one.
		1734	*/
		1735
		1736	typedef
		1737	struct {
		1738	SVGA3dSurfaceImageId srcImage;
		1739	SVGASignedRect srcRect;
		1740	uint32 destScreenId; /* Screen ID or SVGA_ID_INVALID for virt. coords */
		1741	SVGASignedRect destRect; /* Supports scaling if src/rest different size */
		1742	/* Clipping: zero or more SVGASignedRects follow */
		1743	} SVGA3dCmdBlitSurfaceToScreen; /* SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN */
		1744
		1745	typedef
		1746	struct {
		1747	uint32 sid;
		1748	SVGA3dTextureFilter filter;
		1749	} SVGA3dCmdGenerateMipmaps; /* SVGA_3D_CMD_GENERATE_MIPMAPS */
		1750
		1751
		1752	/*
		1753	* Capability query index.
		1754	*
		1755	* Notes:
		1756	*
		1757	* 1. SVGA3D_DEVCAP_MAX_TEXTURES reflects the maximum number of
		1758	* fixed-function texture units available. Each of these units
		1759	* work in both FFP and Shader modes, and they support texture
		1760	* transforms and texture coordinates. The host may have additional
		1761	* texture image units that are only usable with shaders.
		1762	*
		1763	* 2. The BUFFER_FORMAT capabilities are deprecated, and they always
		1764	* return TRUE. Even on physical hardware that does not support
		1765	* these formats natively, the SVGA3D device will provide an emulation
		1766	* which should be invisible to the guest OS.
		1767	*
		1768	* In general, the SVGA3D device should support any operation on
		1769	* any surface format, it just may perform some of these
		1770	* operations in software depending on the capabilities of the
		1771	* available physical hardware.
		1772	*
		1773	* XXX: In the future, we will add capabilities that describe in
		1774	* detail what formats are supported in hardware for what kinds
		1775	* of operations.
		1776	*/
		1777
		1778	typedef enum {
		1779	SVGA3D_DEVCAP_3D = 0,
		1780	SVGA3D_DEVCAP_MAX_LIGHTS = 1,
		1781	SVGA3D_DEVCAP_MAX_TEXTURES = 2, /* See note (1) */
		1782	SVGA3D_DEVCAP_MAX_CLIP_PLANES = 3,
		1783	SVGA3D_DEVCAP_VERTEX_SHADER_VERSION = 4,
		1784	SVGA3D_DEVCAP_VERTEX_SHADER = 5,
		1785	SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION = 6,
		1786	SVGA3D_DEVCAP_FRAGMENT_SHADER = 7,
		1787	SVGA3D_DEVCAP_MAX_RENDER_TARGETS = 8,
		1788	SVGA3D_DEVCAP_S23E8_TEXTURES = 9,
		1789	SVGA3D_DEVCAP_S10E5_TEXTURES = 10,
		1790	SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND = 11,
		1791	SVGA3D_DEVCAP_D16_BUFFER_FORMAT = 12, /* See note (2) */
		1792	SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT = 13, /* See note (2) */
		1793	SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT = 14, /* See note (2) */
		1794	SVGA3D_DEVCAP_QUERY_TYPES = 15,
		1795	SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING = 16,
		1796	SVGA3D_DEVCAP_MAX_POINT_SIZE = 17,
		1797	SVGA3D_DEVCAP_MAX_SHADER_TEXTURES = 18,
		1798	SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH = 19,
		1799	SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT = 20,
		1800	SVGA3D_DEVCAP_MAX_VOLUME_EXTENT = 21,
		1801	SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT = 22,
		1802	SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO = 23,
		1803	SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY = 24,
		1804	SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT = 25,
		1805	SVGA3D_DEVCAP_MAX_VERTEX_INDEX = 26,
		1806	SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS = 27,
		1807	SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS = 28,
		1808	SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS = 29,
		1809	SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS = 30,
		1810	SVGA3D_DEVCAP_TEXTURE_OPS = 31,
		1811	SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8 = 32,
		1812	SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8 = 33,
		1813	SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10 = 34,
		1814	SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5 = 35,
		1815	SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5 = 36,
		1816	SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4 = 37,
		1817	SVGA3D_DEVCAP_SURFACEFMT_R5G6B5 = 38,
		1818	SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16 = 39,
		1819	SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8 = 40,
		1820	SVGA3D_DEVCAP_SURFACEFMT_ALPHA8 = 41,
		1821	SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8 = 42,
		1822	SVGA3D_DEVCAP_SURFACEFMT_Z_D16 = 43,
		1823	SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8 = 44,
		1824	SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8 = 45,
		1825	SVGA3D_DEVCAP_SURFACEFMT_DXT1 = 46,
		1826	SVGA3D_DEVCAP_SURFACEFMT_DXT2 = 47,
		1827	SVGA3D_DEVCAP_SURFACEFMT_DXT3 = 48,
		1828	SVGA3D_DEVCAP_SURFACEFMT_DXT4 = 49,
		1829	SVGA3D_DEVCAP_SURFACEFMT_DXT5 = 50,
		1830	SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8 = 51,
		1831	SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10 = 52,
		1832	SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8 = 53,
		1833	SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8 = 54,
		1834	SVGA3D_DEVCAP_SURFACEFMT_CxV8U8 = 55,
		1835	SVGA3D_DEVCAP_SURFACEFMT_R_S10E5 = 56,
		1836	SVGA3D_DEVCAP_SURFACEFMT_R_S23E8 = 57,
		1837	SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5 = 58,
		1838	SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8 = 59,
		1839	SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5 = 60,
		1840	SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8 = 61,
		1841	SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES = 63,
		1842
		1843	/*
		1844	* Note that MAX_SIMULTANEOUS_RENDER_TARGETS is a maximum count of color
		1845	* render targets. This does no include the depth or stencil targets.
		1846	*/
		1847	SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS = 64,
		1848
		1849	SVGA3D_DEVCAP_SURFACEFMT_V16U16 = 65,
		1850	SVGA3D_DEVCAP_SURFACEFMT_G16R16 = 66,
		1851	SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16 = 67,
		1852	SVGA3D_DEVCAP_SURFACEFMT_UYVY = 68,
		1853	SVGA3D_DEVCAP_SURFACEFMT_YUY2 = 69,
		1854	SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES = 70,
		1855	SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES = 71,
		1856	SVGA3D_DEVCAP_ALPHATOCOVERAGE = 72,
		1857	SVGA3D_DEVCAP_SUPERSAMPLE = 73,
		1858	SVGA3D_DEVCAP_AUTOGENMIPMAPS = 74,
		1859	SVGA3D_DEVCAP_SURFACEFMT_NV12 = 75,
		1860	SVGA3D_DEVCAP_SURFACEFMT_AYUV = 76,
		1861
		1862	/*
		1863	* This is the maximum number of SVGA context IDs that the guest
		1864	* can define using SVGA_3D_CMD_CONTEXT_DEFINE.
		1865	*/
		1866	SVGA3D_DEVCAP_MAX_CONTEXT_IDS = 77,
		1867
		1868	/*
		1869	* This is the maximum number of SVGA surface IDs that the guest
		1870	* can define using SVGA_3D_CMD_SURFACE_DEFINE*.
		1871	*/
		1872	SVGA3D_DEVCAP_MAX_SURFACE_IDS = 78,
		1873
		1874	SVGA3D_DEVCAP_SURFACEFMT_Z_DF16 = 79,
		1875	SVGA3D_DEVCAP_SURFACEFMT_Z_DF24 = 80,
		1876	SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT = 81,
		1877
		1878	SVGA3D_DEVCAP_SURFACEFMT_BC4_UNORM = 82,
		1879	SVGA3D_DEVCAP_SURFACEFMT_BC5_UNORM = 83,
		1880
		1881	/*
		1882	* Don't add new caps into the previous section; the values in this
		1883	* enumeration must not change. You can put new values right before
		1884	* SVGA3D_DEVCAP_MAX.
		1885	*/
		1886	SVGA3D_DEVCAP_MAX /* This must be the last index. */
		1887	} SVGA3dDevCapIndex;
		1888
		1889	typedef union {
		1890	Bool b;
		1891	uint32 u;
		1892	int32 i;
		1893	float f;
		1894	} SVGA3dDevCapResult;
		1895
		1896	#endif /* _SVGA3D_REG_H_ */

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(root)/drivers/video/drm/vmwgfx/svga3d_reg.h – Rev 4111