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5078 | serge | 1 | /* |
2 | * Copyright 2012 Advanced Micro Devices, Inc. |
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3 | * |
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4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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5 | * copy of this software and associated documentation files (the "Software"), |
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6 | * to deal in the Software without restriction, including without limitation |
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7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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8 | * and/or sell copies of the Software, and to permit persons to whom the |
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9 | * Software is furnished to do so, subject to the following conditions: |
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10 | * |
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11 | * The above copyright notice and this permission notice shall be included in |
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12 | * all copies or substantial portions of the Software. |
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13 | * |
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14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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20 | * OTHER DEALINGS IN THE SOFTWARE. |
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21 | * |
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22 | */ |
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23 | #ifndef __TRINITY_DPM_H__ |
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24 | #define __TRINITY_DPM_H__ |
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25 | |||
26 | #include "sumo_dpm.h" |
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27 | |||
28 | #define TRINITY_SIZEOF_DPM_STATE_TABLE (SMU_SCLK_DPM_STATE_1_CNTL_0 - SMU_SCLK_DPM_STATE_0_CNTL_0) |
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29 | |||
30 | struct trinity_pl { |
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31 | u32 sclk; |
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32 | u8 vddc_index; |
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33 | u8 ds_divider_index; |
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34 | u8 ss_divider_index; |
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35 | u8 allow_gnb_slow; |
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36 | u8 force_nbp_state; |
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37 | u8 display_wm; |
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38 | u8 vce_wm; |
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39 | }; |
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40 | |||
41 | #define TRINITY_POWERSTATE_FLAGS_NBPS_FORCEHIGH (1 << 0) |
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42 | #define TRINITY_POWERSTATE_FLAGS_NBPS_LOCKTOHIGH (1 << 1) |
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43 | #define TRINITY_POWERSTATE_FLAGS_NBPS_LOCKTOLOW (1 << 2) |
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44 | |||
45 | #define TRINITY_POWERSTATE_FLAGS_BAPM_DISABLE (1 << 0) |
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46 | |||
47 | struct trinity_ps { |
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48 | u32 num_levels; |
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49 | struct trinity_pl levels[SUMO_MAX_HARDWARE_POWERLEVELS]; |
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50 | |||
51 | u32 nbps_flags; |
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52 | u32 bapm_flags; |
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53 | |||
54 | u8 Dpm0PgNbPsLo; |
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55 | u8 Dpm0PgNbPsHi; |
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56 | u8 DpmXNbPsLo; |
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57 | u8 DpmXNbPsHi; |
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58 | |||
59 | u32 vclk_low_divider; |
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60 | u32 vclk_high_divider; |
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61 | u32 dclk_low_divider; |
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62 | u32 dclk_high_divider; |
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63 | }; |
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64 | |||
65 | #define TRINITY_NUM_NBPSTATES 4 |
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66 | |||
67 | struct trinity_uvd_clock_table_entry |
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68 | { |
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69 | u32 vclk; |
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70 | u32 dclk; |
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71 | u8 vclk_did; |
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72 | u8 dclk_did; |
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73 | u8 rsv[2]; |
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74 | }; |
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75 | |||
76 | struct trinity_sys_info { |
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77 | u32 bootup_uma_clk; |
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78 | u32 bootup_sclk; |
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79 | u32 min_sclk; |
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80 | u32 dentist_vco_freq; |
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81 | u32 nb_dpm_enable; |
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82 | u32 nbp_mclk[TRINITY_NUM_NBPSTATES]; |
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83 | u32 nbp_nclk[TRINITY_NUM_NBPSTATES]; |
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84 | u16 nbp_voltage_index[TRINITY_NUM_NBPSTATES]; |
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85 | u16 bootup_nb_voltage_index; |
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86 | u8 htc_tmp_lmt; |
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87 | u8 htc_hyst_lmt; |
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88 | struct sumo_sclk_voltage_mapping_table sclk_voltage_mapping_table; |
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89 | struct sumo_vid_mapping_table vid_mapping_table; |
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90 | u32 uma_channel_number; |
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91 | struct trinity_uvd_clock_table_entry uvd_clock_table_entries[4]; |
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92 | }; |
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93 | |||
94 | struct trinity_power_info { |
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95 | u32 at[SUMO_MAX_HARDWARE_POWERLEVELS]; |
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96 | u32 dpm_interval; |
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97 | u32 thermal_auto_throttling; |
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98 | struct trinity_sys_info sys_info; |
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99 | struct trinity_pl boot_pl; |
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100 | u32 min_sclk_did; |
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101 | bool enable_nbps_policy; |
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102 | bool voltage_drop_in_dce; |
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103 | bool override_dynamic_mgpg; |
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104 | bool enable_gfx_clock_gating; |
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105 | bool enable_gfx_power_gating; |
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106 | bool enable_mg_clock_gating; |
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107 | bool enable_gfx_dynamic_mgpg; |
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108 | bool enable_auto_thermal_throttling; |
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109 | bool enable_dpm; |
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110 | bool enable_sclk_ds; |
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111 | bool enable_bapm; |
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112 | bool uvd_dpm; |
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113 | struct radeon_ps current_rps; |
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114 | struct trinity_ps current_ps; |
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115 | struct radeon_ps requested_rps; |
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116 | struct trinity_ps requested_ps; |
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117 | }; |
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118 | |||
119 | #define TRINITY_AT_DFLT 30 |
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120 | |||
121 | /* trinity_smc.c */ |
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122 | int trinity_dpm_bapm_enable(struct radeon_device *rdev, bool enable); |
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123 | int trinity_dpm_config(struct radeon_device *rdev, bool enable); |
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124 | int trinity_uvd_dpm_config(struct radeon_device *rdev); |
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125 | int trinity_dpm_force_state(struct radeon_device *rdev, u32 n); |
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126 | int trinity_dpm_n_levels_disabled(struct radeon_device *rdev, u32 n); |
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127 | int trinity_dpm_no_forced_level(struct radeon_device *rdev); |
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128 | int trinity_dce_enable_voltage_adjustment(struct radeon_device *rdev, |
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129 | bool enable); |
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130 | int trinity_gfx_dynamic_mgpg_config(struct radeon_device *rdev); |
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131 | void trinity_acquire_mutex(struct radeon_device *rdev); |
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132 | void trinity_release_mutex(struct radeon_device *rdev); |
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133 | |||
134 | #endif><>><>><>><> |