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1221 serge 1
 
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#include 
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#include 
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#include "radeon_drm.h"
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#include "radeon.h"
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#include "radeon_object.h"
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#include "display.h"
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static void       __stdcall move_cursor(cursor_t *cursor, int x, int y);
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{};
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{
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    struct radeon_device *rdev;
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    uint32_t *src;
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    int       r;
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                     false,
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                     RADEON_GEM_DOMAIN_VRAM,
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                     false, &cursor->robj);
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        return r;
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    if (r) {
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         DRM_ERROR("radeon: failed to map cursor (%d).\n", r);
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         return r;
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    };
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    {
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        for(j = 0; j < 32; j++)
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            *bits++ = *src++;
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        for(j = 32; j < CURSOR_WIDTH; j++)
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            *bits++ = 0;
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    }
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    for(i = 0; i < CURSOR_WIDTH*(CURSOR_HEIGHT-32); i++)
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        *bits++ = 0;
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};
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{
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    list_del(&cursor->list);
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    radeon_object_unpin(cursor->robj);
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    KernelFree(cursor->data);
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    __DestroyObject(cursor);
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};
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{
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    struct radeon_device *rdev = (struct radeon_device *)rdisplay->ddev->dev_private;
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        WREG32(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL);
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        WREG32(RADEON_MM_DATA, AVIVO_D1CURSOR_EN |
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                 (AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT));
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    } else {
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        WREG32(RADEON_MM_INDEX, RADEON_CRTC_GEN_CNTL);
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        WREG32_P(RADEON_MM_DATA, (RADEON_CRTC_CUR_EN |
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                      (RADEON_CRTC_CUR_MODE_24BPP << RADEON_CRTC_CUR_MODE_SHIFT)),
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             ~(RADEON_CRTC_CUR_EN | RADEON_CRTC_CUR_MODE_MASK));
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    }
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}
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{
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    struct radeon_device *rdev;
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    cursor_t *old;
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    uint32_t  gpu_addr;
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 //   gpu_addr = cursor->robj->gpu_addr;
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        WREG32(AVIVO_D1CUR_SURFACE_ADDRESS,  gpu_addr);
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    else {
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        WREG32(RADEON_CUR_OFFSET, gpu_addr - rdev->mc.vram_location);
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    }
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};
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{
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    struct radeon_device *rdev;
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        cur_lock = RREG32(AVIVO_D1CUR_UPDATE);
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        if (lock)
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            cur_lock |= AVIVO_D1CURSOR_UPDATE_LOCK;
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        else
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            cur_lock &= ~AVIVO_D1CURSOR_UPDATE_LOCK;
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        WREG32(AVIVO_D1CUR_UPDATE, cur_lock);
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    } else {
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        cur_lock = RREG32(RADEON_CUR_OFFSET);
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        if (lock)
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            cur_lock |= RADEON_CUR_LOCK;
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        else
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            cur_lock &= ~RADEON_CUR_LOCK;
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        WREG32(RADEON_CUR_OFFSET, cur_lock);
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    }
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}
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{
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    struct radeon_device *rdev;
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    rdev = (struct radeon_device *)rdisplay->ddev->dev_private;
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    int hot_y = cursor->hot_y;
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    if (ASIC_IS_AVIVO(rdev))
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    {
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        int w = 32;
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        int i = 0;
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        WREG32(AVIVO_D1CUR_HOT_SPOT, (hot_x << 16) | hot_y);
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        WREG32(AVIVO_D1CUR_SIZE, ((w - 1) << 16) | 31);
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    } else {
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        uint32_t  gpu_addr;
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               (RADEON_CUR_LOCK | (hot_x << 16) | hot_y ));
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        WREG32(RADEON_CUR_HORZ_VERT_POSN,
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               (RADEON_CUR_LOCK | (x << 16) | y));
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        WREG32(RADEON_CUR_OFFSET,
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         (gpu_addr - rdev->mc.vram_location + (hot_y * 256)));
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    }
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    radeon_lock_cursor(false);
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}
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{
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};
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1239 serge 179
{
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    struct drm_device   *dev;
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    bool                 retval = true;
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    u32_t                ifl;
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    {
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        list_for_each_entry(cursor, &rdisplay->cursors, list)
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        {
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            init_cursor(cursor);
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        };
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        rdisplay->init_cursor    = init_cursor;
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        rdisplay->select_cursor  = select_cursor;
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        rdisplay->show_cursor    = NULL;
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        rdisplay->move_cursor    = move_cursor;
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        rdisplay->restore_cursor = restore_cursor;
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        rdisplay->disable_mouse  = disable_mouse;
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        radeon_show_cursor();
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    };
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    safe_sti(ifl);
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};
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