Rev 5271 | Go to most recent revision | Details | Last modification | View Log | RSS feed
| Rev | Author | Line No. | Line |
|---|---|---|---|
| 5078 | serge | 1 | /* |
| 2 | * Copyright 2009 VMware, Inc. |
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| 3 | * |
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| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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| 5 | * copy of this software and associated documentation files (the "Software"), |
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| 6 | * to deal in the Software without restriction, including without limitation |
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| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
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| 9 | * Software is furnished to do so, subject to the following conditions: |
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| 10 | * |
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| 11 | * The above copyright notice and this permission notice shall be included in |
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| 12 | * all copies or substantial portions of the Software. |
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| 13 | * |
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| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
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| 21 | * |
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| 22 | * Authors: Michel Dänzer |
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| 23 | */ |
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| 24 | #include |
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| 25 | #include |
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| 26 | #include "radeon_reg.h" |
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| 27 | #include "radeon.h" |
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| 28 | |||
| 29 | #define RADEON_TEST_COPY_BLIT 1 |
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| 30 | #define RADEON_TEST_COPY_DMA 0 |
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| 31 | |||
| 32 | |||
| 33 | /* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */ |
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| 34 | static void radeon_do_test_moves(struct radeon_device *rdev, int flag) |
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| 35 | { |
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| 36 | struct radeon_bo *vram_obj = NULL; |
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| 37 | struct radeon_bo **gtt_obj = NULL; |
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| 38 | uint64_t gtt_addr, vram_addr; |
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| 39 | unsigned n, size; |
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| 40 | int i, r, ring; |
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| 41 | |||
| 42 | switch (flag) { |
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| 43 | case RADEON_TEST_COPY_DMA: |
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| 44 | ring = radeon_copy_dma_ring_index(rdev); |
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| 45 | break; |
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| 46 | case RADEON_TEST_COPY_BLIT: |
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| 47 | ring = radeon_copy_blit_ring_index(rdev); |
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| 48 | break; |
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| 49 | default: |
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| 50 | DRM_ERROR("Unknown copy method\n"); |
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| 51 | return; |
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| 52 | } |
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| 53 | |||
| 54 | size = 1024 * 1024; |
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| 55 | |||
| 56 | /* Number of tests = |
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| 57 | * (Total GTT - IB pool - writeback page - ring buffers) / test size |
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| 58 | */ |
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| 59 | n = rdev->mc.gtt_size - rdev->gart_pin_size; |
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| 60 | n /= size; |
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| 61 | |||
| 62 | gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL); |
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| 63 | if (!gtt_obj) { |
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| 64 | DRM_ERROR("Failed to allocate %d pointers\n", n); |
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| 65 | r = 1; |
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| 66 | goto out_cleanup; |
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| 67 | } |
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| 68 | |||
| 69 | r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM, |
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| 70 | 0, NULL, &vram_obj); |
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| 71 | if (r) { |
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| 72 | DRM_ERROR("Failed to create VRAM object\n"); |
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| 73 | goto out_cleanup; |
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| 74 | } |
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| 75 | r = radeon_bo_reserve(vram_obj, false); |
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| 76 | if (unlikely(r != 0)) |
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| 77 | goto out_unref; |
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| 78 | r = radeon_bo_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr); |
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| 79 | if (r) { |
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| 80 | DRM_ERROR("Failed to pin VRAM object\n"); |
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| 81 | goto out_unres; |
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| 82 | } |
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| 83 | for (i = 0; i < n; i++) { |
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| 84 | void *gtt_map, *vram_map; |
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| 85 | void **gtt_start, **gtt_end; |
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| 86 | void **vram_start, **vram_end; |
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| 87 | struct radeon_fence *fence = NULL; |
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| 88 | |||
| 89 | r = radeon_bo_create(rdev, size, PAGE_SIZE, true, |
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| 90 | RADEON_GEM_DOMAIN_GTT, 0, NULL, gtt_obj + i); |
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| 91 | if (r) { |
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| 92 | DRM_ERROR("Failed to create GTT object %d\n", i); |
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| 93 | goto out_lclean; |
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| 94 | } |
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| 95 | |||
| 96 | r = radeon_bo_reserve(gtt_obj[i], false); |
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| 97 | if (unlikely(r != 0)) |
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| 98 | goto out_lclean_unref; |
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| 99 | r = radeon_bo_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, >t_addr); |
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| 100 | if (r) { |
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| 101 | DRM_ERROR("Failed to pin GTT object %d\n", i); |
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| 102 | goto out_lclean_unres; |
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| 103 | } |
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| 104 | |||
| 105 | r = radeon_bo_kmap(gtt_obj[i], >t_map); |
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| 106 | if (r) { |
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| 107 | DRM_ERROR("Failed to map GTT object %d\n", i); |
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| 108 | goto out_lclean_unpin; |
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| 109 | } |
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| 110 | |||
| 111 | for (gtt_start = gtt_map, gtt_end = gtt_map + size; |
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| 112 | gtt_start < gtt_end; |
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| 113 | gtt_start++) |
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| 114 | *gtt_start = gtt_start; |
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| 115 | |||
| 116 | radeon_bo_kunmap(gtt_obj[i]); |
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| 117 | |||
| 118 | if (ring == R600_RING_TYPE_DMA_INDEX) |
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| 119 | r = radeon_copy_dma(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, &fence); |
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| 120 | else |
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| 121 | r = radeon_copy_blit(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, &fence); |
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| 122 | if (r) { |
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| 123 | DRM_ERROR("Failed GTT->VRAM copy %d\n", i); |
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| 124 | goto out_lclean_unpin; |
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| 125 | } |
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| 126 | |||
| 127 | r = radeon_fence_wait(fence, false); |
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| 128 | if (r) { |
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| 129 | DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i); |
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| 130 | goto out_lclean_unpin; |
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| 131 | } |
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| 132 | |||
| 133 | radeon_fence_unref(&fence); |
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| 134 | |||
| 135 | r = radeon_bo_kmap(vram_obj, &vram_map); |
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| 136 | if (r) { |
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| 137 | DRM_ERROR("Failed to map VRAM object after copy %d\n", i); |
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| 138 | goto out_lclean_unpin; |
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| 139 | } |
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| 140 | |||
| 141 | for (gtt_start = gtt_map, gtt_end = gtt_map + size, |
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| 142 | vram_start = vram_map, vram_end = vram_map + size; |
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| 143 | vram_start < vram_end; |
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| 144 | gtt_start++, vram_start++) { |
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| 145 | if (*vram_start != gtt_start) { |
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| 146 | DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, " |
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| 147 | "expected 0x%p (GTT/VRAM offset " |
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| 148 | "0x%16llx/0x%16llx)\n", |
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| 149 | i, *vram_start, gtt_start, |
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| 150 | (unsigned long long) |
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| 151 | (gtt_addr - rdev->mc.gtt_start + |
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| 152 | (void*)gtt_start - gtt_map), |
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| 153 | (unsigned long long) |
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| 154 | (vram_addr - rdev->mc.vram_start + |
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| 155 | (void*)gtt_start - gtt_map)); |
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| 156 | radeon_bo_kunmap(vram_obj); |
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| 157 | goto out_lclean_unpin; |
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| 158 | } |
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| 159 | *vram_start = vram_start; |
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| 160 | } |
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| 161 | |||
| 162 | radeon_bo_kunmap(vram_obj); |
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| 163 | |||
| 164 | if (ring == R600_RING_TYPE_DMA_INDEX) |
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| 165 | r = radeon_copy_dma(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, &fence); |
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| 166 | else |
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| 167 | r = radeon_copy_blit(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, &fence); |
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| 168 | if (r) { |
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| 169 | DRM_ERROR("Failed VRAM->GTT copy %d\n", i); |
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| 170 | goto out_lclean_unpin; |
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| 171 | } |
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| 172 | |||
| 173 | r = radeon_fence_wait(fence, false); |
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| 174 | if (r) { |
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| 175 | DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i); |
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| 176 | goto out_lclean_unpin; |
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| 177 | } |
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| 178 | |||
| 179 | radeon_fence_unref(&fence); |
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| 180 | |||
| 181 | r = radeon_bo_kmap(gtt_obj[i], >t_map); |
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| 182 | if (r) { |
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| 183 | DRM_ERROR("Failed to map GTT object after copy %d\n", i); |
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| 184 | goto out_lclean_unpin; |
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| 185 | } |
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| 186 | |||
| 187 | for (gtt_start = gtt_map, gtt_end = gtt_map + size, |
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| 188 | vram_start = vram_map, vram_end = vram_map + size; |
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| 189 | gtt_start < gtt_end; |
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| 190 | gtt_start++, vram_start++) { |
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| 191 | if (*gtt_start != vram_start) { |
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| 192 | DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, " |
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| 193 | "expected 0x%p (VRAM/GTT offset " |
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| 194 | "0x%16llx/0x%16llx)\n", |
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| 195 | i, *gtt_start, vram_start, |
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| 196 | (unsigned long long) |
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| 197 | (vram_addr - rdev->mc.vram_start + |
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| 198 | (void*)vram_start - vram_map), |
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| 199 | (unsigned long long) |
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| 200 | (gtt_addr - rdev->mc.gtt_start + |
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| 201 | (void*)vram_start - vram_map)); |
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| 202 | radeon_bo_kunmap(gtt_obj[i]); |
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| 203 | goto out_lclean_unpin; |
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| 204 | } |
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| 205 | } |
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| 206 | |||
| 207 | radeon_bo_kunmap(gtt_obj[i]); |
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| 208 | |||
| 209 | DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n", |
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| 210 | gtt_addr - rdev->mc.gtt_start); |
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| 211 | continue; |
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| 212 | |||
| 213 | out_lclean_unpin: |
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| 214 | radeon_bo_unpin(gtt_obj[i]); |
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| 215 | out_lclean_unres: |
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| 216 | radeon_bo_unreserve(gtt_obj[i]); |
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| 217 | out_lclean_unref: |
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| 218 | radeon_bo_unref(>t_obj[i]); |
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| 219 | out_lclean: |
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| 220 | for (--i; i >= 0; --i) { |
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| 221 | radeon_bo_unpin(gtt_obj[i]); |
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| 222 | radeon_bo_unreserve(gtt_obj[i]); |
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| 223 | radeon_bo_unref(>t_obj[i]); |
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| 224 | } |
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| 225 | if (fence) |
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| 226 | radeon_fence_unref(&fence); |
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| 227 | break; |
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| 228 | } |
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| 229 | |||
| 230 | radeon_bo_unpin(vram_obj); |
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| 231 | out_unres: |
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| 232 | radeon_bo_unreserve(vram_obj); |
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| 233 | out_unref: |
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| 234 | radeon_bo_unref(&vram_obj); |
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| 235 | out_cleanup: |
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| 236 | kfree(gtt_obj); |
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| 237 | if (r) { |
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| 238 | printk(KERN_WARNING "Error while testing BO move.\n"); |
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| 239 | } |
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| 240 | } |
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| 241 | |||
| 242 | void radeon_test_moves(struct radeon_device *rdev) |
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| 243 | { |
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| 244 | if (rdev->asic->copy.dma) |
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| 245 | radeon_do_test_moves(rdev, RADEON_TEST_COPY_DMA); |
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| 246 | if (rdev->asic->copy.blit) |
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| 247 | radeon_do_test_moves(rdev, RADEON_TEST_COPY_BLIT); |
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| 248 | } |
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| 249 | |||
| 250 | static int radeon_test_create_and_emit_fence(struct radeon_device *rdev, |
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| 251 | struct radeon_ring *ring, |
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| 252 | struct radeon_fence **fence) |
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| 253 | { |
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| 254 | uint32_t handle = ring->idx ^ 0xdeafbeef; |
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| 255 | int r; |
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| 256 | |||
| 257 | if (ring->idx == R600_RING_TYPE_UVD_INDEX) { |
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| 258 | #if 0 |
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| 259 | r = radeon_uvd_get_create_msg(rdev, ring->idx, handle, NULL); |
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| 260 | if (r) { |
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| 261 | DRM_ERROR("Failed to get dummy create msg\n"); |
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| 262 | return r; |
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| 263 | } |
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| 264 | |||
| 265 | r = radeon_uvd_get_destroy_msg(rdev, ring->idx, handle, fence); |
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| 266 | if (r) { |
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| 267 | DRM_ERROR("Failed to get dummy destroy msg\n"); |
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| 268 | return r; |
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| 269 | } |
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| 270 | #endif |
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| 271 | } else if (ring->idx == TN_RING_TYPE_VCE1_INDEX || |
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| 272 | ring->idx == TN_RING_TYPE_VCE2_INDEX) { |
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| 273 | #if 0 |
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| 274 | r = radeon_vce_get_create_msg(rdev, ring->idx, handle, NULL); |
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| 275 | if (r) { |
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| 276 | DRM_ERROR("Failed to get dummy create msg\n"); |
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| 277 | return r; |
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| 278 | } |
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| 279 | |||
| 280 | r = radeon_vce_get_destroy_msg(rdev, ring->idx, handle, fence); |
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| 281 | if (r) { |
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| 282 | DRM_ERROR("Failed to get dummy destroy msg\n"); |
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| 283 | return r; |
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| 284 | } |
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| 285 | #endif |
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| 286 | } else { |
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| 287 | r = radeon_ring_lock(rdev, ring, 64); |
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| 288 | if (r) { |
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| 289 | DRM_ERROR("Failed to lock ring A %d\n", ring->idx); |
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| 290 | return r; |
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| 291 | } |
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| 292 | radeon_fence_emit(rdev, fence, ring->idx); |
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| 293 | radeon_ring_unlock_commit(rdev, ring, false); |
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| 294 | } |
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| 295 | return 0; |
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| 296 | } |
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| 297 | |||
| 298 | void radeon_test_ring_sync(struct radeon_device *rdev, |
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| 299 | struct radeon_ring *ringA, |
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| 300 | struct radeon_ring *ringB) |
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| 301 | { |
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| 302 | struct radeon_fence *fence1 = NULL, *fence2 = NULL; |
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| 303 | struct radeon_semaphore *semaphore = NULL; |
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| 304 | int r; |
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| 305 | |||
| 306 | r = radeon_semaphore_create(rdev, &semaphore); |
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| 307 | if (r) { |
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| 308 | DRM_ERROR("Failed to create semaphore\n"); |
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| 309 | goto out_cleanup; |
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| 310 | } |
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| 311 | |||
| 312 | r = radeon_ring_lock(rdev, ringA, 64); |
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| 313 | if (r) { |
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| 314 | DRM_ERROR("Failed to lock ring A %d\n", ringA->idx); |
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| 315 | goto out_cleanup; |
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| 316 | } |
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| 317 | radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore); |
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| 318 | radeon_ring_unlock_commit(rdev, ringA, false); |
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| 319 | |||
| 320 | r = radeon_test_create_and_emit_fence(rdev, ringA, &fence1); |
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| 321 | if (r) |
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| 322 | goto out_cleanup; |
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| 323 | |||
| 324 | r = radeon_ring_lock(rdev, ringA, 64); |
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| 325 | if (r) { |
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| 326 | DRM_ERROR("Failed to lock ring A %d\n", ringA->idx); |
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| 327 | goto out_cleanup; |
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| 328 | } |
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| 329 | radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore); |
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| 330 | radeon_ring_unlock_commit(rdev, ringA, false); |
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| 331 | |||
| 332 | r = radeon_test_create_and_emit_fence(rdev, ringA, &fence2); |
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| 333 | if (r) |
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| 334 | goto out_cleanup; |
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| 335 | |||
| 336 | mdelay(1000); |
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| 337 | |||
| 338 | if (radeon_fence_signaled(fence1)) { |
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| 339 | DRM_ERROR("Fence 1 signaled without waiting for semaphore.\n"); |
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| 340 | goto out_cleanup; |
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| 341 | } |
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| 342 | |||
| 343 | r = radeon_ring_lock(rdev, ringB, 64); |
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| 344 | if (r) { |
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| 345 | DRM_ERROR("Failed to lock ring B %p\n", ringB); |
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| 346 | goto out_cleanup; |
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| 347 | } |
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| 348 | radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore); |
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| 349 | radeon_ring_unlock_commit(rdev, ringB, false); |
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| 350 | |||
| 351 | r = radeon_fence_wait(fence1, false); |
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| 352 | if (r) { |
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| 353 | DRM_ERROR("Failed to wait for sync fence 1\n"); |
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| 354 | goto out_cleanup; |
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| 355 | } |
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| 356 | |||
| 357 | mdelay(1000); |
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| 358 | |||
| 359 | if (radeon_fence_signaled(fence2)) { |
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| 360 | DRM_ERROR("Fence 2 signaled without waiting for semaphore.\n"); |
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| 361 | goto out_cleanup; |
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| 362 | } |
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| 363 | |||
| 364 | r = radeon_ring_lock(rdev, ringB, 64); |
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| 365 | if (r) { |
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| 366 | DRM_ERROR("Failed to lock ring B %p\n", ringB); |
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| 367 | goto out_cleanup; |
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| 368 | } |
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| 369 | radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore); |
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| 370 | radeon_ring_unlock_commit(rdev, ringB, false); |
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| 371 | |||
| 372 | r = radeon_fence_wait(fence2, false); |
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| 373 | if (r) { |
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| 374 | DRM_ERROR("Failed to wait for sync fence 1\n"); |
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| 375 | goto out_cleanup; |
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| 376 | } |
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| 377 | |||
| 378 | out_cleanup: |
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| 379 | radeon_semaphore_free(rdev, &semaphore, NULL); |
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| 380 | |||
| 381 | if (fence1) |
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| 382 | radeon_fence_unref(&fence1); |
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| 383 | |||
| 384 | if (fence2) |
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| 385 | radeon_fence_unref(&fence2); |
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| 386 | |||
| 387 | if (r) |
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| 388 | printk(KERN_WARNING "Error while testing ring sync (%d).\n", r); |
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| 389 | } |
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| 390 | |||
| 391 | static void radeon_test_ring_sync2(struct radeon_device *rdev, |
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| 392 | struct radeon_ring *ringA, |
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| 393 | struct radeon_ring *ringB, |
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| 394 | struct radeon_ring *ringC) |
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| 395 | { |
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| 396 | struct radeon_fence *fenceA = NULL, *fenceB = NULL; |
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| 397 | struct radeon_semaphore *semaphore = NULL; |
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| 398 | bool sigA, sigB; |
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| 399 | int i, r; |
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| 400 | |||
| 401 | r = radeon_semaphore_create(rdev, &semaphore); |
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| 402 | if (r) { |
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| 403 | DRM_ERROR("Failed to create semaphore\n"); |
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| 404 | goto out_cleanup; |
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| 405 | } |
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| 406 | |||
| 407 | r = radeon_ring_lock(rdev, ringA, 64); |
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| 408 | if (r) { |
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| 409 | DRM_ERROR("Failed to lock ring A %d\n", ringA->idx); |
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| 410 | goto out_cleanup; |
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| 411 | } |
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| 412 | radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore); |
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| 413 | radeon_ring_unlock_commit(rdev, ringA, false); |
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| 414 | |||
| 415 | r = radeon_test_create_and_emit_fence(rdev, ringA, &fenceA); |
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| 416 | if (r) |
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| 417 | goto out_cleanup; |
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| 418 | |||
| 419 | r = radeon_ring_lock(rdev, ringB, 64); |
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| 420 | if (r) { |
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| 421 | DRM_ERROR("Failed to lock ring B %d\n", ringB->idx); |
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| 422 | goto out_cleanup; |
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| 423 | } |
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| 424 | radeon_semaphore_emit_wait(rdev, ringB->idx, semaphore); |
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| 425 | radeon_ring_unlock_commit(rdev, ringB, false); |
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| 426 | r = radeon_test_create_and_emit_fence(rdev, ringB, &fenceB); |
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| 427 | if (r) |
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| 428 | goto out_cleanup; |
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| 429 | |||
| 430 | mdelay(1000); |
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| 431 | |||
| 432 | if (radeon_fence_signaled(fenceA)) { |
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| 433 | DRM_ERROR("Fence A signaled without waiting for semaphore.\n"); |
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| 434 | goto out_cleanup; |
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| 435 | } |
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| 436 | if (radeon_fence_signaled(fenceB)) { |
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| 437 | DRM_ERROR("Fence B signaled without waiting for semaphore.\n"); |
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| 438 | goto out_cleanup; |
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| 439 | } |
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| 440 | |||
| 441 | r = radeon_ring_lock(rdev, ringC, 64); |
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| 442 | if (r) { |
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| 443 | DRM_ERROR("Failed to lock ring B %p\n", ringC); |
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| 444 | goto out_cleanup; |
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| 445 | } |
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| 446 | radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore); |
||
| 447 | radeon_ring_unlock_commit(rdev, ringC, false); |
||
| 448 | |||
| 449 | for (i = 0; i < 30; ++i) { |
||
| 450 | mdelay(100); |
||
| 451 | sigA = radeon_fence_signaled(fenceA); |
||
| 452 | sigB = radeon_fence_signaled(fenceB); |
||
| 453 | if (sigA || sigB) |
||
| 454 | break; |
||
| 455 | } |
||
| 456 | |||
| 457 | if (!sigA && !sigB) { |
||
| 458 | DRM_ERROR("Neither fence A nor B has been signaled\n"); |
||
| 459 | goto out_cleanup; |
||
| 460 | } else if (sigA && sigB) { |
||
| 461 | DRM_ERROR("Both fence A and B has been signaled\n"); |
||
| 462 | goto out_cleanup; |
||
| 463 | } |
||
| 464 | |||
| 465 | DRM_INFO("Fence %c was first signaled\n", sigA ? 'A' : 'B'); |
||
| 466 | |||
| 467 | r = radeon_ring_lock(rdev, ringC, 64); |
||
| 468 | if (r) { |
||
| 469 | DRM_ERROR("Failed to lock ring B %p\n", ringC); |
||
| 470 | goto out_cleanup; |
||
| 471 | } |
||
| 472 | radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore); |
||
| 473 | radeon_ring_unlock_commit(rdev, ringC, false); |
||
| 474 | |||
| 475 | mdelay(1000); |
||
| 476 | |||
| 477 | r = radeon_fence_wait(fenceA, false); |
||
| 478 | if (r) { |
||
| 479 | DRM_ERROR("Failed to wait for sync fence A\n"); |
||
| 480 | goto out_cleanup; |
||
| 481 | } |
||
| 482 | r = radeon_fence_wait(fenceB, false); |
||
| 483 | if (r) { |
||
| 484 | DRM_ERROR("Failed to wait for sync fence B\n"); |
||
| 485 | goto out_cleanup; |
||
| 486 | } |
||
| 487 | |||
| 488 | out_cleanup: |
||
| 489 | radeon_semaphore_free(rdev, &semaphore, NULL); |
||
| 490 | |||
| 491 | if (fenceA) |
||
| 492 | radeon_fence_unref(&fenceA); |
||
| 493 | |||
| 494 | if (fenceB) |
||
| 495 | radeon_fence_unref(&fenceB); |
||
| 496 | |||
| 497 | if (r) |
||
| 498 | printk(KERN_WARNING "Error while testing ring sync (%d).\n", r); |
||
| 499 | } |
||
| 500 | |||
| 501 | static bool radeon_test_sync_possible(struct radeon_ring *ringA, |
||
| 502 | struct radeon_ring *ringB) |
||
| 503 | { |
||
| 504 | if (ringA->idx == TN_RING_TYPE_VCE2_INDEX && |
||
| 505 | ringB->idx == TN_RING_TYPE_VCE1_INDEX) |
||
| 506 | return false; |
||
| 507 | |||
| 508 | return true; |
||
| 509 | } |
||
| 510 | |||
| 511 | void radeon_test_syncing(struct radeon_device *rdev) |
||
| 512 | { |
||
| 513 | int i, j, k; |
||
| 514 | |||
| 515 | for (i = 1; i < RADEON_NUM_RINGS; ++i) { |
||
| 516 | struct radeon_ring *ringA = &rdev->ring[i]; |
||
| 517 | if (!ringA->ready) |
||
| 518 | continue; |
||
| 519 | |||
| 520 | for (j = 0; j < i; ++j) { |
||
| 521 | struct radeon_ring *ringB = &rdev->ring[j]; |
||
| 522 | if (!ringB->ready) |
||
| 523 | continue; |
||
| 524 | |||
| 525 | if (!radeon_test_sync_possible(ringA, ringB)) |
||
| 526 | continue; |
||
| 527 | |||
| 528 | DRM_INFO("Testing syncing between rings %d and %d...\n", i, j); |
||
| 529 | radeon_test_ring_sync(rdev, ringA, ringB); |
||
| 530 | |||
| 531 | DRM_INFO("Testing syncing between rings %d and %d...\n", j, i); |
||
| 532 | radeon_test_ring_sync(rdev, ringB, ringA); |
||
| 533 | |||
| 534 | for (k = 0; k < j; ++k) { |
||
| 535 | struct radeon_ring *ringC = &rdev->ring[k]; |
||
| 536 | if (!ringC->ready) |
||
| 537 | continue; |
||
| 538 | |||
| 539 | if (!radeon_test_sync_possible(ringA, ringC)) |
||
| 540 | continue; |
||
| 541 | |||
| 542 | if (!radeon_test_sync_possible(ringB, ringC)) |
||
| 543 | continue; |
||
| 544 | |||
| 545 | DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, j, k); |
||
| 546 | radeon_test_ring_sync2(rdev, ringA, ringB, ringC); |
||
| 547 | |||
| 548 | DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, k, j); |
||
| 549 | radeon_test_ring_sync2(rdev, ringA, ringC, ringB); |
||
| 550 | |||
| 551 | DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, i, k); |
||
| 552 | radeon_test_ring_sync2(rdev, ringB, ringA, ringC); |
||
| 553 | |||
| 554 | DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, k, i); |
||
| 555 | radeon_test_ring_sync2(rdev, ringB, ringC, ringA); |
||
| 556 | |||
| 557 | DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, i, j); |
||
| 558 | radeon_test_ring_sync2(rdev, ringC, ringA, ringB); |
||
| 559 | |||
| 560 | DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, j, i); |
||
| 561 | radeon_test_ring_sync2(rdev, ringC, ringB, ringA); |
||
| 562 | } |
||
| 563 | } |
||
| 564 | } |
||
| 565 | } |