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| Rev | Author | Line No. | Line |
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| 1126 | serge | 1 | /* |
| 2 | * Copyright 2008 Advanced Micro Devices, Inc. |
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| 3 | * Copyright 2008 Red Hat Inc. |
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| 4 | * Copyright 2009 Jerome Glisse. |
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| 5 | * |
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| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
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| 7 | * copy of this software and associated documentation files (the "Software"), |
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| 8 | * to deal in the Software without restriction, including without limitation |
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| 9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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| 10 | * and/or sell copies of the Software, and to permit persons to whom the |
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| 11 | * Software is furnished to do so, subject to the following conditions: |
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| 12 | * |
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| 13 | * The above copyright notice and this permission notice shall be included in |
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| 14 | * all copies or substantial portions of the Software. |
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| 15 | * |
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| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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| 19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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| 20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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| 21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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| 22 | * OTHER DEALINGS IN THE SOFTWARE. |
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| 23 | * |
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| 24 | * Authors: Dave Airlie |
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| 25 | * Alex Deucher |
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| 26 | * Jerome Glisse |
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| 27 | */ |
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| 28 | #ifndef __RADEON_OBJECT_H__ |
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| 29 | #define __RADEON_OBJECT_H__ |
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| 30 | |||
| 1321 | serge | 31 | #include |
| 32 | #include "radeon.h" |
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| 1126 | serge | 33 | |
| 1321 | serge | 34 | /** |
| 35 | * radeon_mem_type_to_domain - return domain corresponding to mem_type |
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| 36 | * @mem_type: ttm memory type |
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| 37 | * |
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| 38 | * Returns corresponding domain of the ttm mem_type |
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| 1126 | serge | 39 | */ |
| 1321 | serge | 40 | static inline unsigned radeon_mem_type_to_domain(u32 mem_type) |
| 41 | { |
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| 42 | switch (mem_type) { |
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| 43 | case TTM_PL_VRAM: |
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| 44 | return RADEON_GEM_DOMAIN_VRAM; |
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| 45 | case TTM_PL_TT: |
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| 46 | return RADEON_GEM_DOMAIN_GTT; |
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| 47 | case TTM_PL_SYSTEM: |
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| 48 | return RADEON_GEM_DOMAIN_CPU; |
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| 49 | default: |
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| 50 | break; |
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| 51 | } |
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| 52 | return 0; |
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| 53 | } |
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| 1126 | serge | 54 | |
| 5078 | serge | 55 | /** |
| 56 | * radeon_bo_reserve - reserve bo |
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| 57 | * @bo: bo structure |
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| 58 | * @no_intr: don't return -ERESTARTSYS on pending signal |
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| 59 | * |
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| 60 | * Returns: |
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| 61 | * -ERESTARTSYS: A wait for the buffer to become unreserved was interrupted by |
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| 62 | * a signal. Release all buffer reservations and return to user-space. |
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| 63 | */ |
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| 64 | static inline int radeon_bo_reserve(struct radeon_bo *bo, bool no_intr) |
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| 65 | { |
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| 66 | int r; |
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| 1126 | serge | 67 | |
| 5078 | serge | 68 | r = ttm_bo_reserve(&bo->tbo, !no_intr, false, false, NULL); |
| 69 | if (unlikely(r != 0)) { |
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| 70 | if (r != -ERESTARTSYS) |
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| 71 | dev_err(bo->rdev->dev, "%p reserve failed\n", bo); |
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| 72 | return r; |
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| 73 | } |
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| 74 | return 0; |
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| 75 | } |
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| 76 | |||
| 1321 | serge | 77 | static inline void radeon_bo_unreserve(struct radeon_bo *bo) |
| 78 | { |
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| 5078 | serge | 79 | ttm_bo_unreserve(&bo->tbo); |
| 1321 | serge | 80 | } |
| 1126 | serge | 81 | |
| 1321 | serge | 82 | /** |
| 83 | * radeon_bo_gpu_offset - return GPU offset of bo |
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| 84 | * @bo: radeon object for which we query the offset |
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| 1404 | serge | 85 | * |
| 1321 | serge | 86 | * Returns current GPU offset of the object. |
| 1404 | serge | 87 | * |
| 1321 | serge | 88 | * Note: object should either be pinned or reserved when calling this |
| 1963 | serge | 89 | * function, it might be useful to add check for this for debugging. |
| 1404 | serge | 90 | */ |
| 1321 | serge | 91 | static inline u64 radeon_bo_gpu_offset(struct radeon_bo *bo) |
| 92 | { |
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| 93 | return bo->tbo.offset; |
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| 94 | } |
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| 1126 | serge | 95 | |
| 1321 | serge | 96 | static inline unsigned long radeon_bo_size(struct radeon_bo *bo) |
| 97 | { |
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| 98 | return bo->tbo.num_pages << PAGE_SHIFT; |
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| 99 | } |
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| 1126 | serge | 100 | |
| 2997 | Serge | 101 | static inline unsigned radeon_bo_ngpu_pages(struct radeon_bo *bo) |
| 102 | { |
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| 103 | return (bo->tbo.num_pages << PAGE_SHIFT) / RADEON_GPU_PAGE_SIZE; |
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| 104 | } |
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| 105 | |||
| 106 | static inline unsigned radeon_bo_gpu_page_alignment(struct radeon_bo *bo) |
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| 107 | { |
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| 108 | return (bo->tbo.mem.page_alignment << PAGE_SHIFT) / RADEON_GPU_PAGE_SIZE; |
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| 109 | } |
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| 110 | |||
| 1321 | serge | 111 | /** |
| 112 | * radeon_bo_mmap_offset - return mmap offset of bo |
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| 113 | * @bo: radeon object for which we query the offset |
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| 1404 | serge | 114 | * |
| 1321 | serge | 115 | * Returns mmap offset of the object. |
| 1404 | serge | 116 | */ |
| 1321 | serge | 117 | static inline u64 radeon_bo_mmap_offset(struct radeon_bo *bo) |
| 118 | { |
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| 5078 | serge | 119 | return drm_vma_node_offset_addr(&bo->tbo.vma_node); |
| 1321 | serge | 120 | } |
| 1126 | serge | 121 | |
| 2997 | Serge | 122 | extern int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type, |
| 123 | bool no_wait); |
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| 1126 | serge | 124 | |
| 1321 | serge | 125 | extern int radeon_bo_create(struct radeon_device *rdev, |
| 1963 | serge | 126 | unsigned long size, int byte_align, |
| 5078 | serge | 127 | bool kernel, u32 domain, u32 flags, |
| 2997 | Serge | 128 | struct sg_table *sg, |
| 1321 | serge | 129 | struct radeon_bo **bo_ptr); |
| 130 | extern int radeon_bo_kmap(struct radeon_bo *bo, void **ptr); |
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| 131 | extern void radeon_bo_kunmap(struct radeon_bo *bo); |
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| 5078 | serge | 132 | extern struct radeon_bo *radeon_bo_ref(struct radeon_bo *bo); |
| 1321 | serge | 133 | extern void radeon_bo_unref(struct radeon_bo **bo); |
| 134 | extern int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr); |
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| 2997 | Serge | 135 | extern int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain, |
| 136 | u64 max_offset, u64 *gpu_addr); |
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| 1321 | serge | 137 | extern int radeon_bo_unpin(struct radeon_bo *bo); |
| 138 | extern int radeon_bo_evict_vram(struct radeon_device *rdev); |
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| 139 | extern void radeon_bo_force_delete(struct radeon_device *rdev); |
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| 140 | extern int radeon_bo_init(struct radeon_device *rdev); |
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| 141 | extern void radeon_bo_fini(struct radeon_device *rdev); |
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| 5078 | serge | 142 | extern int radeon_bo_list_validate(struct radeon_device *rdev, |
| 143 | struct ww_acquire_ctx *ticket, |
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| 144 | struct list_head *head, int ring); |
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| 1321 | serge | 145 | extern int radeon_bo_fbdev_mmap(struct radeon_bo *bo, |
| 146 | struct vm_area_struct *vma); |
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| 147 | extern int radeon_bo_set_tiling_flags(struct radeon_bo *bo, |
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| 148 | u32 tiling_flags, u32 pitch); |
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| 149 | extern void radeon_bo_get_tiling_flags(struct radeon_bo *bo, |
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| 150 | u32 *tiling_flags, u32 *pitch); |
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| 151 | extern int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved, |
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| 152 | bool force_drop); |
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| 153 | extern void radeon_bo_move_notify(struct ttm_buffer_object *bo, |
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| 5078 | serge | 154 | struct ttm_mem_reg *new_mem); |
| 1963 | serge | 155 | extern int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo); |
| 1321 | serge | 156 | extern int radeon_bo_get_surface_reg(struct radeon_bo *bo); |
| 2997 | Serge | 157 | |
| 158 | /* |
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| 159 | * sub allocation |
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| 160 | */ |
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| 161 | |||
| 162 | static inline uint64_t radeon_sa_bo_gpu_addr(struct radeon_sa_bo *sa_bo) |
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| 163 | { |
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| 164 | return sa_bo->manager->gpu_addr + sa_bo->soffset; |
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| 165 | } |
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| 166 | |||
| 167 | static inline void * radeon_sa_bo_cpu_addr(struct radeon_sa_bo *sa_bo) |
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| 168 | { |
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| 169 | return sa_bo->manager->cpu_ptr + sa_bo->soffset; |
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| 170 | } |
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| 171 | |||
| 172 | extern int radeon_sa_bo_manager_init(struct radeon_device *rdev, |
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| 173 | struct radeon_sa_manager *sa_manager, |
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| 5078 | serge | 174 | unsigned size, u32 align, u32 domain, |
| 175 | u32 flags); |
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| 2997 | Serge | 176 | extern void radeon_sa_bo_manager_fini(struct radeon_device *rdev, |
| 177 | struct radeon_sa_manager *sa_manager); |
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| 178 | extern int radeon_sa_bo_manager_start(struct radeon_device *rdev, |
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| 179 | struct radeon_sa_manager *sa_manager); |
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| 180 | extern int radeon_sa_bo_manager_suspend(struct radeon_device *rdev, |
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| 181 | struct radeon_sa_manager *sa_manager); |
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| 182 | extern int radeon_sa_bo_new(struct radeon_device *rdev, |
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| 183 | struct radeon_sa_manager *sa_manager, |
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| 184 | struct radeon_sa_bo **sa_bo, |
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| 5078 | serge | 185 | unsigned size, unsigned align); |
| 2997 | Serge | 186 | extern void radeon_sa_bo_free(struct radeon_device *rdev, |
| 187 | struct radeon_sa_bo **sa_bo, |
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| 188 | struct radeon_fence *fence); |
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| 189 | #if defined(CONFIG_DEBUG_FS) |
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| 190 | extern void radeon_sa_bo_dump_debug_info(struct radeon_sa_manager *sa_manager, |
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| 191 | struct seq_file *m); |
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| 1126 | serge | 192 | #endif |
| 2997 | Serge | 193 | |
| 194 | |||
| 195 | #endif |