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1117 | serge | 1 | /* |
2 | * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and |
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3 | * VA Linux Systems Inc., Fremont, California. |
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4 | * Copyright 2008 Red Hat Inc. |
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5 | * |
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6 | * Permission is hereby granted, free of charge, to any person obtaining a |
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7 | * copy of this software and associated documentation files (the "Software"), |
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8 | * to deal in the Software without restriction, including without limitation |
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9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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10 | * and/or sell copies of the Software, and to permit persons to whom the |
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11 | * Software is furnished to do so, subject to the following conditions: |
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12 | * |
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13 | * The above copyright notice and this permission notice shall be included in |
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14 | * all copies or substantial portions of the Software. |
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15 | * |
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16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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22 | * OTHER DEALINGS IN THE SOFTWARE. |
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23 | * |
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24 | * Original Authors: |
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25 | * Kevin E. Martin, Rickard E. Faith, Alan Hourihane |
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26 | * |
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27 | * Kernel port Author: Dave Airlie |
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28 | */ |
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29 | |||
30 | #ifndef RADEON_MODE_H |
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31 | #define RADEON_MODE_H |
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32 | |||
1125 | serge | 33 | #include |
34 | #include |
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1123 | serge | 35 | #include |
1125 | serge | 36 | #include |
37 | #include |
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1117 | serge | 38 | |
39 | #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base) |
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40 | #define to_radeon_connector(x) container_of(x, struct radeon_connector, base) |
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41 | #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base) |
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42 | #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base) |
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43 | |||
44 | enum radeon_connector_type { |
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45 | CONNECTOR_NONE, |
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46 | CONNECTOR_VGA, |
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47 | CONNECTOR_DVI_I, |
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48 | CONNECTOR_DVI_D, |
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49 | CONNECTOR_DVI_A, |
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50 | CONNECTOR_STV, |
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51 | CONNECTOR_CTV, |
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52 | CONNECTOR_LVDS, |
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53 | CONNECTOR_DIGITAL, |
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54 | CONNECTOR_SCART, |
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55 | CONNECTOR_HDMI_TYPE_A, |
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56 | CONNECTOR_HDMI_TYPE_B, |
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57 | CONNECTOR_0XC, |
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58 | CONNECTOR_0XD, |
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59 | CONNECTOR_DIN, |
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60 | CONNECTOR_DISPLAY_PORT, |
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61 | CONNECTOR_UNSUPPORTED |
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62 | }; |
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63 | |||
64 | enum radeon_dvi_type { |
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65 | DVI_AUTO, |
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66 | DVI_DIGITAL, |
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67 | DVI_ANALOG |
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68 | }; |
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69 | |||
70 | enum radeon_rmx_type { |
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71 | RMX_OFF, |
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72 | RMX_FULL, |
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73 | RMX_CENTER, |
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74 | RMX_ASPECT |
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75 | }; |
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76 | |||
77 | enum radeon_tv_std { |
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78 | TV_STD_NTSC, |
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79 | TV_STD_PAL, |
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80 | TV_STD_PAL_M, |
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81 | TV_STD_PAL_60, |
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82 | TV_STD_NTSC_J, |
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83 | TV_STD_SCART_PAL, |
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84 | TV_STD_SECAM, |
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85 | TV_STD_PAL_CN, |
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86 | }; |
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87 | |||
88 | struct radeon_i2c_bus_rec { |
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89 | bool valid; |
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90 | uint32_t mask_clk_reg; |
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91 | uint32_t mask_data_reg; |
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92 | uint32_t a_clk_reg; |
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93 | uint32_t a_data_reg; |
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94 | uint32_t put_clk_reg; |
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95 | uint32_t put_data_reg; |
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96 | uint32_t get_clk_reg; |
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97 | uint32_t get_data_reg; |
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98 | uint32_t mask_clk_mask; |
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99 | uint32_t mask_data_mask; |
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100 | uint32_t put_clk_mask; |
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101 | uint32_t put_data_mask; |
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102 | uint32_t get_clk_mask; |
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103 | uint32_t get_data_mask; |
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104 | uint32_t a_clk_mask; |
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105 | uint32_t a_data_mask; |
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106 | }; |
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107 | |||
108 | struct radeon_tmds_pll { |
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109 | uint32_t freq; |
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110 | uint32_t value; |
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111 | }; |
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112 | |||
113 | #define RADEON_MAX_BIOS_CONNECTOR 16 |
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114 | |||
115 | #define RADEON_PLL_USE_BIOS_DIVS (1 << 0) |
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116 | #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1) |
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117 | #define RADEON_PLL_USE_REF_DIV (1 << 2) |
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118 | #define RADEON_PLL_LEGACY (1 << 3) |
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119 | #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4) |
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120 | #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5) |
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121 | #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6) |
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122 | #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7) |
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123 | #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8) |
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124 | #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9) |
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125 | #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10) |
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126 | |||
127 | struct radeon_pll { |
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128 | uint16_t reference_freq; |
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129 | uint16_t reference_div; |
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130 | uint32_t pll_in_min; |
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131 | uint32_t pll_in_max; |
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132 | uint32_t pll_out_min; |
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133 | uint32_t pll_out_max; |
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134 | uint16_t xclk; |
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135 | |||
136 | uint32_t min_ref_div; |
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137 | uint32_t max_ref_div; |
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138 | uint32_t min_post_div; |
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139 | uint32_t max_post_div; |
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140 | uint32_t min_feedback_div; |
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141 | uint32_t max_feedback_div; |
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142 | uint32_t min_frac_feedback_div; |
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143 | uint32_t max_frac_feedback_div; |
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144 | uint32_t best_vco; |
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145 | }; |
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146 | |||
147 | struct radeon_i2c_chan { |
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148 | struct drm_device *dev; |
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1123 | serge | 149 | struct i2c_adapter adapter; |
150 | struct i2c_algo_bit_data algo; |
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1117 | serge | 151 | struct radeon_i2c_bus_rec rec; |
152 | }; |
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153 | |||
154 | /* mostly for macs, but really any system without connector tables */ |
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155 | enum radeon_connector_table { |
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156 | CT_NONE, |
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157 | CT_GENERIC, |
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158 | CT_IBOOK, |
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159 | CT_POWERBOOK_EXTERNAL, |
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160 | CT_POWERBOOK_INTERNAL, |
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161 | CT_POWERBOOK_VGA, |
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162 | CT_MINI_EXTERNAL, |
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163 | CT_MINI_INTERNAL, |
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164 | CT_IMAC_G5_ISIGHT, |
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165 | CT_EMAC, |
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166 | }; |
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167 | |||
168 | struct radeon_mode_info { |
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169 | struct atom_context *atom_context; |
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170 | enum radeon_connector_table connector_table; |
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171 | bool mode_config_initialized; |
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172 | }; |
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173 | |||
174 | struct radeon_crtc { |
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1123 | serge | 175 | struct drm_crtc base; |
1117 | serge | 176 | int crtc_id; |
177 | u16_t lut_r[256], lut_g[256], lut_b[256]; |
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178 | bool enabled; |
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179 | bool can_tile; |
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180 | uint32_t crtc_offset; |
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181 | struct radeon_framebuffer *fbdev_fb; |
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1123 | serge | 182 | struct drm_mode_set mode_set; |
1117 | serge | 183 | // struct drm_gem_object *cursor_bo; |
184 | uint64_t cursor_addr; |
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185 | int cursor_width; |
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186 | int cursor_height; |
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187 | }; |
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188 | |||
189 | #define RADEON_USE_RMX 1 |
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190 | |||
191 | struct radeon_native_mode { |
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192 | /* preferred mode */ |
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193 | uint32_t panel_xres, panel_yres; |
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194 | uint32_t hoverplus, hsync_width; |
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195 | uint32_t hblank; |
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196 | uint32_t voverplus, vsync_width; |
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197 | uint32_t vblank; |
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198 | uint32_t dotclock; |
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199 | uint32_t flags; |
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200 | }; |
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201 | |||
202 | struct radeon_encoder_primary_dac { |
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203 | /* legacy primary dac */ |
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204 | uint32_t ps2_pdac_adj; |
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205 | }; |
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206 | |||
207 | struct radeon_encoder_lvds { |
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208 | /* legacy lvds */ |
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209 | uint16_t panel_vcc_delay; |
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210 | uint8_t panel_pwr_delay; |
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211 | uint8_t panel_digon_delay; |
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212 | uint8_t panel_blon_delay; |
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213 | uint16_t panel_ref_divider; |
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214 | uint8_t panel_post_divider; |
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215 | uint16_t panel_fb_divider; |
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216 | bool use_bios_dividers; |
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217 | uint32_t lvds_gen_cntl; |
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218 | /* panel mode */ |
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219 | struct radeon_native_mode native_mode; |
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220 | }; |
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221 | |||
222 | struct radeon_encoder_tv_dac { |
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223 | /* legacy tv dac */ |
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224 | uint32_t ps2_tvdac_adj; |
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225 | uint32_t ntsc_tvdac_adj; |
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226 | uint32_t pal_tvdac_adj; |
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227 | |||
228 | enum radeon_tv_std tv_std; |
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229 | }; |
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230 | |||
231 | struct radeon_encoder_int_tmds { |
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232 | /* legacy int tmds */ |
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233 | struct radeon_tmds_pll tmds_pll[4]; |
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234 | }; |
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235 | |||
236 | struct radeon_encoder_atom_dig { |
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237 | /* atom dig */ |
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238 | bool coherent_mode; |
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239 | int dig_block; |
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240 | /* atom lvds */ |
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241 | uint32_t lvds_misc; |
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242 | uint16_t panel_pwr_delay; |
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243 | /* panel mode */ |
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244 | struct radeon_native_mode native_mode; |
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245 | }; |
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246 | |||
247 | struct radeon_encoder { |
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248 | struct drm_encoder base; |
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249 | uint32_t encoder_id; |
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250 | uint32_t devices; |
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251 | uint32_t flags; |
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252 | uint32_t pixel_clock; |
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253 | enum radeon_rmx_type rmx_type; |
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254 | struct radeon_native_mode native_mode; |
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255 | void *enc_priv; |
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256 | }; |
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257 | |||
258 | struct radeon_connector_atom_dig { |
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259 | uint32_t igp_lane_info; |
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260 | bool linkb; |
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261 | }; |
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262 | |||
263 | struct radeon_connector { |
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264 | struct drm_connector base; |
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265 | uint32_t connector_id; |
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266 | uint32_t devices; |
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267 | struct radeon_i2c_chan *ddc_bus; |
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268 | int use_digital; |
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269 | void *con_priv; |
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270 | }; |
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271 | |||
272 | struct radeon_framebuffer { |
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1123 | serge | 273 | struct drm_framebuffer base; |
274 | struct drm_gem_object *obj; |
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1117 | serge | 275 | }; |
276 | |||
277 | extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, |
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278 | struct radeon_i2c_bus_rec *rec, |
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279 | const char *name); |
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280 | extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c); |
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281 | extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector); |
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282 | extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector); |
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283 | |||
1123 | serge | 284 | extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector); |
1117 | serge | 285 | |
286 | extern void radeon_compute_pll(struct radeon_pll *pll, |
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287 | uint64_t freq, |
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288 | uint32_t *dot_clock_p, |
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289 | uint32_t *fb_div_p, |
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290 | uint32_t *frac_fb_div_p, |
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291 | uint32_t *ref_div_p, |
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292 | uint32_t *post_div_p, |
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293 | int flags); |
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294 | |||
295 | struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index); |
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296 | struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv); |
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297 | struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv); |
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298 | struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index); |
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299 | struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index); |
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300 | extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action); |
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301 | extern int atombios_get_encoder_mode(struct drm_encoder *encoder); |
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302 | |||
303 | extern void radeon_crtc_load_lut(struct drm_crtc *crtc); |
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304 | extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, |
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305 | struct drm_framebuffer *old_fb); |
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306 | extern int atombios_crtc_mode_set(struct drm_crtc *crtc, |
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307 | struct drm_display_mode *mode, |
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308 | struct drm_display_mode *adjusted_mode, |
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309 | int x, int y, |
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310 | struct drm_framebuffer *old_fb); |
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311 | extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode); |
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312 | |||
313 | extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, |
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314 | struct drm_framebuffer *old_fb); |
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315 | extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc); |
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316 | |||
317 | extern int radeon_crtc_cursor_set(struct drm_crtc *crtc, |
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318 | struct drm_file *file_priv, |
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319 | uint32_t handle, |
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320 | uint32_t width, |
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321 | uint32_t height); |
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322 | extern int radeon_crtc_cursor_move(struct drm_crtc *crtc, |
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323 | int x, int y); |
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324 | |||
325 | extern bool radeon_atom_get_clock_info(struct drm_device *dev); |
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326 | extern bool radeon_combios_get_clock_info(struct drm_device *dev); |
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327 | extern struct radeon_encoder_atom_dig * |
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328 | radeon_atombios_get_lvds_info(struct radeon_encoder *encoder); |
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329 | extern struct radeon_encoder_int_tmds * |
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330 | radeon_atombios_get_tmds_info(struct radeon_encoder *encoder); |
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331 | extern struct radeon_encoder_primary_dac * |
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332 | radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder); |
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333 | extern struct radeon_encoder_tv_dac * |
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334 | radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder); |
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335 | extern struct radeon_encoder_lvds * |
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336 | radeon_combios_get_lvds_info(struct radeon_encoder *encoder); |
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337 | extern struct radeon_encoder_int_tmds * |
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338 | radeon_combios_get_tmds_info(struct radeon_encoder *encoder); |
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339 | extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder); |
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340 | extern struct radeon_encoder_tv_dac * |
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341 | radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder); |
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342 | extern struct radeon_encoder_primary_dac * |
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343 | radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder); |
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344 | extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock); |
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345 | extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev); |
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346 | extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock); |
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347 | extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev); |
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348 | extern void |
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349 | radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc); |
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350 | extern void |
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351 | radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on); |
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352 | extern void |
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353 | radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc); |
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354 | extern void |
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355 | radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on); |
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356 | extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, |
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357 | u16 blue, int regno); |
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358 | struct drm_framebuffer *radeon_framebuffer_create(struct drm_device *dev, |
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359 | struct drm_mode_fb_cmd *mode_cmd, |
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360 | struct drm_gem_object *obj); |
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361 | |||
362 | int radeonfb_probe(struct drm_device *dev); |
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363 | |||
364 | int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb); |
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365 | bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev); |
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366 | bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev); |
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367 | void radeon_atombios_init_crtc(struct drm_device *dev, |
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368 | struct radeon_crtc *radeon_crtc); |
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369 | void radeon_legacy_init_crtc(struct drm_device *dev, |
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370 | struct radeon_crtc *radeon_crtc); |
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371 | void radeon_i2c_do_lock(struct radeon_connector *radeon_connector, int lock_state); |
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372 | |||
373 | void radeon_get_clock_info(struct drm_device *dev); |
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374 | |||
375 | extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev); |
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376 | extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev); |
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377 | |||
378 | void radeon_rmx_mode_fixup(struct drm_encoder *encoder, |
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379 | struct drm_display_mode *mode, |
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380 | struct drm_display_mode *adjusted_mode); |
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381 | void radeon_enc_destroy(struct drm_encoder *encoder); |
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382 | void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj); |
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383 | void radeon_combios_asic_init(struct drm_device *dev); |
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384 | extern int radeon_static_clocks_init(struct drm_device *dev); |
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385 | void radeon_init_disp_bw_legacy(struct drm_device *dev, |
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386 | struct drm_display_mode *mode1, |
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387 | uint32_t pixel_bytes1, |
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388 | struct drm_display_mode *mode2, |
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389 | uint32_t pixel_bytes2); |
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390 | void radeon_init_disp_bw_avivo(struct drm_device *dev, |
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391 | struct drm_display_mode *mode1, |
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392 | uint32_t pixel_bytes1, |
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393 | struct drm_display_mode *mode2, |
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394 | uint32_t pixel_bytes2); |
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395 | void radeon_init_disp_bandwidth(struct drm_device *dev); |
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1123 | serge | 396 | |
1117 | serge | 397 | #endif><>><>><>><>><>><>><>><>><>><>><> |