Rev 1117 | Rev 1125 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed
Rev | Author | Line No. | Line |
---|---|---|---|
1117 | serge | 1 | /* |
2 | * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and |
||
3 | * VA Linux Systems Inc., Fremont, California. |
||
4 | * Copyright 2008 Red Hat Inc. |
||
5 | * |
||
6 | * Permission is hereby granted, free of charge, to any person obtaining a |
||
7 | * copy of this software and associated documentation files (the "Software"), |
||
8 | * to deal in the Software without restriction, including without limitation |
||
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
||
10 | * and/or sell copies of the Software, and to permit persons to whom the |
||
11 | * Software is furnished to do so, subject to the following conditions: |
||
12 | * |
||
13 | * The above copyright notice and this permission notice shall be included in |
||
14 | * all copies or substantial portions of the Software. |
||
15 | * |
||
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
||
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
||
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
||
19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
||
20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
||
21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
||
22 | * OTHER DEALINGS IN THE SOFTWARE. |
||
23 | * |
||
24 | * Original Authors: |
||
25 | * Kevin E. Martin, Rickard E. Faith, Alan Hourihane |
||
26 | * |
||
27 | * Kernel port Author: Dave Airlie |
||
28 | */ |
||
29 | |||
30 | #ifndef RADEON_MODE_H |
||
31 | #define RADEON_MODE_H |
||
32 | |||
33 | #include "drm_mode.h" |
||
34 | #include "drm_crtc.h" |
||
1123 | serge | 35 | #include |
1117 | serge | 36 | |
37 | //#include |
||
38 | //#include |
||
39 | //#include |
||
40 | |||
41 | #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base) |
||
42 | #define to_radeon_connector(x) container_of(x, struct radeon_connector, base) |
||
43 | #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base) |
||
44 | #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base) |
||
45 | |||
46 | enum radeon_connector_type { |
||
47 | CONNECTOR_NONE, |
||
48 | CONNECTOR_VGA, |
||
49 | CONNECTOR_DVI_I, |
||
50 | CONNECTOR_DVI_D, |
||
51 | CONNECTOR_DVI_A, |
||
52 | CONNECTOR_STV, |
||
53 | CONNECTOR_CTV, |
||
54 | CONNECTOR_LVDS, |
||
55 | CONNECTOR_DIGITAL, |
||
56 | CONNECTOR_SCART, |
||
57 | CONNECTOR_HDMI_TYPE_A, |
||
58 | CONNECTOR_HDMI_TYPE_B, |
||
59 | CONNECTOR_0XC, |
||
60 | CONNECTOR_0XD, |
||
61 | CONNECTOR_DIN, |
||
62 | CONNECTOR_DISPLAY_PORT, |
||
63 | CONNECTOR_UNSUPPORTED |
||
64 | }; |
||
65 | |||
66 | enum radeon_dvi_type { |
||
67 | DVI_AUTO, |
||
68 | DVI_DIGITAL, |
||
69 | DVI_ANALOG |
||
70 | }; |
||
71 | |||
72 | enum radeon_rmx_type { |
||
73 | RMX_OFF, |
||
74 | RMX_FULL, |
||
75 | RMX_CENTER, |
||
76 | RMX_ASPECT |
||
77 | }; |
||
78 | |||
79 | enum radeon_tv_std { |
||
80 | TV_STD_NTSC, |
||
81 | TV_STD_PAL, |
||
82 | TV_STD_PAL_M, |
||
83 | TV_STD_PAL_60, |
||
84 | TV_STD_NTSC_J, |
||
85 | TV_STD_SCART_PAL, |
||
86 | TV_STD_SECAM, |
||
87 | TV_STD_PAL_CN, |
||
88 | }; |
||
89 | |||
90 | struct radeon_i2c_bus_rec { |
||
91 | bool valid; |
||
92 | uint32_t mask_clk_reg; |
||
93 | uint32_t mask_data_reg; |
||
94 | uint32_t a_clk_reg; |
||
95 | uint32_t a_data_reg; |
||
96 | uint32_t put_clk_reg; |
||
97 | uint32_t put_data_reg; |
||
98 | uint32_t get_clk_reg; |
||
99 | uint32_t get_data_reg; |
||
100 | uint32_t mask_clk_mask; |
||
101 | uint32_t mask_data_mask; |
||
102 | uint32_t put_clk_mask; |
||
103 | uint32_t put_data_mask; |
||
104 | uint32_t get_clk_mask; |
||
105 | uint32_t get_data_mask; |
||
106 | uint32_t a_clk_mask; |
||
107 | uint32_t a_data_mask; |
||
108 | }; |
||
109 | |||
110 | struct radeon_tmds_pll { |
||
111 | uint32_t freq; |
||
112 | uint32_t value; |
||
113 | }; |
||
114 | |||
115 | #define RADEON_MAX_BIOS_CONNECTOR 16 |
||
116 | |||
117 | #define RADEON_PLL_USE_BIOS_DIVS (1 << 0) |
||
118 | #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1) |
||
119 | #define RADEON_PLL_USE_REF_DIV (1 << 2) |
||
120 | #define RADEON_PLL_LEGACY (1 << 3) |
||
121 | #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4) |
||
122 | #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5) |
||
123 | #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6) |
||
124 | #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7) |
||
125 | #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8) |
||
126 | #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9) |
||
127 | #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10) |
||
128 | |||
129 | struct radeon_pll { |
||
130 | uint16_t reference_freq; |
||
131 | uint16_t reference_div; |
||
132 | uint32_t pll_in_min; |
||
133 | uint32_t pll_in_max; |
||
134 | uint32_t pll_out_min; |
||
135 | uint32_t pll_out_max; |
||
136 | uint16_t xclk; |
||
137 | |||
138 | uint32_t min_ref_div; |
||
139 | uint32_t max_ref_div; |
||
140 | uint32_t min_post_div; |
||
141 | uint32_t max_post_div; |
||
142 | uint32_t min_feedback_div; |
||
143 | uint32_t max_feedback_div; |
||
144 | uint32_t min_frac_feedback_div; |
||
145 | uint32_t max_frac_feedback_div; |
||
146 | uint32_t best_vco; |
||
147 | }; |
||
148 | |||
149 | struct radeon_i2c_chan { |
||
150 | struct drm_device *dev; |
||
1123 | serge | 151 | struct i2c_adapter adapter; |
152 | struct i2c_algo_bit_data algo; |
||
1117 | serge | 153 | struct radeon_i2c_bus_rec rec; |
154 | }; |
||
155 | |||
156 | /* mostly for macs, but really any system without connector tables */ |
||
157 | enum radeon_connector_table { |
||
158 | CT_NONE, |
||
159 | CT_GENERIC, |
||
160 | CT_IBOOK, |
||
161 | CT_POWERBOOK_EXTERNAL, |
||
162 | CT_POWERBOOK_INTERNAL, |
||
163 | CT_POWERBOOK_VGA, |
||
164 | CT_MINI_EXTERNAL, |
||
165 | CT_MINI_INTERNAL, |
||
166 | CT_IMAC_G5_ISIGHT, |
||
167 | CT_EMAC, |
||
168 | }; |
||
169 | |||
170 | struct radeon_mode_info { |
||
171 | struct atom_context *atom_context; |
||
172 | enum radeon_connector_table connector_table; |
||
173 | bool mode_config_initialized; |
||
174 | }; |
||
175 | |||
176 | struct radeon_crtc { |
||
1123 | serge | 177 | struct drm_crtc base; |
1117 | serge | 178 | int crtc_id; |
179 | u16_t lut_r[256], lut_g[256], lut_b[256]; |
||
180 | bool enabled; |
||
181 | bool can_tile; |
||
182 | uint32_t crtc_offset; |
||
183 | struct radeon_framebuffer *fbdev_fb; |
||
1123 | serge | 184 | struct drm_mode_set mode_set; |
1117 | serge | 185 | // struct drm_gem_object *cursor_bo; |
186 | uint64_t cursor_addr; |
||
187 | int cursor_width; |
||
188 | int cursor_height; |
||
189 | }; |
||
190 | |||
191 | #define RADEON_USE_RMX 1 |
||
192 | |||
193 | struct radeon_native_mode { |
||
194 | /* preferred mode */ |
||
195 | uint32_t panel_xres, panel_yres; |
||
196 | uint32_t hoverplus, hsync_width; |
||
197 | uint32_t hblank; |
||
198 | uint32_t voverplus, vsync_width; |
||
199 | uint32_t vblank; |
||
200 | uint32_t dotclock; |
||
201 | uint32_t flags; |
||
202 | }; |
||
203 | |||
204 | struct radeon_encoder_primary_dac { |
||
205 | /* legacy primary dac */ |
||
206 | uint32_t ps2_pdac_adj; |
||
207 | }; |
||
208 | |||
209 | struct radeon_encoder_lvds { |
||
210 | /* legacy lvds */ |
||
211 | uint16_t panel_vcc_delay; |
||
212 | uint8_t panel_pwr_delay; |
||
213 | uint8_t panel_digon_delay; |
||
214 | uint8_t panel_blon_delay; |
||
215 | uint16_t panel_ref_divider; |
||
216 | uint8_t panel_post_divider; |
||
217 | uint16_t panel_fb_divider; |
||
218 | bool use_bios_dividers; |
||
219 | uint32_t lvds_gen_cntl; |
||
220 | /* panel mode */ |
||
221 | struct radeon_native_mode native_mode; |
||
222 | }; |
||
223 | |||
224 | struct radeon_encoder_tv_dac { |
||
225 | /* legacy tv dac */ |
||
226 | uint32_t ps2_tvdac_adj; |
||
227 | uint32_t ntsc_tvdac_adj; |
||
228 | uint32_t pal_tvdac_adj; |
||
229 | |||
230 | enum radeon_tv_std tv_std; |
||
231 | }; |
||
232 | |||
233 | struct radeon_encoder_int_tmds { |
||
234 | /* legacy int tmds */ |
||
235 | struct radeon_tmds_pll tmds_pll[4]; |
||
236 | }; |
||
237 | |||
238 | struct radeon_encoder_atom_dig { |
||
239 | /* atom dig */ |
||
240 | bool coherent_mode; |
||
241 | int dig_block; |
||
242 | /* atom lvds */ |
||
243 | uint32_t lvds_misc; |
||
244 | uint16_t panel_pwr_delay; |
||
245 | /* panel mode */ |
||
246 | struct radeon_native_mode native_mode; |
||
247 | }; |
||
248 | |||
249 | struct radeon_encoder { |
||
250 | struct drm_encoder base; |
||
251 | uint32_t encoder_id; |
||
252 | uint32_t devices; |
||
253 | uint32_t flags; |
||
254 | uint32_t pixel_clock; |
||
255 | enum radeon_rmx_type rmx_type; |
||
256 | struct radeon_native_mode native_mode; |
||
257 | void *enc_priv; |
||
258 | }; |
||
259 | |||
260 | struct radeon_connector_atom_dig { |
||
261 | uint32_t igp_lane_info; |
||
262 | bool linkb; |
||
263 | }; |
||
264 | |||
265 | struct radeon_connector { |
||
266 | struct drm_connector base; |
||
267 | uint32_t connector_id; |
||
268 | uint32_t devices; |
||
269 | struct radeon_i2c_chan *ddc_bus; |
||
270 | int use_digital; |
||
271 | void *con_priv; |
||
272 | }; |
||
273 | |||
274 | struct radeon_framebuffer { |
||
1123 | serge | 275 | struct drm_framebuffer base; |
276 | struct drm_gem_object *obj; |
||
1117 | serge | 277 | }; |
278 | |||
279 | extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, |
||
280 | struct radeon_i2c_bus_rec *rec, |
||
281 | const char *name); |
||
282 | extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c); |
||
283 | extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector); |
||
284 | extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector); |
||
285 | |||
1123 | serge | 286 | extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector); |
1117 | serge | 287 | |
288 | extern void radeon_compute_pll(struct radeon_pll *pll, |
||
289 | uint64_t freq, |
||
290 | uint32_t *dot_clock_p, |
||
291 | uint32_t *fb_div_p, |
||
292 | uint32_t *frac_fb_div_p, |
||
293 | uint32_t *ref_div_p, |
||
294 | uint32_t *post_div_p, |
||
295 | int flags); |
||
296 | |||
297 | struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index); |
||
298 | struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv); |
||
299 | struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv); |
||
300 | struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index); |
||
301 | struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index); |
||
302 | extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action); |
||
303 | extern int atombios_get_encoder_mode(struct drm_encoder *encoder); |
||
304 | |||
305 | extern void radeon_crtc_load_lut(struct drm_crtc *crtc); |
||
306 | extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, |
||
307 | struct drm_framebuffer *old_fb); |
||
308 | extern int atombios_crtc_mode_set(struct drm_crtc *crtc, |
||
309 | struct drm_display_mode *mode, |
||
310 | struct drm_display_mode *adjusted_mode, |
||
311 | int x, int y, |
||
312 | struct drm_framebuffer *old_fb); |
||
313 | extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode); |
||
314 | |||
315 | extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, |
||
316 | struct drm_framebuffer *old_fb); |
||
317 | extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc); |
||
318 | |||
319 | extern int radeon_crtc_cursor_set(struct drm_crtc *crtc, |
||
320 | struct drm_file *file_priv, |
||
321 | uint32_t handle, |
||
322 | uint32_t width, |
||
323 | uint32_t height); |
||
324 | extern int radeon_crtc_cursor_move(struct drm_crtc *crtc, |
||
325 | int x, int y); |
||
326 | |||
327 | extern bool radeon_atom_get_clock_info(struct drm_device *dev); |
||
328 | extern bool radeon_combios_get_clock_info(struct drm_device *dev); |
||
329 | extern struct radeon_encoder_atom_dig * |
||
330 | radeon_atombios_get_lvds_info(struct radeon_encoder *encoder); |
||
331 | extern struct radeon_encoder_int_tmds * |
||
332 | radeon_atombios_get_tmds_info(struct radeon_encoder *encoder); |
||
333 | extern struct radeon_encoder_primary_dac * |
||
334 | radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder); |
||
335 | extern struct radeon_encoder_tv_dac * |
||
336 | radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder); |
||
337 | extern struct radeon_encoder_lvds * |
||
338 | radeon_combios_get_lvds_info(struct radeon_encoder *encoder); |
||
339 | extern struct radeon_encoder_int_tmds * |
||
340 | radeon_combios_get_tmds_info(struct radeon_encoder *encoder); |
||
341 | extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder); |
||
342 | extern struct radeon_encoder_tv_dac * |
||
343 | radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder); |
||
344 | extern struct radeon_encoder_primary_dac * |
||
345 | radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder); |
||
346 | extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock); |
||
347 | extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev); |
||
348 | extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock); |
||
349 | extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev); |
||
350 | extern void |
||
351 | radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc); |
||
352 | extern void |
||
353 | radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on); |
||
354 | extern void |
||
355 | radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc); |
||
356 | extern void |
||
357 | radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on); |
||
358 | extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, |
||
359 | u16 blue, int regno); |
||
360 | struct drm_framebuffer *radeon_framebuffer_create(struct drm_device *dev, |
||
361 | struct drm_mode_fb_cmd *mode_cmd, |
||
362 | struct drm_gem_object *obj); |
||
363 | |||
364 | int radeonfb_probe(struct drm_device *dev); |
||
365 | |||
366 | int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb); |
||
367 | bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev); |
||
368 | bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev); |
||
369 | void radeon_atombios_init_crtc(struct drm_device *dev, |
||
370 | struct radeon_crtc *radeon_crtc); |
||
371 | void radeon_legacy_init_crtc(struct drm_device *dev, |
||
372 | struct radeon_crtc *radeon_crtc); |
||
373 | void radeon_i2c_do_lock(struct radeon_connector *radeon_connector, int lock_state); |
||
374 | |||
375 | void radeon_get_clock_info(struct drm_device *dev); |
||
376 | |||
377 | extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev); |
||
378 | extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev); |
||
379 | |||
380 | void radeon_rmx_mode_fixup(struct drm_encoder *encoder, |
||
381 | struct drm_display_mode *mode, |
||
382 | struct drm_display_mode *adjusted_mode); |
||
383 | void radeon_enc_destroy(struct drm_encoder *encoder); |
||
384 | void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj); |
||
385 | void radeon_combios_asic_init(struct drm_device *dev); |
||
386 | extern int radeon_static_clocks_init(struct drm_device *dev); |
||
387 | void radeon_init_disp_bw_legacy(struct drm_device *dev, |
||
388 | struct drm_display_mode *mode1, |
||
389 | uint32_t pixel_bytes1, |
||
390 | struct drm_display_mode *mode2, |
||
391 | uint32_t pixel_bytes2); |
||
392 | void radeon_init_disp_bw_avivo(struct drm_device *dev, |
||
393 | struct drm_display_mode *mode1, |
||
394 | uint32_t pixel_bytes1, |
||
395 | struct drm_display_mode *mode2, |
||
396 | uint32_t pixel_bytes2); |
||
397 | void radeon_init_disp_bandwidth(struct drm_device *dev); |
||
1123 | serge | 398 | |
1117 | serge | 399 | #endif><>><>><>><>><>><>><>><>><>><>><> |