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Rev | Author | Line No. | Line |
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2005 | serge | 1 | /* |
2 | * Copyright 2009 Jerome Glisse. |
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3 | * |
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4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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5 | * copy of this software and associated documentation files (the "Software"), |
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6 | * to deal in the Software without restriction, including without limitation |
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7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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8 | * and/or sell copies of the Software, and to permit persons to whom the |
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9 | * Software is furnished to do so, subject to the following conditions: |
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10 | * |
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11 | * The above copyright notice and this permission notice shall be included in |
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12 | * all copies or substantial portions of the Software. |
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13 | * |
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14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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20 | * OTHER DEALINGS IN THE SOFTWARE. |
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21 | * |
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22 | * Authors: Jerome Glisse |
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23 | */ |
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24 | #include |
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25 | #include |
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26 | #include "radeon_reg.h" |
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27 | #include "radeon.h" |
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28 | |||
2997 | Serge | 29 | #define RADEON_BENCHMARK_COPY_BLIT 1 |
30 | #define RADEON_BENCHMARK_COPY_DMA 0 |
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31 | |||
32 | #define RADEON_BENCHMARK_ITERATIONS 1024 |
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33 | #define RADEON_BENCHMARK_COMMON_MODES_N 17 |
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34 | |||
35 | static int radeon_benchmark_do_move(struct radeon_device *rdev, unsigned size, |
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36 | uint64_t saddr, uint64_t daddr, |
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37 | int flag, int n) |
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2005 | serge | 38 | { |
2997 | Serge | 39 | unsigned long start_jiffies; |
40 | unsigned long end_jiffies; |
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41 | struct radeon_fence *fence = NULL; |
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42 | int i, r; |
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2005 | serge | 43 | |
5078 | serge | 44 | start_jiffies = jiffies; |
2997 | Serge | 45 | for (i = 0; i < n; i++) { |
46 | switch (flag) { |
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47 | case RADEON_BENCHMARK_COPY_DMA: |
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5271 | serge | 48 | fence = radeon_copy_dma(rdev, saddr, daddr, |
2997 | Serge | 49 | size / RADEON_GPU_PAGE_SIZE, |
5271 | serge | 50 | NULL); |
2997 | Serge | 51 | break; |
52 | case RADEON_BENCHMARK_COPY_BLIT: |
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5271 | serge | 53 | fence = radeon_copy_blit(rdev, saddr, daddr, |
2997 | Serge | 54 | size / RADEON_GPU_PAGE_SIZE, |
5271 | serge | 55 | NULL); |
2997 | Serge | 56 | break; |
57 | default: |
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58 | DRM_ERROR("Unknown copy method\n"); |
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5271 | serge | 59 | return -EINVAL; |
2997 | Serge | 60 | } |
5271 | serge | 61 | if (IS_ERR(fence)) |
62 | return PTR_ERR(fence); |
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63 | |||
2997 | Serge | 64 | r = radeon_fence_wait(fence, false); |
5271 | serge | 65 | radeon_fence_unref(&fence); |
2997 | Serge | 66 | if (r) |
5271 | serge | 67 | return r; |
2997 | Serge | 68 | } |
5078 | serge | 69 | end_jiffies = jiffies; |
5271 | serge | 70 | return jiffies_to_msecs(end_jiffies - start_jiffies); |
2997 | Serge | 71 | } |
72 | |||
73 | |||
74 | static void radeon_benchmark_log_results(int n, unsigned size, |
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75 | unsigned int time, |
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76 | unsigned sdomain, unsigned ddomain, |
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77 | char *kind) |
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78 | { |
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79 | unsigned int throughput = (n * (size >> 10)) / time; |
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80 | DRM_INFO("radeon: %s %u bo moves of %u kB from" |
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81 | " %d to %d in %u ms, throughput: %u Mb/s or %u MB/s\n", |
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82 | kind, n, size >> 10, sdomain, ddomain, time, |
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83 | throughput * 8, throughput); |
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84 | } |
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85 | |||
86 | static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size, |
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2005 | serge | 87 | unsigned sdomain, unsigned ddomain) |
88 | { |
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89 | struct radeon_bo *dobj = NULL; |
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90 | struct radeon_bo *sobj = NULL; |
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91 | uint64_t saddr, daddr; |
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2997 | Serge | 92 | int r, n; |
93 | int time; |
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2005 | serge | 94 | |
2997 | Serge | 95 | |
2005 | serge | 96 | ENTER(); |
97 | |||
2997 | Serge | 98 | n = RADEON_BENCHMARK_ITERATIONS; |
5271 | serge | 99 | r = radeon_bo_create(rdev, size, PAGE_SIZE, true, sdomain, 0, NULL, NULL, &sobj); |
2005 | serge | 100 | if (r) { |
101 | goto out_cleanup; |
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102 | } |
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103 | r = radeon_bo_reserve(sobj, false); |
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104 | if (unlikely(r != 0)) |
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105 | goto out_cleanup; |
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106 | r = radeon_bo_pin(sobj, sdomain, &saddr); |
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5078 | serge | 107 | radeon_bo_unreserve(sobj); |
2005 | serge | 108 | if (r) { |
109 | goto out_cleanup; |
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110 | } |
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5271 | serge | 111 | r = radeon_bo_create(rdev, size, PAGE_SIZE, true, ddomain, 0, NULL, NULL, &dobj); |
2005 | serge | 112 | if (r) { |
113 | goto out_cleanup; |
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114 | } |
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115 | r = radeon_bo_reserve(dobj, false); |
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116 | if (unlikely(r != 0)) |
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117 | goto out_cleanup; |
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118 | r = radeon_bo_pin(dobj, ddomain, &daddr); |
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5078 | serge | 119 | radeon_bo_unreserve(dobj); |
2005 | serge | 120 | if (r) { |
121 | goto out_cleanup; |
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122 | } |
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123 | dbgprintf("done\n"); |
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124 | |||
5078 | serge | 125 | if (rdev->asic->copy.dma) { |
2997 | Serge | 126 | time = radeon_benchmark_do_move(rdev, size, saddr, daddr, |
127 | RADEON_BENCHMARK_COPY_DMA, n); |
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128 | if (time < 0) |
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2005 | serge | 129 | goto out_cleanup; |
2997 | Serge | 130 | if (time > 0) |
131 | radeon_benchmark_log_results(n, size, time, |
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132 | sdomain, ddomain, "dma"); |
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2007 | serge | 133 | } |
134 | |||
5078 | serge | 135 | if (rdev->asic->copy.blit) { |
2997 | Serge | 136 | time = radeon_benchmark_do_move(rdev, size, saddr, daddr, |
137 | RADEON_BENCHMARK_COPY_BLIT, n); |
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138 | if (time < 0) |
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139 | goto out_cleanup; |
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140 | if (time > 0) |
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141 | radeon_benchmark_log_results(n, size, time, |
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142 | sdomain, ddomain, "blit"); |
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5078 | serge | 143 | } |
2007 | serge | 144 | |
2005 | serge | 145 | out_cleanup: |
146 | if (sobj) { |
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147 | r = radeon_bo_reserve(sobj, false); |
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148 | if (likely(r == 0)) { |
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149 | radeon_bo_unpin(sobj); |
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150 | radeon_bo_unreserve(sobj); |
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151 | } |
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152 | radeon_bo_unref(&sobj); |
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153 | } |
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154 | if (dobj) { |
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155 | r = radeon_bo_reserve(dobj, false); |
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156 | if (likely(r == 0)) { |
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157 | radeon_bo_unpin(dobj); |
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158 | radeon_bo_unreserve(dobj); |
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159 | } |
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160 | radeon_bo_unref(&dobj); |
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161 | } |
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2997 | Serge | 162 | |
2005 | serge | 163 | if (r) { |
2997 | Serge | 164 | DRM_ERROR("Error while benchmarking BO move.\n"); |
2005 | serge | 165 | } |
166 | |||
167 | LEAVE(); |
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168 | |||
169 | } |
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170 | |||
2997 | Serge | 171 | void radeon_benchmark(struct radeon_device *rdev, int test_number) |
2005 | serge | 172 | { |
2997 | Serge | 173 | int i; |
174 | int common_modes[RADEON_BENCHMARK_COMMON_MODES_N] = { |
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175 | 640 * 480 * 4, |
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176 | 720 * 480 * 4, |
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177 | 800 * 600 * 4, |
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178 | 848 * 480 * 4, |
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179 | 1024 * 768 * 4, |
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180 | 1152 * 768 * 4, |
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181 | 1280 * 720 * 4, |
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182 | 1280 * 800 * 4, |
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183 | 1280 * 854 * 4, |
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184 | 1280 * 960 * 4, |
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185 | 1280 * 1024 * 4, |
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186 | 1440 * 900 * 4, |
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187 | 1400 * 1050 * 4, |
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188 | 1680 * 1050 * 4, |
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189 | 1600 * 1200 * 4, |
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190 | 1920 * 1080 * 4, |
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191 | 1920 * 1200 * 4 |
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192 | }; |
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193 | |||
194 | switch (test_number) { |
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195 | case 1: |
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196 | /* simple test, VRAM to GTT and GTT to VRAM */ |
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197 | radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_GTT, |
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198 | RADEON_GEM_DOMAIN_VRAM); |
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199 | radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM, |
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200 | RADEON_GEM_DOMAIN_GTT); |
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201 | break; |
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202 | case 2: |
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203 | /* simple test, VRAM to VRAM */ |
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204 | radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM, |
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205 | RADEON_GEM_DOMAIN_VRAM); |
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206 | break; |
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207 | case 3: |
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208 | /* GTT to VRAM, buffer size sweep, powers of 2 */ |
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209 | for (i = 1; i <= 16384; i <<= 1) |
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210 | radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE, |
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211 | RADEON_GEM_DOMAIN_GTT, |
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212 | RADEON_GEM_DOMAIN_VRAM); |
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213 | break; |
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214 | case 4: |
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215 | /* VRAM to GTT, buffer size sweep, powers of 2 */ |
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216 | for (i = 1; i <= 16384; i <<= 1) |
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217 | radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE, |
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218 | RADEON_GEM_DOMAIN_VRAM, |
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219 | RADEON_GEM_DOMAIN_GTT); |
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220 | break; |
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221 | case 5: |
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222 | /* VRAM to VRAM, buffer size sweep, powers of 2 */ |
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223 | for (i = 1; i <= 16384; i <<= 1) |
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224 | radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE, |
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225 | RADEON_GEM_DOMAIN_VRAM, |
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226 | RADEON_GEM_DOMAIN_VRAM); |
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227 | break; |
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228 | case 6: |
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229 | /* GTT to VRAM, buffer size sweep, common modes */ |
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230 | for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++) |
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231 | radeon_benchmark_move(rdev, common_modes[i], |
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232 | RADEON_GEM_DOMAIN_GTT, |
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2005 | serge | 233 | RADEON_GEM_DOMAIN_VRAM); |
2997 | Serge | 234 | break; |
235 | case 7: |
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236 | /* VRAM to GTT, buffer size sweep, common modes */ |
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237 | for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++) |
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238 | radeon_benchmark_move(rdev, common_modes[i], |
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239 | RADEON_GEM_DOMAIN_VRAM, |
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2005 | serge | 240 | RADEON_GEM_DOMAIN_GTT); |
2997 | Serge | 241 | break; |
242 | case 8: |
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243 | /* VRAM to VRAM, buffer size sweep, common modes */ |
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244 | for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++) |
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245 | radeon_benchmark_move(rdev, common_modes[i], |
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246 | RADEON_GEM_DOMAIN_VRAM, |
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2005 | serge | 247 | RADEON_GEM_DOMAIN_VRAM); |
2997 | Serge | 248 | break; |
249 | |||
250 | default: |
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251 | DRM_ERROR("Unknown benchmark\n"); |
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252 | } |
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2005 | serge | 253 | }>>>=><=>=>=><=>=>=><=>=>>>> |