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Rev | Author | Line No. | Line |
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2005 | serge | 1 | /* |
2 | * Copyright 2009 Jerome Glisse. |
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3 | * |
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4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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5 | * copy of this software and associated documentation files (the "Software"), |
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6 | * to deal in the Software without restriction, including without limitation |
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7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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8 | * and/or sell copies of the Software, and to permit persons to whom the |
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9 | * Software is furnished to do so, subject to the following conditions: |
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10 | * |
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11 | * The above copyright notice and this permission notice shall be included in |
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12 | * all copies or substantial portions of the Software. |
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13 | * |
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14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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20 | * OTHER DEALINGS IN THE SOFTWARE. |
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21 | * |
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22 | * Authors: Jerome Glisse |
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23 | */ |
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24 | #include |
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25 | #include |
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26 | #include "radeon_reg.h" |
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27 | #include "radeon.h" |
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28 | |||
2997 | Serge | 29 | #define RADEON_BENCHMARK_COPY_BLIT 1 |
30 | #define RADEON_BENCHMARK_COPY_DMA 0 |
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31 | |||
32 | #define RADEON_BENCHMARK_ITERATIONS 1024 |
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33 | #define RADEON_BENCHMARK_COMMON_MODES_N 17 |
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34 | |||
35 | static int radeon_benchmark_do_move(struct radeon_device *rdev, unsigned size, |
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36 | uint64_t saddr, uint64_t daddr, |
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37 | int flag, int n) |
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2005 | serge | 38 | { |
2997 | Serge | 39 | unsigned long start_jiffies; |
40 | unsigned long end_jiffies; |
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41 | struct radeon_fence *fence = NULL; |
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42 | int i, r; |
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2005 | serge | 43 | |
2997 | Serge | 44 | start_jiffies = jiffies; |
45 | for (i = 0; i < n; i++) { |
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46 | switch (flag) { |
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47 | case RADEON_BENCHMARK_COPY_DMA: |
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48 | r = radeon_copy_dma(rdev, saddr, daddr, |
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49 | size / RADEON_GPU_PAGE_SIZE, |
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50 | &fence); |
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51 | break; |
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52 | case RADEON_BENCHMARK_COPY_BLIT: |
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53 | r = radeon_copy_blit(rdev, saddr, daddr, |
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54 | size / RADEON_GPU_PAGE_SIZE, |
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55 | &fence); |
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56 | break; |
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57 | default: |
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58 | DRM_ERROR("Unknown copy method\n"); |
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59 | r = -EINVAL; |
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60 | } |
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61 | if (r) |
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62 | goto exit_do_move; |
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63 | r = radeon_fence_wait(fence, false); |
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64 | if (r) |
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65 | goto exit_do_move; |
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66 | radeon_fence_unref(&fence); |
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67 | } |
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68 | end_jiffies = GetTimerTicks(); |
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69 | r = jiffies_to_msecs(end_jiffies - start_jiffies); |
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2005 | serge | 70 | |
2997 | Serge | 71 | exit_do_move: |
72 | if (fence) |
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73 | radeon_fence_unref(&fence); |
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74 | return r; |
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75 | } |
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76 | |||
77 | |||
78 | static void radeon_benchmark_log_results(int n, unsigned size, |
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79 | unsigned int time, |
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80 | unsigned sdomain, unsigned ddomain, |
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81 | char *kind) |
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82 | { |
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83 | unsigned int throughput = (n * (size >> 10)) / time; |
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84 | DRM_INFO("radeon: %s %u bo moves of %u kB from" |
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85 | " %d to %d in %u ms, throughput: %u Mb/s or %u MB/s\n", |
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86 | kind, n, size >> 10, sdomain, ddomain, time, |
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87 | throughput * 8, throughput); |
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88 | } |
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89 | |||
90 | static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size, |
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2005 | serge | 91 | unsigned sdomain, unsigned ddomain) |
92 | { |
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93 | struct radeon_bo *dobj = NULL; |
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94 | struct radeon_bo *sobj = NULL; |
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95 | uint64_t saddr, daddr; |
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2997 | Serge | 96 | int r, n; |
97 | int time; |
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2005 | serge | 98 | |
2997 | Serge | 99 | |
2005 | serge | 100 | ENTER(); |
101 | |||
2997 | Serge | 102 | n = RADEON_BENCHMARK_ITERATIONS; |
103 | r = radeon_bo_create(rdev, size, PAGE_SIZE, true, sdomain, NULL, &sobj); |
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2005 | serge | 104 | if (r) { |
105 | goto out_cleanup; |
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106 | } |
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107 | r = radeon_bo_reserve(sobj, false); |
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108 | if (unlikely(r != 0)) |
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109 | goto out_cleanup; |
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110 | r = radeon_bo_pin(sobj, sdomain, &saddr); |
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111 | // radeon_bo_unreserve(sobj); |
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112 | if (r) { |
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113 | goto out_cleanup; |
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114 | } |
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2997 | Serge | 115 | r = radeon_bo_create(rdev, size, PAGE_SIZE, true, ddomain, NULL, &dobj); |
2005 | serge | 116 | if (r) { |
117 | goto out_cleanup; |
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118 | } |
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119 | r = radeon_bo_reserve(dobj, false); |
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120 | if (unlikely(r != 0)) |
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121 | goto out_cleanup; |
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122 | r = radeon_bo_pin(dobj, ddomain, &daddr); |
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123 | // radeon_bo_unreserve(dobj); |
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124 | if (r) { |
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125 | goto out_cleanup; |
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126 | } |
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127 | dbgprintf("done\n"); |
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128 | |||
129 | /* r100 doesn't have dma engine so skip the test */ |
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2997 | Serge | 130 | /* also, VRAM-to-VRAM test doesn't make much sense for DMA */ |
131 | /* skip it as well if domains are the same */ |
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132 | if ((rdev->asic->copy.dma) && (sdomain != ddomain)) { |
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133 | time = radeon_benchmark_do_move(rdev, size, saddr, daddr, |
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134 | RADEON_BENCHMARK_COPY_DMA, n); |
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135 | if (time < 0) |
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2005 | serge | 136 | goto out_cleanup; |
2997 | Serge | 137 | if (time > 0) |
138 | radeon_benchmark_log_results(n, size, time, |
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139 | sdomain, ddomain, "dma"); |
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2007 | serge | 140 | } |
141 | |||
2997 | Serge | 142 | time = radeon_benchmark_do_move(rdev, size, saddr, daddr, |
143 | RADEON_BENCHMARK_COPY_BLIT, n); |
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144 | if (time < 0) |
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145 | goto out_cleanup; |
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146 | if (time > 0) |
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147 | radeon_benchmark_log_results(n, size, time, |
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148 | sdomain, ddomain, "blit"); |
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2007 | serge | 149 | |
2005 | serge | 150 | out_cleanup: |
151 | if (sobj) { |
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152 | r = radeon_bo_reserve(sobj, false); |
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153 | if (likely(r == 0)) { |
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154 | radeon_bo_unpin(sobj); |
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155 | radeon_bo_unreserve(sobj); |
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156 | } |
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157 | radeon_bo_unref(&sobj); |
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158 | } |
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159 | if (dobj) { |
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160 | r = radeon_bo_reserve(dobj, false); |
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161 | if (likely(r == 0)) { |
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162 | radeon_bo_unpin(dobj); |
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163 | radeon_bo_unreserve(dobj); |
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164 | } |
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165 | radeon_bo_unref(&dobj); |
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166 | } |
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2997 | Serge | 167 | |
2005 | serge | 168 | if (r) { |
2997 | Serge | 169 | DRM_ERROR("Error while benchmarking BO move.\n"); |
2005 | serge | 170 | } |
171 | |||
172 | LEAVE(); |
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173 | |||
174 | } |
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175 | |||
2997 | Serge | 176 | void radeon_benchmark(struct radeon_device *rdev, int test_number) |
2005 | serge | 177 | { |
2997 | Serge | 178 | int i; |
179 | int common_modes[RADEON_BENCHMARK_COMMON_MODES_N] = { |
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180 | 640 * 480 * 4, |
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181 | 720 * 480 * 4, |
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182 | 800 * 600 * 4, |
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183 | 848 * 480 * 4, |
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184 | 1024 * 768 * 4, |
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185 | 1152 * 768 * 4, |
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186 | 1280 * 720 * 4, |
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187 | 1280 * 800 * 4, |
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188 | 1280 * 854 * 4, |
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189 | 1280 * 960 * 4, |
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190 | 1280 * 1024 * 4, |
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191 | 1440 * 900 * 4, |
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192 | 1400 * 1050 * 4, |
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193 | 1680 * 1050 * 4, |
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194 | 1600 * 1200 * 4, |
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195 | 1920 * 1080 * 4, |
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196 | 1920 * 1200 * 4 |
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197 | }; |
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198 | |||
199 | switch (test_number) { |
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200 | case 1: |
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201 | /* simple test, VRAM to GTT and GTT to VRAM */ |
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202 | radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_GTT, |
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203 | RADEON_GEM_DOMAIN_VRAM); |
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204 | radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM, |
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205 | RADEON_GEM_DOMAIN_GTT); |
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206 | break; |
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207 | case 2: |
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208 | /* simple test, VRAM to VRAM */ |
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209 | radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM, |
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210 | RADEON_GEM_DOMAIN_VRAM); |
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211 | break; |
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212 | case 3: |
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213 | /* GTT to VRAM, buffer size sweep, powers of 2 */ |
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214 | for (i = 1; i <= 16384; i <<= 1) |
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215 | radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE, |
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216 | RADEON_GEM_DOMAIN_GTT, |
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217 | RADEON_GEM_DOMAIN_VRAM); |
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218 | break; |
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219 | case 4: |
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220 | /* VRAM to GTT, buffer size sweep, powers of 2 */ |
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221 | for (i = 1; i <= 16384; i <<= 1) |
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222 | radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE, |
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223 | RADEON_GEM_DOMAIN_VRAM, |
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224 | RADEON_GEM_DOMAIN_GTT); |
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225 | break; |
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226 | case 5: |
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227 | /* VRAM to VRAM, buffer size sweep, powers of 2 */ |
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228 | for (i = 1; i <= 16384; i <<= 1) |
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229 | radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE, |
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230 | RADEON_GEM_DOMAIN_VRAM, |
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231 | RADEON_GEM_DOMAIN_VRAM); |
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232 | break; |
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233 | case 6: |
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234 | /* GTT to VRAM, buffer size sweep, common modes */ |
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235 | for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++) |
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236 | radeon_benchmark_move(rdev, common_modes[i], |
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237 | RADEON_GEM_DOMAIN_GTT, |
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2005 | serge | 238 | RADEON_GEM_DOMAIN_VRAM); |
2997 | Serge | 239 | break; |
240 | case 7: |
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241 | /* VRAM to GTT, buffer size sweep, common modes */ |
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242 | for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++) |
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243 | radeon_benchmark_move(rdev, common_modes[i], |
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244 | RADEON_GEM_DOMAIN_VRAM, |
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2005 | serge | 245 | RADEON_GEM_DOMAIN_GTT); |
2997 | Serge | 246 | break; |
247 | case 8: |
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248 | /* VRAM to VRAM, buffer size sweep, common modes */ |
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249 | for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++) |
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250 | radeon_benchmark_move(rdev, common_modes[i], |
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251 | RADEON_GEM_DOMAIN_VRAM, |
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2005 | serge | 252 | RADEON_GEM_DOMAIN_VRAM); |
2997 | Serge | 253 | break; |
254 | |||
255 | default: |
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256 | DRM_ERROR("Unknown benchmark\n"); |
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257 | } |
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2005 | serge | 258 | }>>>=><=>=>=><=>=>=><=>=>>>> |