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6105 | serge | 1 | /* |
2 | * Copyright 2014 Advanced Micro Devices, Inc. |
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3 | * |
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4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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5 | * copy of this software and associated documentation files (the "Software"), |
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6 | * to deal in the Software without restriction, including without limitation |
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7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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8 | * and/or sell copies of the Software, and to permit persons to whom the |
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9 | * Software is furnished to do so, subject to the following conditions: |
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10 | * |
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11 | * The above copyright notice and this permission notice shall be included in |
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12 | * all copies or substantial portions of the Software. |
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13 | * |
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14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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20 | * OTHER DEALINGS IN THE SOFTWARE. |
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21 | * |
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22 | * Authors: Slava Grigorev |
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23 | */ |
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24 | |||
6321 | serge | 25 | #include |
6105 | serge | 26 | #include |
27 | #include |
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28 | #include "radeon.h" |
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29 | #include "atom.h" |
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30 | #include "radeon_audio.h" |
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31 | |||
32 | void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, |
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33 | u8 enable_mask); |
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34 | void dce4_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, |
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35 | u8 enable_mask); |
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36 | void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, |
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37 | u8 enable_mask); |
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38 | u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg); |
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39 | void dce6_endpoint_wreg(struct radeon_device *rdev, |
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40 | u32 offset, u32 reg, u32 v); |
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41 | void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder, |
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42 | struct cea_sad *sads, int sad_count); |
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43 | void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder, |
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44 | struct cea_sad *sads, int sad_count); |
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45 | void dce6_afmt_write_sad_regs(struct drm_encoder *encoder, |
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46 | struct cea_sad *sads, int sad_count); |
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47 | void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, |
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48 | u8 *sadb, int sad_count); |
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49 | void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, |
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50 | u8 *sadb, int sad_count); |
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51 | void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, |
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52 | u8 *sadb, int sad_count); |
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53 | void dce4_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, |
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54 | u8 *sadb, int sad_count); |
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55 | void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, |
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56 | u8 *sadb, int sad_count); |
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57 | void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, |
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58 | u8 *sadb, int sad_count); |
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59 | void dce4_afmt_write_latency_fields(struct drm_encoder *encoder, |
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60 | struct drm_connector *connector, struct drm_display_mode *mode); |
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61 | void dce6_afmt_write_latency_fields(struct drm_encoder *encoder, |
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62 | struct drm_connector *connector, struct drm_display_mode *mode); |
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63 | struct r600_audio_pin* r600_audio_get_pin(struct radeon_device *rdev); |
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64 | struct r600_audio_pin* dce6_audio_get_pin(struct radeon_device *rdev); |
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65 | void dce6_afmt_select_pin(struct drm_encoder *encoder); |
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66 | void r600_hdmi_audio_set_dto(struct radeon_device *rdev, |
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67 | struct radeon_crtc *crtc, unsigned int clock); |
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68 | void dce3_2_audio_set_dto(struct radeon_device *rdev, |
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69 | struct radeon_crtc *crtc, unsigned int clock); |
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70 | void dce4_hdmi_audio_set_dto(struct radeon_device *rdev, |
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71 | struct radeon_crtc *crtc, unsigned int clock); |
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72 | void dce4_dp_audio_set_dto(struct radeon_device *rdev, |
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73 | struct radeon_crtc *crtc, unsigned int clock); |
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74 | void dce6_hdmi_audio_set_dto(struct radeon_device *rdev, |
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75 | struct radeon_crtc *crtc, unsigned int clock); |
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76 | void dce6_dp_audio_set_dto(struct radeon_device *rdev, |
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77 | struct radeon_crtc *crtc, unsigned int clock); |
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78 | void r600_set_avi_packet(struct radeon_device *rdev, u32 offset, |
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79 | unsigned char *buffer, size_t size); |
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80 | void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset, |
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81 | unsigned char *buffer, size_t size); |
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82 | void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset, |
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83 | const struct radeon_hdmi_acr *acr); |
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84 | void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset, |
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85 | const struct radeon_hdmi_acr *acr); |
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86 | void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset, |
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87 | const struct radeon_hdmi_acr *acr); |
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88 | void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset); |
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89 | void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset); |
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90 | void dce4_hdmi_set_color_depth(struct drm_encoder *encoder, |
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91 | u32 offset, int bpc); |
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92 | void r600_set_audio_packet(struct drm_encoder *encoder, u32 offset); |
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93 | void dce3_2_set_audio_packet(struct drm_encoder *encoder, u32 offset); |
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94 | void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset); |
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95 | void r600_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); |
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96 | void dce3_2_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); |
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97 | void dce4_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); |
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98 | static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder, |
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99 | struct drm_display_mode *mode); |
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100 | static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, |
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101 | struct drm_display_mode *mode); |
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102 | void r600_hdmi_enable(struct drm_encoder *encoder, bool enable); |
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103 | void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); |
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104 | void evergreen_dp_enable(struct drm_encoder *encoder, bool enable); |
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105 | |||
106 | static const u32 pin_offsets[7] = |
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107 | { |
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108 | (0x5e00 - 0x5e00), |
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109 | (0x5e18 - 0x5e00), |
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110 | (0x5e30 - 0x5e00), |
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111 | (0x5e48 - 0x5e00), |
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112 | (0x5e60 - 0x5e00), |
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113 | (0x5e78 - 0x5e00), |
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114 | (0x5e90 - 0x5e00), |
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115 | }; |
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116 | |||
117 | static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg) |
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118 | { |
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119 | return RREG32(reg); |
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120 | } |
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121 | |||
122 | static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset, |
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123 | u32 reg, u32 v) |
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124 | { |
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125 | WREG32(reg, v); |
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126 | } |
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127 | |||
128 | static struct radeon_audio_basic_funcs r600_funcs = { |
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129 | .endpoint_rreg = radeon_audio_rreg, |
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130 | .endpoint_wreg = radeon_audio_wreg, |
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131 | .enable = r600_audio_enable, |
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132 | }; |
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133 | |||
134 | static struct radeon_audio_basic_funcs dce32_funcs = { |
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135 | .endpoint_rreg = radeon_audio_rreg, |
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136 | .endpoint_wreg = radeon_audio_wreg, |
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137 | .enable = r600_audio_enable, |
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138 | }; |
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139 | |||
140 | static struct radeon_audio_basic_funcs dce4_funcs = { |
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141 | .endpoint_rreg = radeon_audio_rreg, |
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142 | .endpoint_wreg = radeon_audio_wreg, |
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143 | .enable = dce4_audio_enable, |
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144 | }; |
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145 | |||
146 | static struct radeon_audio_basic_funcs dce6_funcs = { |
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147 | .endpoint_rreg = dce6_endpoint_rreg, |
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148 | .endpoint_wreg = dce6_endpoint_wreg, |
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149 | .enable = dce6_audio_enable, |
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150 | }; |
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151 | |||
152 | static struct radeon_audio_funcs r600_hdmi_funcs = { |
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153 | .get_pin = r600_audio_get_pin, |
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154 | .set_dto = r600_hdmi_audio_set_dto, |
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155 | .update_acr = r600_hdmi_update_acr, |
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156 | .set_vbi_packet = r600_set_vbi_packet, |
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157 | .set_avi_packet = r600_set_avi_packet, |
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158 | .set_audio_packet = r600_set_audio_packet, |
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159 | .set_mute = r600_set_mute, |
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160 | .mode_set = radeon_audio_hdmi_mode_set, |
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161 | .dpms = r600_hdmi_enable, |
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162 | }; |
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163 | |||
164 | static struct radeon_audio_funcs dce32_hdmi_funcs = { |
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165 | .get_pin = r600_audio_get_pin, |
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166 | .write_sad_regs = dce3_2_afmt_write_sad_regs, |
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167 | .write_speaker_allocation = dce3_2_afmt_hdmi_write_speaker_allocation, |
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168 | .set_dto = dce3_2_audio_set_dto, |
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169 | .update_acr = dce3_2_hdmi_update_acr, |
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170 | .set_vbi_packet = r600_set_vbi_packet, |
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171 | .set_avi_packet = r600_set_avi_packet, |
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172 | .set_audio_packet = dce3_2_set_audio_packet, |
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173 | .set_mute = dce3_2_set_mute, |
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174 | .mode_set = radeon_audio_hdmi_mode_set, |
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175 | .dpms = r600_hdmi_enable, |
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176 | }; |
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177 | |||
178 | static struct radeon_audio_funcs dce32_dp_funcs = { |
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179 | .get_pin = r600_audio_get_pin, |
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180 | .write_sad_regs = dce3_2_afmt_write_sad_regs, |
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181 | .write_speaker_allocation = dce3_2_afmt_dp_write_speaker_allocation, |
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182 | .set_dto = dce3_2_audio_set_dto, |
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183 | .set_avi_packet = r600_set_avi_packet, |
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184 | .set_audio_packet = dce3_2_set_audio_packet, |
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185 | }; |
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186 | |||
187 | static struct radeon_audio_funcs dce4_hdmi_funcs = { |
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188 | .get_pin = r600_audio_get_pin, |
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189 | .write_sad_regs = evergreen_hdmi_write_sad_regs, |
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190 | .write_speaker_allocation = dce4_afmt_hdmi_write_speaker_allocation, |
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191 | .write_latency_fields = dce4_afmt_write_latency_fields, |
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192 | .set_dto = dce4_hdmi_audio_set_dto, |
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193 | .update_acr = evergreen_hdmi_update_acr, |
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194 | .set_vbi_packet = dce4_set_vbi_packet, |
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195 | .set_color_depth = dce4_hdmi_set_color_depth, |
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196 | .set_avi_packet = evergreen_set_avi_packet, |
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197 | .set_audio_packet = dce4_set_audio_packet, |
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198 | .set_mute = dce4_set_mute, |
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199 | .mode_set = radeon_audio_hdmi_mode_set, |
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200 | .dpms = evergreen_hdmi_enable, |
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201 | }; |
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202 | |||
203 | static struct radeon_audio_funcs dce4_dp_funcs = { |
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204 | .get_pin = r600_audio_get_pin, |
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205 | .write_sad_regs = evergreen_hdmi_write_sad_regs, |
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206 | .write_speaker_allocation = dce4_afmt_dp_write_speaker_allocation, |
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207 | .write_latency_fields = dce4_afmt_write_latency_fields, |
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208 | .set_dto = dce4_dp_audio_set_dto, |
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209 | .set_avi_packet = evergreen_set_avi_packet, |
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210 | .set_audio_packet = dce4_set_audio_packet, |
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211 | .mode_set = radeon_audio_dp_mode_set, |
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212 | .dpms = evergreen_dp_enable, |
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213 | }; |
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214 | |||
215 | static struct radeon_audio_funcs dce6_hdmi_funcs = { |
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216 | .select_pin = dce6_afmt_select_pin, |
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217 | .get_pin = dce6_audio_get_pin, |
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218 | .write_sad_regs = dce6_afmt_write_sad_regs, |
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219 | .write_speaker_allocation = dce6_afmt_hdmi_write_speaker_allocation, |
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220 | .write_latency_fields = dce6_afmt_write_latency_fields, |
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221 | .set_dto = dce6_hdmi_audio_set_dto, |
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222 | .update_acr = evergreen_hdmi_update_acr, |
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223 | .set_vbi_packet = dce4_set_vbi_packet, |
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224 | .set_color_depth = dce4_hdmi_set_color_depth, |
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225 | .set_avi_packet = evergreen_set_avi_packet, |
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226 | .set_audio_packet = dce4_set_audio_packet, |
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227 | .set_mute = dce4_set_mute, |
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228 | .mode_set = radeon_audio_hdmi_mode_set, |
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229 | .dpms = evergreen_hdmi_enable, |
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230 | }; |
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231 | |||
232 | static struct radeon_audio_funcs dce6_dp_funcs = { |
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233 | .select_pin = dce6_afmt_select_pin, |
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234 | .get_pin = dce6_audio_get_pin, |
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235 | .write_sad_regs = dce6_afmt_write_sad_regs, |
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236 | .write_speaker_allocation = dce6_afmt_dp_write_speaker_allocation, |
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237 | .write_latency_fields = dce6_afmt_write_latency_fields, |
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238 | .set_dto = dce6_dp_audio_set_dto, |
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239 | .set_avi_packet = evergreen_set_avi_packet, |
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240 | .set_audio_packet = dce4_set_audio_packet, |
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241 | .mode_set = radeon_audio_dp_mode_set, |
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242 | .dpms = evergreen_dp_enable, |
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243 | }; |
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244 | |||
245 | static void radeon_audio_enable(struct radeon_device *rdev, |
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246 | struct r600_audio_pin *pin, u8 enable_mask) |
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247 | { |
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248 | struct drm_encoder *encoder; |
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249 | struct radeon_encoder *radeon_encoder; |
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250 | struct radeon_encoder_atom_dig *dig; |
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251 | int pin_count = 0; |
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252 | |||
253 | if (!pin) |
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254 | return; |
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255 | |||
256 | if (rdev->mode_info.mode_config_initialized) { |
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257 | list_for_each_entry(encoder, &rdev->ddev->mode_config.encoder_list, head) { |
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258 | if (radeon_encoder_is_digital(encoder)) { |
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259 | radeon_encoder = to_radeon_encoder(encoder); |
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260 | dig = radeon_encoder->enc_priv; |
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261 | if (dig->pin == pin) |
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262 | pin_count++; |
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263 | } |
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264 | } |
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265 | |||
266 | if ((pin_count > 1) && (enable_mask == 0)) |
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267 | return; |
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268 | } |
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269 | |||
270 | if (rdev->audio.funcs->enable) |
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271 | rdev->audio.funcs->enable(rdev, pin, enable_mask); |
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272 | } |
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273 | |||
274 | static void radeon_audio_interface_init(struct radeon_device *rdev) |
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275 | { |
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276 | if (ASIC_IS_DCE6(rdev)) { |
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277 | rdev->audio.funcs = &dce6_funcs; |
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278 | rdev->audio.hdmi_funcs = &dce6_hdmi_funcs; |
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279 | rdev->audio.dp_funcs = &dce6_dp_funcs; |
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280 | } else if (ASIC_IS_DCE4(rdev)) { |
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281 | rdev->audio.funcs = &dce4_funcs; |
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282 | rdev->audio.hdmi_funcs = &dce4_hdmi_funcs; |
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283 | rdev->audio.dp_funcs = &dce4_dp_funcs; |
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284 | } else if (ASIC_IS_DCE32(rdev)) { |
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285 | rdev->audio.funcs = &dce32_funcs; |
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286 | rdev->audio.hdmi_funcs = &dce32_hdmi_funcs; |
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287 | rdev->audio.dp_funcs = &dce32_dp_funcs; |
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288 | } else { |
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289 | rdev->audio.funcs = &r600_funcs; |
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290 | rdev->audio.hdmi_funcs = &r600_hdmi_funcs; |
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291 | rdev->audio.dp_funcs = 0; |
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292 | } |
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293 | } |
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294 | |||
295 | static int radeon_audio_chipset_supported(struct radeon_device *rdev) |
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296 | { |
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297 | return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev); |
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298 | } |
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299 | |||
300 | int radeon_audio_init(struct radeon_device *rdev) |
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301 | { |
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302 | int i; |
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303 | |||
304 | if (!radeon_audio || !radeon_audio_chipset_supported(rdev)) |
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305 | return 0; |
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306 | |||
307 | rdev->audio.enabled = true; |
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308 | |||
309 | if (ASIC_IS_DCE83(rdev)) /* KB: 2 streams, 3 endpoints */ |
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310 | rdev->audio.num_pins = 3; |
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311 | else if (ASIC_IS_DCE81(rdev)) /* KV: 4 streams, 7 endpoints */ |
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312 | rdev->audio.num_pins = 7; |
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313 | else if (ASIC_IS_DCE8(rdev)) /* BN/HW: 6 streams, 7 endpoints */ |
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314 | rdev->audio.num_pins = 7; |
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315 | else if (ASIC_IS_DCE64(rdev)) /* OL: 2 streams, 2 endpoints */ |
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316 | rdev->audio.num_pins = 2; |
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317 | else if (ASIC_IS_DCE61(rdev)) /* TN: 4 streams, 6 endpoints */ |
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318 | rdev->audio.num_pins = 6; |
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319 | else if (ASIC_IS_DCE6(rdev)) /* SI: 6 streams, 6 endpoints */ |
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320 | rdev->audio.num_pins = 6; |
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321 | else |
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322 | rdev->audio.num_pins = 1; |
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323 | |||
324 | for (i = 0; i < rdev->audio.num_pins; i++) { |
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325 | rdev->audio.pin[i].channels = -1; |
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326 | rdev->audio.pin[i].rate = -1; |
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327 | rdev->audio.pin[i].bits_per_sample = -1; |
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328 | rdev->audio.pin[i].status_bits = 0; |
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329 | rdev->audio.pin[i].category_code = 0; |
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330 | rdev->audio.pin[i].connected = false; |
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331 | rdev->audio.pin[i].offset = pin_offsets[i]; |
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332 | rdev->audio.pin[i].id = i; |
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333 | } |
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334 | |||
335 | radeon_audio_interface_init(rdev); |
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336 | |||
337 | /* disable audio. it will be set up later */ |
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338 | for (i = 0; i < rdev->audio.num_pins; i++) |
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339 | radeon_audio_enable(rdev, &rdev->audio.pin[i], 0); |
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340 | |||
341 | return 0; |
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342 | } |
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343 | |||
344 | u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg) |
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345 | { |
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346 | if (rdev->audio.funcs->endpoint_rreg) |
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347 | return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg); |
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348 | |||
349 | return 0; |
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350 | } |
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351 | |||
352 | void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset, |
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353 | u32 reg, u32 v) |
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354 | { |
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355 | if (rdev->audio.funcs->endpoint_wreg) |
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356 | rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v); |
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357 | } |
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358 | |||
359 | static void radeon_audio_write_sad_regs(struct drm_encoder *encoder) |
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360 | { |
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361 | struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); |
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362 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
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363 | struct cea_sad *sads; |
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364 | int sad_count; |
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365 | |||
366 | if (!connector) |
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367 | return; |
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368 | |||
369 | sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads); |
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370 | if (sad_count <= 0) { |
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371 | DRM_ERROR("Couldn't read SADs: %d\n", sad_count); |
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372 | return; |
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373 | } |
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374 | BUG_ON(!sads); |
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375 | |||
376 | if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs) |
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377 | radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count); |
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378 | |||
379 | kfree(sads); |
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380 | } |
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381 | |||
382 | static void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder) |
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383 | { |
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384 | struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); |
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385 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
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386 | u8 *sadb = NULL; |
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387 | int sad_count; |
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388 | |||
389 | if (!connector) |
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390 | return; |
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391 | |||
392 | sad_count = drm_edid_to_speaker_allocation(radeon_connector_edid(connector), |
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393 | &sadb); |
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394 | if (sad_count < 0) { |
||
395 | DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n", |
||
396 | sad_count); |
||
397 | sad_count = 0; |
||
398 | } |
||
399 | |||
400 | if (radeon_encoder->audio && radeon_encoder->audio->write_speaker_allocation) |
||
401 | radeon_encoder->audio->write_speaker_allocation(encoder, sadb, sad_count); |
||
402 | |||
403 | kfree(sadb); |
||
404 | } |
||
405 | |||
406 | static void radeon_audio_write_latency_fields(struct drm_encoder *encoder, |
||
407 | struct drm_display_mode *mode) |
||
408 | { |
||
409 | struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); |
||
410 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
||
411 | |||
412 | if (!connector) |
||
413 | return; |
||
414 | |||
415 | if (radeon_encoder->audio && radeon_encoder->audio->write_latency_fields) |
||
416 | radeon_encoder->audio->write_latency_fields(encoder, connector, mode); |
||
417 | } |
||
418 | |||
419 | struct r600_audio_pin* radeon_audio_get_pin(struct drm_encoder *encoder) |
||
420 | { |
||
421 | struct radeon_device *rdev = encoder->dev->dev_private; |
||
422 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
||
423 | |||
424 | if (radeon_encoder->audio && radeon_encoder->audio->get_pin) |
||
425 | return radeon_encoder->audio->get_pin(rdev); |
||
426 | |||
427 | return NULL; |
||
428 | } |
||
429 | |||
430 | static void radeon_audio_select_pin(struct drm_encoder *encoder) |
||
431 | { |
||
432 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
||
433 | |||
434 | if (radeon_encoder->audio && radeon_encoder->audio->select_pin) |
||
435 | radeon_encoder->audio->select_pin(encoder); |
||
436 | } |
||
437 | |||
438 | void radeon_audio_detect(struct drm_connector *connector, |
||
439 | struct drm_encoder *encoder, |
||
440 | enum drm_connector_status status) |
||
441 | { |
||
442 | struct drm_device *dev = connector->dev; |
||
443 | struct radeon_device *rdev = dev->dev_private; |
||
444 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
||
445 | struct radeon_encoder_atom_dig *dig; |
||
446 | |||
447 | if (!radeon_audio_chipset_supported(rdev)) |
||
448 | return; |
||
449 | |||
450 | if (!radeon_encoder_is_digital(encoder)) |
||
451 | return; |
||
452 | |||
453 | dig = radeon_encoder->enc_priv; |
||
454 | |||
455 | if (status == connector_status_connected) { |
||
456 | if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { |
||
457 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
||
458 | |||
459 | if (radeon_dp_getsinktype(radeon_connector) == |
||
460 | CONNECTOR_OBJECT_ID_DISPLAYPORT) |
||
461 | radeon_encoder->audio = rdev->audio.dp_funcs; |
||
462 | else |
||
463 | radeon_encoder->audio = rdev->audio.hdmi_funcs; |
||
464 | } else { |
||
465 | radeon_encoder->audio = rdev->audio.hdmi_funcs; |
||
466 | } |
||
467 | |||
468 | if (drm_detect_monitor_audio(radeon_connector_edid(connector))) { |
||
469 | if (!dig->pin) |
||
470 | dig->pin = radeon_audio_get_pin(encoder); |
||
471 | radeon_audio_enable(rdev, dig->pin, 0xf); |
||
472 | } else { |
||
473 | radeon_audio_enable(rdev, dig->pin, 0); |
||
474 | dig->pin = NULL; |
||
475 | } |
||
476 | } else { |
||
477 | radeon_audio_enable(rdev, dig->pin, 0); |
||
478 | dig->pin = NULL; |
||
479 | } |
||
480 | } |
||
481 | |||
482 | void radeon_audio_fini(struct radeon_device *rdev) |
||
483 | { |
||
484 | int i; |
||
485 | |||
486 | if (!rdev->audio.enabled) |
||
487 | return; |
||
488 | |||
489 | for (i = 0; i < rdev->audio.num_pins; i++) |
||
490 | radeon_audio_enable(rdev, &rdev->audio.pin[i], 0); |
||
491 | |||
492 | rdev->audio.enabled = false; |
||
493 | } |
||
494 | |||
495 | static void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock) |
||
496 | { |
||
497 | struct radeon_device *rdev = encoder->dev->dev_private; |
||
498 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
||
499 | struct radeon_crtc *crtc = to_radeon_crtc(encoder->crtc); |
||
500 | |||
501 | if (radeon_encoder->audio && radeon_encoder->audio->set_dto) |
||
502 | radeon_encoder->audio->set_dto(rdev, crtc, clock); |
||
503 | } |
||
504 | |||
505 | static int radeon_audio_set_avi_packet(struct drm_encoder *encoder, |
||
506 | struct drm_display_mode *mode) |
||
507 | { |
||
508 | struct radeon_device *rdev = encoder->dev->dev_private; |
||
509 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
||
510 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
||
511 | struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); |
||
512 | u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE]; |
||
513 | struct hdmi_avi_infoframe frame; |
||
514 | int err; |
||
515 | |||
516 | if (!connector) |
||
517 | return -EINVAL; |
||
518 | |||
519 | err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode); |
||
520 | if (err < 0) { |
||
521 | DRM_ERROR("failed to setup AVI infoframe: %d\n", err); |
||
522 | return err; |
||
523 | } |
||
524 | |||
525 | if (radeon_encoder->output_csc != RADEON_OUTPUT_CSC_BYPASS) { |
||
526 | if (drm_rgb_quant_range_selectable(radeon_connector_edid(connector))) { |
||
527 | if (radeon_encoder->output_csc == RADEON_OUTPUT_CSC_TVRGB) |
||
528 | frame.quantization_range = HDMI_QUANTIZATION_RANGE_LIMITED; |
||
529 | else |
||
530 | frame.quantization_range = HDMI_QUANTIZATION_RANGE_FULL; |
||
531 | } else { |
||
532 | frame.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT; |
||
533 | } |
||
534 | } |
||
535 | |||
536 | err = hdmi_avi_infoframe_pack(&frame, buffer, sizeof(buffer)); |
||
537 | if (err < 0) { |
||
538 | DRM_ERROR("failed to pack AVI infoframe: %d\n", err); |
||
539 | return err; |
||
540 | } |
||
541 | |||
542 | if (dig && dig->afmt && radeon_encoder->audio && |
||
543 | radeon_encoder->audio->set_avi_packet) |
||
544 | radeon_encoder->audio->set_avi_packet(rdev, dig->afmt->offset, |
||
545 | buffer, sizeof(buffer)); |
||
546 | |||
547 | return 0; |
||
548 | } |
||
549 | |||
550 | /* |
||
551 | * calculate CTS and N values if they are not found in the table |
||
552 | */ |
||
553 | static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq) |
||
554 | { |
||
555 | int n, cts; |
||
556 | unsigned long div, mul; |
||
557 | |||
558 | /* Safe, but overly large values */ |
||
559 | n = 128 * freq; |
||
560 | cts = clock * 1000; |
||
561 | |||
562 | /* Smallest valid fraction */ |
||
563 | div = gcd(n, cts); |
||
564 | |||
565 | n /= div; |
||
566 | cts /= div; |
||
567 | |||
568 | /* |
||
569 | * The optimal N is 128*freq/1000. Calculate the closest larger |
||
570 | * value that doesn't truncate any bits. |
||
571 | */ |
||
572 | mul = ((128*freq/1000) + (n-1))/n; |
||
573 | |||
574 | n *= mul; |
||
575 | cts *= mul; |
||
576 | |||
577 | /* Check that we are in spec (not always possible) */ |
||
578 | if (n < (128*freq/1500)) |
||
579 | printk(KERN_WARNING "Calculated ACR N value is too small. You may experience audio problems.\n"); |
||
580 | if (n > (128*freq/300)) |
||
581 | printk(KERN_WARNING "Calculated ACR N value is too large. You may experience audio problems.\n"); |
||
582 | |||
583 | *N = n; |
||
584 | *CTS = cts; |
||
585 | |||
586 | DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n", |
||
587 | *N, *CTS, freq); |
||
588 | } |
||
589 | |||
590 | static const struct radeon_hdmi_acr* radeon_audio_acr(unsigned int clock) |
||
591 | { |
||
592 | static struct radeon_hdmi_acr res; |
||
593 | u8 i; |
||
594 | |||
595 | static const struct radeon_hdmi_acr hdmi_predefined_acr[] = { |
||
596 | /* 32kHz 44.1kHz 48kHz */ |
||
597 | /* Clock N CTS N CTS N CTS */ |
||
598 | { 25175, 4096, 25175, 28224, 125875, 6144, 25175 }, /* 25,20/1.001 MHz */ |
||
599 | { 25200, 4096, 25200, 6272, 28000, 6144, 25200 }, /* 25.20 MHz */ |
||
600 | { 27000, 4096, 27000, 6272, 30000, 6144, 27000 }, /* 27.00 MHz */ |
||
601 | { 27027, 4096, 27027, 6272, 30030, 6144, 27027 }, /* 27.00*1.001 MHz */ |
||
602 | { 54000, 4096, 54000, 6272, 60000, 6144, 54000 }, /* 54.00 MHz */ |
||
603 | { 54054, 4096, 54054, 6272, 60060, 6144, 54054 }, /* 54.00*1.001 MHz */ |
||
604 | { 74176, 4096, 74176, 5733, 75335, 6144, 74176 }, /* 74.25/1.001 MHz */ |
||
605 | { 74250, 4096, 74250, 6272, 82500, 6144, 74250 }, /* 74.25 MHz */ |
||
606 | { 148352, 4096, 148352, 5733, 150670, 6144, 148352 }, /* 148.50/1.001 MHz */ |
||
607 | { 148500, 4096, 148500, 6272, 165000, 6144, 148500 }, /* 148.50 MHz */ |
||
608 | }; |
||
609 | |||
610 | /* Precalculated values for common clocks */ |
||
611 | for (i = 0; i < ARRAY_SIZE(hdmi_predefined_acr); i++) |
||
612 | if (hdmi_predefined_acr[i].clock == clock) |
||
613 | return &hdmi_predefined_acr[i]; |
||
614 | |||
615 | /* And odd clocks get manually calculated */ |
||
616 | radeon_audio_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000); |
||
617 | radeon_audio_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100); |
||
618 | radeon_audio_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000); |
||
619 | |||
620 | return &res; |
||
621 | } |
||
622 | |||
623 | /* |
||
624 | * update the N and CTS parameters for a given pixel clock rate |
||
625 | */ |
||
626 | static void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock) |
||
627 | { |
||
628 | const struct radeon_hdmi_acr *acr = radeon_audio_acr(clock); |
||
629 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
||
630 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
||
631 | |||
632 | if (!dig || !dig->afmt) |
||
633 | return; |
||
634 | |||
635 | if (radeon_encoder->audio && radeon_encoder->audio->update_acr) |
||
636 | radeon_encoder->audio->update_acr(encoder, dig->afmt->offset, acr); |
||
637 | } |
||
638 | |||
639 | static void radeon_audio_set_vbi_packet(struct drm_encoder *encoder) |
||
640 | { |
||
641 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
||
642 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
||
643 | |||
644 | if (!dig || !dig->afmt) |
||
645 | return; |
||
646 | |||
647 | if (radeon_encoder->audio && radeon_encoder->audio->set_vbi_packet) |
||
648 | radeon_encoder->audio->set_vbi_packet(encoder, dig->afmt->offset); |
||
649 | } |
||
650 | |||
651 | static void radeon_hdmi_set_color_depth(struct drm_encoder *encoder) |
||
652 | { |
||
653 | int bpc = 8; |
||
654 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
||
655 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
||
656 | |||
657 | if (!dig || !dig->afmt) |
||
658 | return; |
||
659 | |||
660 | if (encoder->crtc) { |
||
661 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); |
||
662 | bpc = radeon_crtc->bpc; |
||
663 | } |
||
664 | |||
665 | if (radeon_encoder->audio && radeon_encoder->audio->set_color_depth) |
||
666 | radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc); |
||
667 | } |
||
668 | |||
669 | static void radeon_audio_set_audio_packet(struct drm_encoder *encoder) |
||
670 | { |
||
671 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
||
672 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
||
673 | |||
674 | if (!dig || !dig->afmt) |
||
675 | return; |
||
676 | |||
677 | if (radeon_encoder->audio && radeon_encoder->audio->set_audio_packet) |
||
678 | radeon_encoder->audio->set_audio_packet(encoder, dig->afmt->offset); |
||
679 | } |
||
680 | |||
681 | static void radeon_audio_set_mute(struct drm_encoder *encoder, bool mute) |
||
682 | { |
||
683 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
||
684 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
||
685 | |||
686 | if (!dig || !dig->afmt) |
||
687 | return; |
||
688 | |||
689 | if (radeon_encoder->audio && radeon_encoder->audio->set_mute) |
||
690 | radeon_encoder->audio->set_mute(encoder, dig->afmt->offset, mute); |
||
691 | } |
||
692 | |||
693 | /* |
||
694 | * update the info frames with the data from the current display mode |
||
695 | */ |
||
696 | static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder, |
||
697 | struct drm_display_mode *mode) |
||
698 | { |
||
699 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
||
700 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
||
701 | struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); |
||
702 | |||
703 | if (!dig || !dig->afmt) |
||
704 | return; |
||
705 | |||
706 | if (!connector) |
||
707 | return; |
||
708 | |||
709 | if (drm_detect_monitor_audio(radeon_connector_edid(connector))) { |
||
710 | radeon_audio_set_mute(encoder, true); |
||
711 | |||
712 | radeon_audio_write_speaker_allocation(encoder); |
||
713 | radeon_audio_write_sad_regs(encoder); |
||
714 | radeon_audio_write_latency_fields(encoder, mode); |
||
715 | radeon_audio_set_dto(encoder, mode->clock); |
||
716 | radeon_audio_set_vbi_packet(encoder); |
||
717 | radeon_hdmi_set_color_depth(encoder); |
||
718 | radeon_audio_update_acr(encoder, mode->clock); |
||
719 | radeon_audio_set_audio_packet(encoder); |
||
720 | radeon_audio_select_pin(encoder); |
||
721 | |||
722 | if (radeon_audio_set_avi_packet(encoder, mode) < 0) |
||
723 | return; |
||
724 | |||
725 | radeon_audio_set_mute(encoder, false); |
||
726 | } else { |
||
727 | radeon_hdmi_set_color_depth(encoder); |
||
728 | |||
729 | if (radeon_audio_set_avi_packet(encoder, mode) < 0) |
||
730 | return; |
||
731 | } |
||
732 | } |
||
733 | |||
734 | static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, |
||
735 | struct drm_display_mode *mode) |
||
736 | { |
||
737 | struct drm_device *dev = encoder->dev; |
||
738 | struct radeon_device *rdev = dev->dev_private; |
||
739 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
||
740 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
||
741 | struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); |
||
742 | |||
743 | if (!dig || !dig->afmt) |
||
744 | return; |
||
745 | |||
746 | if (!connector) |
||
747 | return; |
||
748 | |||
749 | if (drm_detect_monitor_audio(radeon_connector_edid(connector))) { |
||
750 | radeon_audio_write_speaker_allocation(encoder); |
||
751 | radeon_audio_write_sad_regs(encoder); |
||
752 | radeon_audio_write_latency_fields(encoder, mode); |
||
6321 | serge | 753 | radeon_audio_set_dto(encoder, rdev->clock.vco_freq * 10); |
6105 | serge | 754 | radeon_audio_set_audio_packet(encoder); |
755 | radeon_audio_select_pin(encoder); |
||
756 | |||
757 | if (radeon_audio_set_avi_packet(encoder, mode) < 0) |
||
758 | return; |
||
759 | } |
||
760 | } |
||
761 | |||
762 | void radeon_audio_mode_set(struct drm_encoder *encoder, |
||
763 | struct drm_display_mode *mode) |
||
764 | { |
||
765 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
||
766 | |||
767 | if (radeon_encoder->audio && radeon_encoder->audio->mode_set) |
||
768 | radeon_encoder->audio->mode_set(encoder, mode); |
||
769 | } |
||
770 | |||
771 | void radeon_audio_dpms(struct drm_encoder *encoder, int mode) |
||
772 | { |
||
773 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
||
774 | |||
775 | if (radeon_encoder->audio && radeon_encoder->audio->dpms) |
||
776 | radeon_encoder->audio->dpms(encoder, mode == DRM_MODE_DPMS_ON); |
||
777 | } |
||
6321 | serge | 778 | |
779 | unsigned int radeon_audio_decode_dfs_div(unsigned int div) |
||
780 | { |
||
781 | if (div >= 8 && div < 64) |
||
782 | return (div - 8) * 25 + 200; |
||
783 | else if (div >= 64 && div < 96) |
||
784 | return (div - 64) * 50 + 1600; |
||
785 | else if (div >= 96 && div < 128) |
||
786 | return (div - 96) * 100 + 3200; |
||
787 | else |
||
788 | return 0; |
||
789 | }>>>>>>>>>>>>=>>> |