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1117 | serge | 1 | /* |
2 | * Copyright 2008 Advanced Micro Devices, Inc. |
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3 | * Copyright 2008 Red Hat Inc. |
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4 | * Copyright 2009 Jerome Glisse. |
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5 | * |
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6 | * Permission is hereby granted, free of charge, to any person obtaining a |
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7 | * copy of this software and associated documentation files (the "Software"), |
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8 | * to deal in the Software without restriction, including without limitation |
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9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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10 | * and/or sell copies of the Software, and to permit persons to whom the |
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11 | * Software is furnished to do so, subject to the following conditions: |
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12 | * |
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13 | * The above copyright notice and this permission notice shall be included in |
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14 | * all copies or substantial portions of the Software. |
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15 | * |
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16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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22 | * OTHER DEALINGS IN THE SOFTWARE. |
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23 | * |
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24 | * Authors: Dave Airlie |
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25 | * Alex Deucher |
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26 | * Jerome Glisse |
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27 | */ |
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28 | #ifndef __RADEON_ASIC_H__ |
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29 | #define __RADEON_ASIC_H__ |
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30 | |||
31 | /* |
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32 | * common functions |
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33 | */ |
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1268 | serge | 34 | uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev); |
1117 | serge | 35 | void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); |
1403 | serge | 36 | uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev); |
1117 | serge | 37 | void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable); |
38 | |||
1268 | serge | 39 | uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev); |
1117 | serge | 40 | void radeon_atom_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); |
1268 | serge | 41 | uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev); |
1117 | serge | 42 | void radeon_atom_set_memory_clock(struct radeon_device *rdev, uint32_t mem_clock); |
43 | void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable); |
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44 | |||
45 | /* |
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1430 | serge | 46 | * r100,rv100,rs100,rv200,rs200 |
1117 | serge | 47 | */ |
1963 | serge | 48 | struct r100_mc_save { |
49 | u32 GENMO_WT; |
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50 | u32 CRTC_EXT_CNTL; |
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51 | u32 CRTC_GEN_CNTL; |
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52 | u32 CRTC2_GEN_CNTL; |
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53 | u32 CUR_OFFSET; |
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54 | u32 CUR2_OFFSET; |
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55 | }; |
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56 | int r100_init(struct radeon_device *rdev); |
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57 | void r100_fini(struct radeon_device *rdev); |
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58 | int r100_suspend(struct radeon_device *rdev); |
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59 | int r100_resume(struct radeon_device *rdev); |
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1179 | serge | 60 | void r100_vga_set_state(struct radeon_device *rdev, bool state); |
1963 | serge | 61 | bool r100_gpu_is_lockup(struct radeon_device *rdev); |
62 | int r100_asic_reset(struct radeon_device *rdev); |
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1179 | serge | 63 | u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc); |
1117 | serge | 64 | void r100_pci_gart_tlb_flush(struct radeon_device *rdev); |
65 | int r100_pci_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr); |
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1179 | serge | 66 | void r100_cp_commit(struct radeon_device *rdev); |
1117 | serge | 67 | void r100_ring_start(struct radeon_device *rdev); |
68 | int r100_irq_set(struct radeon_device *rdev); |
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69 | int r100_irq_process(struct radeon_device *rdev); |
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1128 | serge | 70 | void r100_fence_ring_emit(struct radeon_device *rdev, |
71 | struct radeon_fence *fence); |
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72 | int r100_cs_parse(struct radeon_cs_parser *p); |
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1117 | serge | 73 | void r100_pll_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
74 | uint32_t r100_pll_rreg(struct radeon_device *rdev, uint32_t reg); |
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1128 | serge | 75 | int r100_copy_blit(struct radeon_device *rdev, |
76 | uint64_t src_offset, |
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77 | uint64_t dst_offset, |
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78 | unsigned num_pages, |
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79 | struct radeon_fence *fence); |
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1179 | serge | 80 | int r100_set_surface_reg(struct radeon_device *rdev, int reg, |
81 | uint32_t tiling_flags, uint32_t pitch, |
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82 | uint32_t offset, uint32_t obj_size); |
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1963 | serge | 83 | void r100_clear_surface_reg(struct radeon_device *rdev, int reg); |
1179 | serge | 84 | void r100_bandwidth_update(struct radeon_device *rdev); |
85 | void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
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86 | int r100_ring_test(struct radeon_device *rdev); |
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1321 | serge | 87 | void r100_hpd_init(struct radeon_device *rdev); |
88 | void r100_hpd_fini(struct radeon_device *rdev); |
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89 | bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); |
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90 | void r100_hpd_set_polarity(struct radeon_device *rdev, |
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91 | enum radeon_hpd_id hpd); |
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1963 | serge | 92 | int r100_debugfs_rbbm_init(struct radeon_device *rdev); |
93 | int r100_debugfs_cp_init(struct radeon_device *rdev); |
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94 | void r100_cp_disable(struct radeon_device *rdev); |
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95 | int r100_cp_init(struct radeon_device *rdev, unsigned ring_size); |
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96 | void r100_cp_fini(struct radeon_device *rdev); |
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97 | int r100_pci_gart_init(struct radeon_device *rdev); |
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98 | void r100_pci_gart_fini(struct radeon_device *rdev); |
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99 | int r100_pci_gart_enable(struct radeon_device *rdev); |
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100 | void r100_pci_gart_disable(struct radeon_device *rdev); |
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101 | int r100_debugfs_mc_info_init(struct radeon_device *rdev); |
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102 | int r100_gui_wait_for_idle(struct radeon_device *rdev); |
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103 | void r100_gpu_lockup_update(struct r100_gpu_lockup *lockup, |
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104 | struct radeon_cp *cp); |
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105 | bool r100_gpu_cp_is_lockup(struct radeon_device *rdev, |
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106 | struct r100_gpu_lockup *lockup, |
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107 | struct radeon_cp *cp); |
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108 | void r100_ib_fini(struct radeon_device *rdev); |
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109 | int r100_ib_init(struct radeon_device *rdev); |
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110 | void r100_irq_disable(struct radeon_device *rdev); |
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111 | void r100_mc_stop(struct radeon_device *rdev, struct r100_mc_save *save); |
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112 | void r100_mc_resume(struct radeon_device *rdev, struct r100_mc_save *save); |
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113 | void r100_vram_init_sizes(struct radeon_device *rdev); |
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114 | int r100_cp_reset(struct radeon_device *rdev); |
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115 | void r100_vga_render_disable(struct radeon_device *rdev); |
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116 | void r100_restore_sanity(struct radeon_device *rdev); |
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117 | int r100_cs_track_check_pkt3_indx_buffer(struct radeon_cs_parser *p, |
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118 | struct radeon_cs_packet *pkt, |
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119 | struct radeon_bo *robj); |
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120 | int r100_cs_parse_packet0(struct radeon_cs_parser *p, |
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121 | struct radeon_cs_packet *pkt, |
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122 | const unsigned *auth, unsigned n, |
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123 | radeon_packet0_check_t check); |
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124 | int r100_cs_packet_parse(struct radeon_cs_parser *p, |
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125 | struct radeon_cs_packet *pkt, |
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126 | unsigned idx); |
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127 | void r100_enable_bm(struct radeon_device *rdev); |
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128 | void r100_set_common_regs(struct radeon_device *rdev); |
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129 | void r100_bm_disable(struct radeon_device *rdev); |
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130 | extern bool r100_gui_idle(struct radeon_device *rdev); |
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131 | extern void r100_pm_misc(struct radeon_device *rdev); |
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132 | extern void r100_pm_prepare(struct radeon_device *rdev); |
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133 | extern void r100_pm_finish(struct radeon_device *rdev); |
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134 | extern void r100_pm_init_profile(struct radeon_device *rdev); |
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135 | extern void r100_pm_get_dynpm_state(struct radeon_device *rdev); |
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136 | extern void r100_pre_page_flip(struct radeon_device *rdev, int crtc); |
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137 | extern u32 r100_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); |
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138 | extern void r100_post_page_flip(struct radeon_device *rdev, int crtc); |
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1117 | serge | 139 | |
1430 | serge | 140 | /* |
141 | * r200,rv250,rs300,rv280 |
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142 | */ |
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143 | extern int r200_copy_dma(struct radeon_device *rdev, |
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144 | uint64_t src_offset, |
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145 | uint64_t dst_offset, |
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146 | unsigned num_pages, |
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147 | struct radeon_fence *fence); |
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1963 | serge | 148 | void r200_set_safe_registers(struct radeon_device *rdev); |
1117 | serge | 149 | |
150 | /* |
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151 | * r300,r350,rv350,rv380 |
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152 | */ |
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1221 | serge | 153 | extern int r300_init(struct radeon_device *rdev); |
154 | extern void r300_fini(struct radeon_device *rdev); |
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155 | extern int r300_suspend(struct radeon_device *rdev); |
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156 | extern int r300_resume(struct radeon_device *rdev); |
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1963 | serge | 157 | extern bool r300_gpu_is_lockup(struct radeon_device *rdev); |
158 | extern int r300_asic_reset(struct radeon_device *rdev); |
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1221 | serge | 159 | extern void r300_ring_start(struct radeon_device *rdev); |
160 | extern void r300_fence_ring_emit(struct radeon_device *rdev, |
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1128 | serge | 161 | struct radeon_fence *fence); |
1221 | serge | 162 | extern int r300_cs_parse(struct radeon_cs_parser *p); |
163 | extern void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev); |
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164 | extern int rv370_pcie_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr); |
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165 | extern void rv370_set_pcie_lanes(struct radeon_device *rdev, int lanes); |
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1430 | serge | 166 | extern int rv370_get_pcie_lanes(struct radeon_device *rdev); |
1963 | serge | 167 | extern void r300_set_reg_safe(struct radeon_device *rdev); |
168 | extern void r300_mc_program(struct radeon_device *rdev); |
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169 | extern void r300_mc_init(struct radeon_device *rdev); |
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170 | extern void r300_clock_startup(struct radeon_device *rdev); |
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171 | extern int r300_mc_wait_for_idle(struct radeon_device *rdev); |
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172 | extern int rv370_pcie_gart_init(struct radeon_device *rdev); |
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173 | extern void rv370_pcie_gart_fini(struct radeon_device *rdev); |
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174 | extern int rv370_pcie_gart_enable(struct radeon_device *rdev); |
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175 | extern void rv370_pcie_gart_disable(struct radeon_device *rdev); |
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1430 | serge | 176 | |
1117 | serge | 177 | /* |
178 | * r420,r423,rv410 |
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179 | */ |
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1179 | serge | 180 | extern int r420_init(struct radeon_device *rdev); |
181 | extern void r420_fini(struct radeon_device *rdev); |
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182 | extern int r420_suspend(struct radeon_device *rdev); |
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183 | extern int r420_resume(struct radeon_device *rdev); |
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1963 | serge | 184 | extern void r420_pm_init_profile(struct radeon_device *rdev); |
185 | extern u32 r420_mc_rreg(struct radeon_device *rdev, u32 reg); |
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186 | extern void r420_mc_wreg(struct radeon_device *rdev, u32 reg, u32 v); |
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187 | extern int r420_debugfs_pipes_info_init(struct radeon_device *rdev); |
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188 | extern void r420_pipes_init(struct radeon_device *rdev); |
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1117 | serge | 189 | |
190 | /* |
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191 | * rs400,rs480 |
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192 | */ |
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1221 | serge | 193 | extern int rs400_init(struct radeon_device *rdev); |
194 | extern void rs400_fini(struct radeon_device *rdev); |
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195 | extern int rs400_suspend(struct radeon_device *rdev); |
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196 | extern int rs400_resume(struct radeon_device *rdev); |
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1117 | serge | 197 | void rs400_gart_tlb_flush(struct radeon_device *rdev); |
198 | int rs400_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr); |
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199 | uint32_t rs400_mc_rreg(struct radeon_device *rdev, uint32_t reg); |
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200 | void rs400_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
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1963 | serge | 201 | int rs400_gart_init(struct radeon_device *rdev); |
202 | int rs400_gart_enable(struct radeon_device *rdev); |
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203 | void rs400_gart_adjust_size(struct radeon_device *rdev); |
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204 | void rs400_gart_disable(struct radeon_device *rdev); |
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205 | void rs400_gart_fini(struct radeon_device *rdev); |
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1117 | serge | 206 | |
207 | /* |
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208 | * rs600. |
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209 | */ |
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1963 | serge | 210 | extern int rs600_asic_reset(struct radeon_device *rdev); |
1221 | serge | 211 | extern int rs600_init(struct radeon_device *rdev); |
212 | extern void rs600_fini(struct radeon_device *rdev); |
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213 | extern int rs600_suspend(struct radeon_device *rdev); |
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214 | extern int rs600_resume(struct radeon_device *rdev); |
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1117 | serge | 215 | int rs600_irq_set(struct radeon_device *rdev); |
1179 | serge | 216 | int rs600_irq_process(struct radeon_device *rdev); |
1963 | serge | 217 | void rs600_irq_disable(struct radeon_device *rdev); |
1179 | serge | 218 | u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc); |
1117 | serge | 219 | void rs600_gart_tlb_flush(struct radeon_device *rdev); |
220 | int rs600_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr); |
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221 | uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg); |
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222 | void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
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1179 | serge | 223 | void rs600_bandwidth_update(struct radeon_device *rdev); |
1321 | serge | 224 | void rs600_hpd_init(struct radeon_device *rdev); |
225 | void rs600_hpd_fini(struct radeon_device *rdev); |
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226 | bool rs600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); |
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227 | void rs600_hpd_set_polarity(struct radeon_device *rdev, |
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228 | enum radeon_hpd_id hpd); |
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1963 | serge | 229 | extern void rs600_pm_misc(struct radeon_device *rdev); |
230 | extern void rs600_pm_prepare(struct radeon_device *rdev); |
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231 | extern void rs600_pm_finish(struct radeon_device *rdev); |
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232 | extern void rs600_pre_page_flip(struct radeon_device *rdev, int crtc); |
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233 | extern u32 rs600_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); |
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234 | extern void rs600_post_page_flip(struct radeon_device *rdev, int crtc); |
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235 | void rs600_set_safe_registers(struct radeon_device *rdev); |
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1321 | serge | 236 | |
1117 | serge | 237 | |
238 | /* |
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239 | * rs690,rs740 |
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240 | */ |
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1221 | serge | 241 | int rs690_init(struct radeon_device *rdev); |
242 | void rs690_fini(struct radeon_device *rdev); |
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243 | int rs690_resume(struct radeon_device *rdev); |
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244 | int rs690_suspend(struct radeon_device *rdev); |
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1117 | serge | 245 | uint32_t rs690_mc_rreg(struct radeon_device *rdev, uint32_t reg); |
246 | void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
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1179 | serge | 247 | void rs690_bandwidth_update(struct radeon_device *rdev); |
1963 | serge | 248 | void rs690_line_buffer_adjust(struct radeon_device *rdev, |
249 | struct drm_display_mode *mode1, |
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250 | struct drm_display_mode *mode2); |
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1117 | serge | 251 | |
252 | /* |
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253 | * rv515 |
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254 | */ |
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1963 | serge | 255 | struct rv515_mc_save { |
256 | u32 d1vga_control; |
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257 | u32 d2vga_control; |
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258 | u32 vga_render_control; |
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259 | u32 vga_hdp_control; |
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260 | u32 d1crtc_control; |
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261 | u32 d2crtc_control; |
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262 | }; |
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1117 | serge | 263 | int rv515_init(struct radeon_device *rdev); |
1221 | serge | 264 | void rv515_fini(struct radeon_device *rdev); |
1117 | serge | 265 | uint32_t rv515_mc_rreg(struct radeon_device *rdev, uint32_t reg); |
266 | void rv515_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
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267 | void rv515_ring_start(struct radeon_device *rdev); |
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1179 | serge | 268 | void rv515_bandwidth_update(struct radeon_device *rdev); |
1221 | serge | 269 | int rv515_resume(struct radeon_device *rdev); |
270 | int rv515_suspend(struct radeon_device *rdev); |
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1963 | serge | 271 | void rv515_bandwidth_avivo_update(struct radeon_device *rdev); |
272 | void rv515_vga_render_disable(struct radeon_device *rdev); |
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273 | void rv515_set_safe_registers(struct radeon_device *rdev); |
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274 | void rv515_mc_stop(struct radeon_device *rdev, struct rv515_mc_save *save); |
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275 | void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save); |
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276 | void rv515_clock_startup(struct radeon_device *rdev); |
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277 | void rv515_debugfs(struct radeon_device *rdev); |
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1117 | serge | 278 | |
279 | |||
280 | /* |
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281 | * r520,rv530,rv560,rv570,r580 |
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282 | */ |
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1221 | serge | 283 | int r520_init(struct radeon_device *rdev); |
284 | int r520_resume(struct radeon_device *rdev); |
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1117 | serge | 285 | |
286 | /* |
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1221 | serge | 287 | * r600,rv610,rv630,rv620,rv635,rv670,rs780,rs880 |
1117 | serge | 288 | */ |
1179 | serge | 289 | int r600_init(struct radeon_device *rdev); |
290 | void r600_fini(struct radeon_device *rdev); |
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291 | int r600_suspend(struct radeon_device *rdev); |
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292 | int r600_resume(struct radeon_device *rdev); |
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293 | void r600_vga_set_state(struct radeon_device *rdev, bool state); |
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294 | int r600_wb_init(struct radeon_device *rdev); |
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295 | void r600_wb_fini(struct radeon_device *rdev); |
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296 | void r600_cp_commit(struct radeon_device *rdev); |
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297 | void r600_pcie_gart_tlb_flush(struct radeon_device *rdev); |
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1117 | serge | 298 | uint32_t r600_pciep_rreg(struct radeon_device *rdev, uint32_t reg); |
299 | void r600_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
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1233 | serge | 300 | int r600_cs_parse(struct radeon_cs_parser *p); |
301 | void r600_fence_ring_emit(struct radeon_device *rdev, |
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302 | struct radeon_fence *fence); |
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1963 | serge | 303 | bool r600_gpu_is_lockup(struct radeon_device *rdev); |
304 | int r600_asic_reset(struct radeon_device *rdev); |
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1233 | serge | 305 | int r600_set_surface_reg(struct radeon_device *rdev, int reg, |
306 | uint32_t tiling_flags, uint32_t pitch, |
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307 | uint32_t offset, uint32_t obj_size); |
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1963 | serge | 308 | void r600_clear_surface_reg(struct radeon_device *rdev, int reg); |
309 | int r600_ib_test(struct radeon_device *rdev); |
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1233 | serge | 310 | void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
311 | int r600_ring_test(struct radeon_device *rdev); |
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312 | int r600_copy_blit(struct radeon_device *rdev, |
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313 | uint64_t src_offset, uint64_t dst_offset, |
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314 | unsigned num_pages, struct radeon_fence *fence); |
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1321 | serge | 315 | void r600_hpd_init(struct radeon_device *rdev); |
316 | void r600_hpd_fini(struct radeon_device *rdev); |
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317 | bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); |
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318 | void r600_hpd_set_polarity(struct radeon_device *rdev, |
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319 | enum radeon_hpd_id hpd); |
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1404 | serge | 320 | extern void r600_ioctl_wait_idle(struct radeon_device *rdev, struct radeon_bo *bo); |
1963 | serge | 321 | extern bool r600_gui_idle(struct radeon_device *rdev); |
322 | extern void r600_pm_misc(struct radeon_device *rdev); |
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323 | extern void r600_pm_init_profile(struct radeon_device *rdev); |
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324 | extern void rs780_pm_init_profile(struct radeon_device *rdev); |
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325 | extern void r600_pm_get_dynpm_state(struct radeon_device *rdev); |
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326 | extern void r600_set_pcie_lanes(struct radeon_device *rdev, int lanes); |
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327 | extern int r600_get_pcie_lanes(struct radeon_device *rdev); |
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328 | bool r600_card_posted(struct radeon_device *rdev); |
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329 | void r600_cp_stop(struct radeon_device *rdev); |
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330 | int r600_cp_start(struct radeon_device *rdev); |
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331 | void r600_ring_init(struct radeon_device *rdev, unsigned ring_size); |
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332 | int r600_cp_resume(struct radeon_device *rdev); |
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333 | void r600_cp_fini(struct radeon_device *rdev); |
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334 | int r600_count_pipe_bits(uint32_t val); |
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335 | int r600_mc_wait_for_idle(struct radeon_device *rdev); |
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336 | int r600_pcie_gart_init(struct radeon_device *rdev); |
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337 | void r600_scratch_init(struct radeon_device *rdev); |
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338 | int r600_blit_init(struct radeon_device *rdev); |
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339 | void r600_blit_fini(struct radeon_device *rdev); |
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340 | int r600_init_microcode(struct radeon_device *rdev); |
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341 | /* r600 irq */ |
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342 | int r600_irq_process(struct radeon_device *rdev); |
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343 | int r600_irq_init(struct radeon_device *rdev); |
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344 | void r600_irq_fini(struct radeon_device *rdev); |
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345 | void r600_ih_ring_init(struct radeon_device *rdev, unsigned ring_size); |
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346 | int r600_irq_set(struct radeon_device *rdev); |
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347 | void r600_irq_suspend(struct radeon_device *rdev); |
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348 | void r600_disable_interrupts(struct radeon_device *rdev); |
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349 | void r600_rlc_stop(struct radeon_device *rdev); |
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350 | /* r600 audio */ |
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351 | int r600_audio_init(struct radeon_device *rdev); |
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352 | int r600_audio_tmds_index(struct drm_encoder *encoder); |
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353 | void r600_audio_set_clock(struct drm_encoder *encoder, int clock); |
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354 | int r600_audio_channels(struct radeon_device *rdev); |
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355 | int r600_audio_bits_per_sample(struct radeon_device *rdev); |
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356 | int r600_audio_rate(struct radeon_device *rdev); |
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357 | uint8_t r600_audio_status_bits(struct radeon_device *rdev); |
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358 | uint8_t r600_audio_category_code(struct radeon_device *rdev); |
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359 | void r600_audio_schedule_polling(struct radeon_device *rdev); |
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360 | void r600_audio_enable_polling(struct drm_encoder *encoder); |
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361 | void r600_audio_disable_polling(struct drm_encoder *encoder); |
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362 | void r600_audio_fini(struct radeon_device *rdev); |
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363 | void r600_hdmi_init(struct drm_encoder *encoder); |
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364 | int r600_hdmi_buffer_status_changed(struct drm_encoder *encoder); |
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365 | void r600_hdmi_update_audio_settings(struct drm_encoder *encoder); |
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366 | /* r600 blit */ |
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367 | int r600_blit_prepare_copy(struct radeon_device *rdev, int size_bytes); |
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368 | void r600_blit_done_copy(struct radeon_device *rdev, struct radeon_fence *fence); |
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369 | void r600_kms_blit_copy(struct radeon_device *rdev, |
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370 | u64 src_gpu_addr, u64 dst_gpu_addr, |
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371 | int size_bytes); |
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1117 | serge | 372 | |
1233 | serge | 373 | /* |
374 | * rv770,rv730,rv710,rv740 |
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375 | */ |
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376 | int rv770_init(struct radeon_device *rdev); |
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377 | void rv770_fini(struct radeon_device *rdev); |
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378 | int rv770_suspend(struct radeon_device *rdev); |
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379 | int rv770_resume(struct radeon_device *rdev); |
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1963 | serge | 380 | void rv770_pm_misc(struct radeon_device *rdev); |
381 | u32 rv770_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); |
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382 | void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc); |
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383 | void r700_cp_stop(struct radeon_device *rdev); |
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384 | void r700_cp_fini(struct radeon_device *rdev); |
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1233 | serge | 385 | |
1430 | serge | 386 | /* |
387 | * evergreen |
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388 | */ |
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1963 | serge | 389 | struct evergreen_mc_save { |
390 | u32 vga_control[6]; |
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391 | u32 vga_render_control; |
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392 | u32 vga_hdp_control; |
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393 | u32 crtc_control[6]; |
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394 | }; |
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395 | void evergreen_pcie_gart_tlb_flush(struct radeon_device *rdev); |
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1430 | serge | 396 | int evergreen_init(struct radeon_device *rdev); |
397 | void evergreen_fini(struct radeon_device *rdev); |
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398 | int evergreen_suspend(struct radeon_device *rdev); |
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399 | int evergreen_resume(struct radeon_device *rdev); |
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1963 | serge | 400 | bool evergreen_gpu_is_lockup(struct radeon_device *rdev); |
401 | int evergreen_asic_reset(struct radeon_device *rdev); |
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1430 | serge | 402 | void evergreen_bandwidth_update(struct radeon_device *rdev); |
1963 | serge | 403 | void evergreen_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
404 | int evergreen_copy_blit(struct radeon_device *rdev, |
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405 | uint64_t src_offset, uint64_t dst_offset, |
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406 | unsigned num_pages, struct radeon_fence *fence); |
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1430 | serge | 407 | void evergreen_hpd_init(struct radeon_device *rdev); |
408 | void evergreen_hpd_fini(struct radeon_device *rdev); |
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409 | bool evergreen_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); |
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410 | void evergreen_hpd_set_polarity(struct radeon_device *rdev, |
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411 | enum radeon_hpd_id hpd); |
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1963 | serge | 412 | u32 evergreen_get_vblank_counter(struct radeon_device *rdev, int crtc); |
413 | int evergreen_irq_set(struct radeon_device *rdev); |
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414 | int evergreen_irq_process(struct radeon_device *rdev); |
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415 | extern int evergreen_cs_parse(struct radeon_cs_parser *p); |
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416 | extern void evergreen_pm_misc(struct radeon_device *rdev); |
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417 | extern void evergreen_pm_prepare(struct radeon_device *rdev); |
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418 | extern void evergreen_pm_finish(struct radeon_device *rdev); |
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419 | extern void evergreen_pre_page_flip(struct radeon_device *rdev, int crtc); |
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420 | extern u32 evergreen_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); |
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421 | extern void evergreen_post_page_flip(struct radeon_device *rdev, int crtc); |
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422 | void evergreen_disable_interrupt_state(struct radeon_device *rdev); |
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423 | int evergreen_blit_init(struct radeon_device *rdev); |
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424 | void evergreen_blit_fini(struct radeon_device *rdev); |
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425 | /* evergreen blit */ |
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426 | int evergreen_blit_prepare_copy(struct radeon_device *rdev, int size_bytes); |
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427 | void evergreen_blit_done_copy(struct radeon_device *rdev, struct radeon_fence *fence); |
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428 | void evergreen_kms_blit_copy(struct radeon_device *rdev, |
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429 | u64 src_gpu_addr, u64 dst_gpu_addr, |
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430 | int size_bytes); |
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1430 | serge | 431 | |
1963 | serge | 432 | /* |
433 | * cayman |
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434 | */ |
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435 | void cayman_pcie_gart_tlb_flush(struct radeon_device *rdev); |
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436 | int cayman_init(struct radeon_device *rdev); |
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437 | void cayman_fini(struct radeon_device *rdev); |
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438 | int cayman_suspend(struct radeon_device *rdev); |
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439 | int cayman_resume(struct radeon_device *rdev); |
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440 | bool cayman_gpu_is_lockup(struct radeon_device *rdev); |
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441 | int cayman_asic_reset(struct radeon_device *rdev); |
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1430 | serge | 442 | |
1117 | serge | 443 | #endif |