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| Rev | Author | Line No. | Line |
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| 1221 | serge | 1 | /* |
| 2 | * Copyright 2008 Red Hat Inc. |
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| 3 | * Copyright 2009 Jerome Glisse. |
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| 4 | * |
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| 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
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| 6 | * copy of this software and associated documentation files (the "Software"), |
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| 7 | * to deal in the Software without restriction, including without limitation |
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| 8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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| 9 | * and/or sell copies of the Software, and to permit persons to whom the |
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| 10 | * Software is furnished to do so, subject to the following conditions: |
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| 11 | * |
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| 12 | * The above copyright notice and this permission notice shall be included in |
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| 13 | * all copies or substantial portions of the Software. |
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| 14 | * |
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| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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| 18 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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| 19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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| 20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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| 21 | * OTHER DEALINGS IN THE SOFTWARE. |
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| 22 | * |
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| 23 | * Authors: |
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| 24 | * Dave Airlie |
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| 25 | * Jerome Glisse |
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| 26 | */ |
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| 3192 | Serge | 27 | #include |
| 1221 | serge | 28 | #include "radeon.h" |
| 3192 | Serge | 29 | #include |
| 1221 | serge | 30 | |
| 6104 | serge | 31 | #if IS_ENABLED(CONFIG_AGP) |
| 1221 | serge | 32 | |
| 33 | struct radeon_agpmode_quirk { |
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| 34 | u32 hostbridge_vendor; |
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| 35 | u32 hostbridge_device; |
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| 36 | u32 chip_vendor; |
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| 37 | u32 chip_device; |
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| 38 | u32 subsys_vendor; |
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| 39 | u32 subsys_device; |
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| 40 | u32 default_mode; |
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| 41 | }; |
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| 42 | |||
| 43 | static struct radeon_agpmode_quirk radeon_agpmode_quirk_list[] = { |
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| 44 | /* Intel E7505 Memory Controller Hub / RV350 AR [Radeon 9600XT] Needs AGPMode 4 (deb #515326) */ |
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| 45 | { PCI_VENDOR_ID_INTEL, 0x2550, PCI_VENDOR_ID_ATI, 0x4152, 0x1458, 0x4038, 4}, |
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| 46 | /* Intel 82865G/PE/P DRAM Controller/Host-Hub / Mobility 9800 Needs AGPMode 4 (deb #462590) */ |
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| 47 | { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x4a4e, PCI_VENDOR_ID_DELL, 0x5106, 4}, |
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| 48 | /* Intel 82865G/PE/P DRAM Controller/Host-Hub / RV280 [Radeon 9200 SE] Needs AGPMode 4 (lp #300304) */ |
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| 49 | { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x5964, |
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| 50 | 0x148c, 0x2073, 4}, |
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| 51 | /* Intel 82855PM Processor to I/O Controller / Mobility M6 LY Needs AGPMode 1 (deb #467235) */ |
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| 52 | { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c59, |
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| 53 | PCI_VENDOR_ID_IBM, 0x052f, 1}, |
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| 54 | /* Intel 82855PM host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #195051) */ |
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| 55 | { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e50, |
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| 56 | PCI_VENDOR_ID_IBM, 0x0550, 1}, |
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| 6104 | serge | 57 | /* Intel 82855PM host bridge / RV250/M9 GL [Mobility FireGL 9000/Radeon 9000] needs AGPMode 1 (Thinkpad T40p) */ |
| 58 | { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66, |
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| 59 | PCI_VENDOR_ID_IBM, 0x054d, 1}, |
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| 1221 | serge | 60 | /* Intel 82855PM host bridge / Mobility M7 needs AGPMode 1 */ |
| 61 | { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c57, |
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| 62 | PCI_VENDOR_ID_IBM, 0x0530, 1}, |
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| 63 | /* Intel 82855PM host bridge / FireGL Mobility T2 RV350 Needs AGPMode 2 (fdo #20647) */ |
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| 64 | { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e54, |
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| 65 | PCI_VENDOR_ID_IBM, 0x054f, 2}, |
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| 66 | /* Intel 82855PM host bridge / Mobility M9+ / VaioPCG-V505DX Needs AGPMode 2 (fdo #17928) */ |
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| 67 | { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61, |
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| 68 | PCI_VENDOR_ID_SONY, 0x816b, 2}, |
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| 69 | /* Intel 82855PM Processor to I/O Controller / Mobility M9+ Needs AGPMode 8 (phoronix forum) */ |
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| 70 | { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61, |
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| 71 | PCI_VENDOR_ID_SONY, 0x8195, 8}, |
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| 72 | /* Intel 82830 830 Chipset Host Bridge / Mobility M6 LY Needs AGPMode 2 (fdo #17360)*/ |
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| 73 | { PCI_VENDOR_ID_INTEL, 0x3575, PCI_VENDOR_ID_ATI, 0x4c59, |
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| 74 | PCI_VENDOR_ID_DELL, 0x00e3, 2}, |
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| 3192 | Serge | 75 | /* Intel 82852/82855 host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 (lp #296617) */ |
| 1221 | serge | 76 | { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4c66, |
| 77 | PCI_VENDOR_ID_DELL, 0x0149, 1}, |
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| 3192 | Serge | 78 | /* Intel 82855PM host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 for suspend/resume */ |
| 79 | { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66, |
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| 80 | PCI_VENDOR_ID_IBM, 0x0531, 1}, |
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| 1221 | serge | 81 | /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (deb #467460) */ |
| 82 | { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, |
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| 83 | 0x1025, 0x0061, 1}, |
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| 84 | /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #203007) */ |
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| 85 | { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, |
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| 86 | 0x1025, 0x0064, 1}, |
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| 87 | /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #141551) */ |
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| 88 | { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, |
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| 89 | PCI_VENDOR_ID_ASUSTEK, 0x1942, 1}, |
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| 90 | /* Intel 82852/82855 host bridge / Mobility 9600/9700 Needs AGPMode 1 (deb #510208) */ |
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| 91 | { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, |
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| 92 | 0x10cf, 0x127f, 1}, |
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| 93 | /* ASRock K7VT4A+ AGP 8x / ATI Radeon 9250 AGP Needs AGPMode 4 (lp #133192) */ |
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| 94 | { 0x1849, 0x3189, PCI_VENDOR_ID_ATI, 0x5960, |
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| 95 | 0x1787, 0x5960, 4}, |
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| 96 | /* VIA K8M800 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (fdo #12544) */ |
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| 97 | { PCI_VENDOR_ID_VIA, 0x0204, PCI_VENDOR_ID_ATI, 0x5960, |
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| 98 | 0x17af, 0x2020, 4}, |
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| 99 | /* VIA KT880 Host Bridge / RV350 [Radeon 9550] Needs AGPMode 4 (fdo #19981) */ |
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| 100 | { PCI_VENDOR_ID_VIA, 0x0269, PCI_VENDOR_ID_ATI, 0x4153, |
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| 101 | PCI_VENDOR_ID_ASUSTEK, 0x003c, 4}, |
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| 102 | /* VIA VT8363 Host Bridge / R200 QL [Radeon 8500] Needs AGPMode 2 (lp #141551) */ |
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| 103 | { PCI_VENDOR_ID_VIA, 0x0305, PCI_VENDOR_ID_ATI, 0x514c, |
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| 104 | PCI_VENDOR_ID_ATI, 0x013a, 2}, |
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| 105 | /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 (deb #515512) */ |
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| 106 | { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960, |
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| 107 | PCI_VENDOR_ID_ASUSTEK, 0x004c, 2}, |
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| 108 | /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 */ |
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| 109 | { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960, |
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| 110 | PCI_VENDOR_ID_ASUSTEK, 0x0054, 2}, |
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| 111 | /* VIA VT8377 Host Bridge / R200 QM [Radeon 9100] Needs AGPMode 4 (deb #461144) */ |
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| 112 | { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x514d, |
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| 113 | 0x174b, 0x7149, 4}, |
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| 114 | /* VIA VT8377 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (lp #312693) */ |
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| 115 | { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5960, |
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| 116 | 0x1462, 0x0380, 4}, |
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| 117 | /* VIA VT8377 Host Bridge / RV280 Needs AGPMode 4 (ati ML) */ |
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| 118 | { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5964, |
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| 119 | 0x148c, 0x2073, 4}, |
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| 120 | /* ATI Host Bridge / RV280 [M9+] Needs AGPMode 1 (phoronix forum) */ |
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| 121 | { PCI_VENDOR_ID_ATI, 0xcbb2, PCI_VENDOR_ID_ATI, 0x5c61, |
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| 122 | PCI_VENDOR_ID_SONY, 0x8175, 1}, |
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| 123 | { 0, 0, 0, 0, 0, 0, 0 }, |
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| 124 | }; |
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| 125 | #endif |
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| 126 | |||
| 127 | int radeon_agp_init(struct radeon_device *rdev) |
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| 128 | { |
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| 6104 | serge | 129 | #if IS_ENABLED(CONFIG_AGP) |
| 1221 | serge | 130 | struct radeon_agpmode_quirk *p = radeon_agpmode_quirk_list; |
| 131 | struct drm_agp_mode mode; |
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| 132 | struct drm_agp_info info; |
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| 133 | uint32_t agp_status; |
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| 134 | int default_mode; |
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| 135 | bool is_v3; |
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| 136 | int ret; |
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| 137 | |||
| 138 | /* Acquire AGP. */ |
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| 6104 | serge | 139 | ret = drm_agp_acquire(rdev->ddev); |
| 140 | if (ret) { |
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| 141 | DRM_ERROR("Unable to acquire AGP: %d\n", ret); |
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| 142 | return ret; |
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| 143 | } |
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| 1221 | serge | 144 | |
| 145 | ret = drm_agp_info(rdev->ddev, &info); |
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| 146 | if (ret) { |
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| 1403 | serge | 147 | drm_agp_release(rdev->ddev); |
| 1221 | serge | 148 | DRM_ERROR("Unable to get AGP info: %d\n", ret); |
| 149 | return ret; |
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| 150 | } |
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| 1403 | serge | 151 | |
| 152 | if (rdev->ddev->agp->agp_info.aper_size < 32) { |
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| 153 | drm_agp_release(rdev->ddev); |
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| 154 | dev_warn(rdev->dev, "AGP aperture too small (%zuM) " |
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| 155 | "need at least 32M, disabling AGP\n", |
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| 156 | rdev->ddev->agp->agp_info.aper_size); |
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| 157 | return -EINVAL; |
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| 158 | } |
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| 159 | |||
| 1221 | serge | 160 | mode.mode = info.mode; |
| 1963 | serge | 161 | /* chips with the agp to pcie bridge don't have the AGP_STATUS register |
| 162 | * Just use the whatever mode the host sets up. |
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| 163 | */ |
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| 164 | if (rdev->family <= CHIP_RV350) |
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| 6104 | serge | 165 | agp_status = (RREG32(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode.mode; |
| 1963 | serge | 166 | else |
| 167 | agp_status = mode.mode; |
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| 1221 | serge | 168 | is_v3 = !!(agp_status & RADEON_AGPv3_MODE); |
| 169 | |||
| 170 | if (is_v3) { |
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| 171 | default_mode = (agp_status & RADEON_AGPv3_8X_MODE) ? 8 : 4; |
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| 172 | } else { |
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| 173 | if (agp_status & RADEON_AGP_4X_MODE) { |
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| 174 | default_mode = 4; |
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| 175 | } else if (agp_status & RADEON_AGP_2X_MODE) { |
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| 176 | default_mode = 2; |
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| 177 | } else { |
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| 178 | default_mode = 1; |
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| 179 | } |
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| 180 | } |
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| 181 | |||
| 182 | /* Apply AGPMode Quirks */ |
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| 183 | while (p && p->chip_device != 0) { |
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| 184 | if (info.id_vendor == p->hostbridge_vendor && |
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| 185 | info.id_device == p->hostbridge_device && |
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| 186 | rdev->pdev->vendor == p->chip_vendor && |
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| 187 | rdev->pdev->device == p->chip_device && |
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| 188 | rdev->pdev->subsystem_vendor == p->subsys_vendor && |
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| 189 | rdev->pdev->subsystem_device == p->subsys_device) { |
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| 190 | default_mode = p->default_mode; |
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| 191 | } |
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| 192 | ++p; |
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| 193 | } |
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| 194 | |||
| 195 | if (radeon_agpmode > 0) { |
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| 196 | if ((radeon_agpmode < (is_v3 ? 4 : 1)) || |
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| 197 | (radeon_agpmode > (is_v3 ? 8 : 4)) || |
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| 198 | (radeon_agpmode & (radeon_agpmode - 1))) { |
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| 199 | DRM_ERROR("Illegal AGP Mode: %d (valid %s), leaving at %d\n", |
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| 200 | radeon_agpmode, is_v3 ? "4, 8" : "1, 2, 4", |
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| 201 | default_mode); |
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| 202 | radeon_agpmode = default_mode; |
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| 203 | } else { |
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| 204 | DRM_INFO("AGP mode requested: %d\n", radeon_agpmode); |
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| 205 | } |
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| 206 | } else { |
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| 207 | radeon_agpmode = default_mode; |
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| 208 | } |
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| 209 | |||
| 210 | mode.mode &= ~RADEON_AGP_MODE_MASK; |
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| 211 | if (is_v3) { |
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| 212 | switch (radeon_agpmode) { |
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| 213 | case 8: |
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| 214 | mode.mode |= RADEON_AGPv3_8X_MODE; |
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| 215 | break; |
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| 216 | case 4: |
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| 217 | default: |
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| 218 | mode.mode |= RADEON_AGPv3_4X_MODE; |
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| 219 | break; |
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| 220 | } |
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| 221 | } else { |
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| 222 | switch (radeon_agpmode) { |
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| 223 | case 4: |
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| 224 | mode.mode |= RADEON_AGP_4X_MODE; |
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| 225 | break; |
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| 226 | case 2: |
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| 227 | mode.mode |= RADEON_AGP_2X_MODE; |
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| 228 | break; |
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| 229 | case 1: |
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| 230 | default: |
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| 231 | mode.mode |= RADEON_AGP_1X_MODE; |
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| 232 | break; |
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| 233 | } |
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| 234 | } |
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| 235 | |||
| 236 | mode.mode &= ~RADEON_AGP_FW_MODE; /* disable fw */ |
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| 237 | ret = drm_agp_enable(rdev->ddev, mode); |
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| 238 | if (ret) { |
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| 239 | DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode); |
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| 1403 | serge | 240 | drm_agp_release(rdev->ddev); |
| 1221 | serge | 241 | return ret; |
| 242 | } |
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| 243 | |||
| 244 | rdev->mc.agp_base = rdev->ddev->agp->agp_info.aper_base; |
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| 245 | rdev->mc.gtt_size = rdev->ddev->agp->agp_info.aper_size << 20; |
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| 1430 | serge | 246 | rdev->mc.gtt_start = rdev->mc.agp_base; |
| 247 | rdev->mc.gtt_end = rdev->mc.gtt_start + rdev->mc.gtt_size - 1; |
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| 248 | dev_info(rdev->dev, "GTT: %lluM 0x%08llX - 0x%08llX\n", |
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| 249 | rdev->mc.gtt_size >> 20, rdev->mc.gtt_start, rdev->mc.gtt_end); |
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| 1221 | serge | 250 | |
| 251 | /* workaround some hw issues */ |
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| 252 | if (rdev->family < CHIP_R200) { |
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| 253 | WREG32(RADEON_AGP_CNTL, RREG32(RADEON_AGP_CNTL) | 0x000e0000); |
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| 254 | } |
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| 255 | return 0; |
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| 256 | #else |
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| 1430 | serge | 257 | return -1; |
| 1221 | serge | 258 | #endif |
| 259 | } |
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| 260 | |||
| 1313 | serge | 261 | void radeon_agp_resume(struct radeon_device *rdev) |
| 262 | { |
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| 6104 | serge | 263 | #if IS_ENABLED(CONFIG_AGP) |
| 1313 | serge | 264 | int r; |
| 265 | if (rdev->flags & RADEON_IS_AGP) { |
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| 266 | r = radeon_agp_init(rdev); |
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| 267 | if (r) |
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| 268 | dev_warn(rdev->dev, "radeon AGP reinit failed\n"); |
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| 269 | } |
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| 270 | #endif |
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| 271 | } |
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| 272 | |||
| 1221 | serge | 273 | void radeon_agp_fini(struct radeon_device *rdev) |
| 274 | { |
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| 6104 | serge | 275 | #if IS_ENABLED(CONFIG_AGP) |
| 276 | if (rdev->ddev->agp && rdev->ddev->agp->acquired) { |
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| 277 | drm_agp_release(rdev->ddev); |
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| 1221 | serge | 278 | } |
| 279 | #endif |
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| 280 | } |
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| 1963 | serge | 281 | |
| 282 | void radeon_agp_suspend(struct radeon_device *rdev) |
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| 283 | { |
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| 284 | radeon_agp_fini(rdev); |
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| 285 | } |